Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-22 Thread Linus Walleij
On Fri, Aug 18, 2017 at 8:07 PM, David Daney wrote: > Thanks everybody for helping me work through the challenges of preparing > this patch set. Touching multiple subsystems under the stewardship of > multiple maintainers can be difficult, but I think this worked out

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-22 Thread Linus Walleij
On Fri, Aug 18, 2017 at 8:07 PM, David Daney wrote: > Thanks everybody for helping me work through the challenges of preparing > this patch set. Touching multiple subsystems under the stewardship of > multiple maintainers can be difficult, but I think this worked out well. I side with Thomas:

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-20 Thread Thomas Gleixner
On Fri, 18 Aug 2017, David Daney wrote: > On 08/18/2017 02:24 AM, Thomas Gleixner wrote: > > On Thu, 17 Aug 2017, David Daney wrote: > > > > > The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with > > > the interrupt signal from each GPIO line being routed to a dedicated > > >

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-20 Thread Thomas Gleixner
On Fri, 18 Aug 2017, David Daney wrote: > On 08/18/2017 02:24 AM, Thomas Gleixner wrote: > > On Thu, 17 Aug 2017, David Daney wrote: > > > > > The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with > > > the interrupt signal from each GPIO line being routed to a dedicated > > >

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-18 Thread David Daney
On 08/18/2017 02:24 AM, Thomas Gleixner wrote: On Thu, 17 Aug 2017, David Daney wrote: The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with the interrupt signal from each GPIO line being routed to a dedicated MSI-X. This interrupt routing requires that we add some custom

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-18 Thread David Daney
On 08/18/2017 02:24 AM, Thomas Gleixner wrote: On Thu, 17 Aug 2017, David Daney wrote: The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with the interrupt signal from each GPIO line being routed to a dedicated MSI-X. This interrupt routing requires that we add some custom

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-18 Thread Thomas Gleixner
On Thu, 17 Aug 2017, David Daney wrote: > The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with > the interrupt signal from each GPIO line being routed to a dedicated > MSI-X. This interrupt routing requires that we add some custom > processing to the beginning of the MSI-X

Re: [PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-18 Thread Thomas Gleixner
On Thu, 17 Aug 2017, David Daney wrote: > The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with > the interrupt signal from each GPIO line being routed to a dedicated > MSI-X. This interrupt routing requires that we add some custom > processing to the beginning of the MSI-X

[PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-17 Thread David Daney
The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with the interrupt signal from each GPIO line being routed to a dedicated MSI-X. This interrupt routing requires that we add some custom processing to the beginning of the MSI-X irqdomain hierarchy. Changes from v7: - Refactoring

[PATCH v8 0/7] genirq/gpio: Add driver for ThunderX and OCTEON-TX SoCs

2017-08-17 Thread David Daney
The ThunderX/OCTEON-TX GPIO hardware looks like a PCIe device, with the interrupt signal from each GPIO line being routed to a dedicated MSI-X. This interrupt routing requires that we add some custom processing to the beginning of the MSI-X irqdomain hierarchy. Changes from v7: - Refactoring