Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On 27.06.17 20:28:14, Geetha Akula wrote: > On Tue, Jun 27, 2017 at 7:36 PM, Will Deacon wrote: > > On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: > >> On 23.06.17 19:04:36, Geetha sowjanya wrote: > >> > From: Geetha Sowjanya

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On 27.06.17 20:28:14, Geetha Akula wrote: > On Tue, Jun 27, 2017 at 7:36 PM, Will Deacon wrote: > > On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: > >> On 23.06.17 19:04:36, Geetha sowjanya wrote: > >> > From: Geetha Sowjanya > >> > > >> > Cavium ThunderX2 SMMU doesn't support

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Tue, Jun 27, 2017 at 7:36 PM, Will Deacon wrote: > On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: >> On 23.06.17 19:04:36, Geetha sowjanya wrote: >> > From: Geetha Sowjanya >> > >> > Cavium ThunderX2 SMMU doesn't support

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Tue, Jun 27, 2017 at 7:36 PM, Will Deacon wrote: > On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: >> On 23.06.17 19:04:36, Geetha sowjanya wrote: >> > From: Geetha Sowjanya >> > >> > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq >> > lines for

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: > On 23.06.17 19:04:36, Geetha sowjanya wrote: > > From: Geetha Sowjanya > > > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > > lines for gerror, eventq and cmdq-sync.

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Tue, Jun 27, 2017 at 03:56:10PM +0200, Robert Richter wrote: > On 23.06.17 19:04:36, Geetha sowjanya wrote: > > From: Geetha Sowjanya > > > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > > lines for gerror, eventq and cmdq-sync. > > > > New named irq

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On 23.06.17 19:04:36, Geetha sowjanya wrote: > From: Geetha Sowjanya > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > lines for gerror, eventq and cmdq-sync. > > New named irq "combined" is set as a errata workaround, which allows

Re: [Devel] [RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On 23.06.17 19:04:36, Geetha sowjanya wrote: > From: Geetha Sowjanya > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > lines for gerror, eventq and cmdq-sync. > > New named irq "combined" is set as a errata workaround, which allows to > share the irq line by

[RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for

[RESEND PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts.

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Fri, Jun 23, 2017 at 11:28:05AM +0530, Geetha sowjanya wrote: [...] > --- a/drivers/acpi/arm64/iort.c > +++ b/drivers/acpi/arm64/iort.c > @@ -828,6 +828,18 @@ static int __init arm_smmu_v3_count_resources(struct > acpi_iort_node *node) > return num_res; > } > > +static bool

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Fri, Jun 23, 2017 at 11:28:05AM +0530, Geetha sowjanya wrote: [...] > --- a/drivers/acpi/arm64/iort.c > +++ b/drivers/acpi/arm64/iort.c > @@ -828,6 +828,18 @@ static int __init arm_smmu_v3_count_resources(struct > acpi_iort_node *node) > return num_res; > } > > +static bool

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Thu, Jun 22, 2017 at 11:52 PM, Will Deacon wrote: > Hi Geetha, > > On Thu, Jun 22, 2017 at 05:35:38PM +0530, Geetha sowjanya wrote: >> From: Geetha Sowjanya >> >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

On Thu, Jun 22, 2017 at 11:52 PM, Will Deacon wrote: > Hi Geetha, > > On Thu, Jun 22, 2017 at 05:35:38PM +0530, Geetha sowjanya wrote: >> From: Geetha Sowjanya >> >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq >> lines for gerror, eventq and cmdq-sync. >> >> New

[PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for

[PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts.

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

Hi Geetha, On Thu, Jun 22, 2017 at 05:35:38PM +0530, Geetha sowjanya wrote: > From: Geetha Sowjanya > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > lines for gerror, eventq and cmdq-sync. > > New named irq "combined" is set as a

Re: [PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

Hi Geetha, On Thu, Jun 22, 2017 at 05:35:38PM +0530, Geetha sowjanya wrote: > From: Geetha Sowjanya > > Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > lines for gerror, eventq and cmdq-sync. > > New named irq "combined" is set as a errata workaround, which allows

[PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for

[PATCH v9 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126

From: Geetha Sowjanya Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts.