[RESEND] [PATCH 0/8] arm64: Work around for mismatched cache line size

This series adds a work around for systems with mismatched {I,D}-cache line sizes. When a thread of execution gets migrated to a different CPU, the cache line size it had cached could be larger than that of the new CPU. This could cause data corruption issues. We work around this by -

[RESEND] [PATCH 0/8] arm64: Work around for mismatched cache line size

This series adds a work around for systems with mismatched {I,D}-cache line sizes. When a thread of execution gets migrated to a different CPU, the cache line size it had cached could be larger than that of the new CPU. This could cause data corruption issues. We work around this by -