Hi Moritz & Matthew:
Thanks a lot for the comments! It helps a lot so we could keep working on
right direction.
For "next boot" or "rescan" case, it cause rebuild the fpga-region. So
maybe we don't have to model it in fpga class.
Yilun
On Wed, Apr 29, 2020 at 08:12:10PM -0700, Moritz Fischer
Hi Matthew, Yilun
On Tue, Apr 28, 2020 at 03:06:07PM -0700, matthew.gerl...@linux.intel.com wrote:
> Hi Yilun,
>
> You raise some very interesting questions. Please see
> my comments below.
>
> Matthew
>
> On Tue, 28 Apr 2020, Xu Yilun wrote:
>
> > Hi,
> >
> > I wonder if an updating of FPGA
Hi Yilun,
You raise some very interesting questions. Please see
my comments below.
Matthew
On Tue, 28 Apr 2020, Xu Yilun wrote:
Hi,
I wonder if an updating of FPGA Flash (but cannot reload) could be
implemented as fpga-mgr?
I have the pcie based FPGA card. The bitstream for FPGA static
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