On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
> On Tue, Jan 09, 2001 at 02:21:56PM +0200, Matti Aarnio wrote:
> [...]
> > On the other hand, Alpha systems and SPARC systems have IOMMU hardware,
> > and we do support that (to some extent), but 32-bit intel world doesn't
> >
On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
On Tue, Jan 09, 2001 at 02:21:56PM +0200, Matti Aarnio wrote:
[...]
On the other hand, Alpha systems and SPARC systems have IOMMU hardware,
and we do support that (to some extent), but 32-bit intel world doesn't
have
> On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
> > you are correct in saying that ia32 systems don't have IOMMU hardware,
> but
> > it's unfortunate that we don't support 64-bit PCI bus master cards,
> since
> > they're inexpensive and fairly common now. For instance, the Qlogic
On Tue, Jan 09, 2001 at 12:35:02PM -0500, Venkatesh Ramamurthy wrote:
>
> > Problem is that it needs a driver interface change and cooperation from
> > the
> > drivers.
> [Venkatesh Ramamurthy] Atleast the spec for this new interface,
> that the driver has to support be prepared? Once
> Problem is that it needs a driver interface change and cooperation from
> the
> drivers.
[Venkatesh Ramamurthy] Atleast the spec for this new interface,
that the driver has to support be prepared? Once this is done we can port
driver by driver to this new standard.
> -Andi
-
To
On Tue, Jan 09, 2001 at 05:44:46PM +0100, Andi Kleen wrote:
> On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
> > you are correct in saying that ia32 systems don't have IOMMU hardware, but
> > it's unfortunate that we don't support 64-bit PCI bus master cards, since
> > they're
On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
> you are correct in saying that ia32 systems don't have IOMMU hardware, but
> it's unfortunate that we don't support 64-bit PCI bus master cards, since
> they're inexpensive and fairly common now. For instance, the Qlogic ISP SCSI
>
On Tue, Jan 09, 2001 at 02:21:56PM +0200, Matti Aarnio wrote:
[...]
>
> For IO on usual systems you have 32 bit address space PCI busmasters,
> so those can access only the lowest 4GB of address space, and to have
> a block of data in upper area, it needs to be "bounced", that is, CPU
>
On Tue, Jan 09, 2001 at 10:15:34AM -0500, Venkatesh Ramamurthy wrote:
> > Any memory over 1GB is bounce-buffered, but we don't use that memory
> > for anything other than process data pages or file cache, so only
> > swapping and disk IO to regular files gets the extra copy. In
> > particular,
> Any memory over 1GB is bounce-buffered, but we don't use that memory
> for anything other than process data pages or file cache, so only
> swapping and disk IO to regular files gets the extra copy. In
> particular, things like network buffers are still all kept in the low
> 1GB so never need
Hi,
On Mon, Jan 08, 2001 at 11:11:05PM -0500, Venkatesh Ramamurthy wrote:
>
> > Max. RAM size:64 GB (any slowness
> accessing RAM over 4 GB
> * with 32 bit machines ?)
> Imore than 4GB in RAM is bounce buffered, so there is performance
> penalty as the
Hi,
On Fri, Jan 05, 2001 at 11:46:04PM +0100, Pavel Machek wrote:
>
> > Max. file size: 1 TB(?)
> > Max. file system size: 2 TB(?)
>
> Again, maybe on i386 with ext2.
Actually, the 2TB limit affects all architectures, as we assume that
block indexes
On Mon, Jan 08, 2001 at 11:11:05PM -0500, Venkatesh Ramamurthy wrote:
>
> > Max. RAM size: 64 GB (any slowness accessing RAM over 4 GB
> > with 32 bit machines ?)
> more than 4GB in RAM is bounce buffered, so there is performance
> penalty as the
On Mon, Jan 08, 2001 at 11:11:05PM -0500, Venkatesh Ramamurthy wrote:
Max. RAM size: 64 GB (any slowness accessing RAM over 4 GB
with 32 bit machines ?)
more than 4GB in RAM is bounce buffered, so there is performance
penalty as the data
Hi,
On Mon, Jan 08, 2001 at 11:11:05PM -0500, Venkatesh Ramamurthy wrote:
Max. RAM size:64 GB (any slowness
accessing RAM over 4 GB
* with 32 bit machines ?)
Imore than 4GB in RAM is bounce buffered, so there is performance
penalty as the data
On Tue, Jan 09, 2001 at 10:15:34AM -0500, Venkatesh Ramamurthy wrote:
Any memory over 1GB is bounce-buffered, but we don't use that memory
for anything other than process data pages or file cache, so only
swapping and disk IO to regular files gets the extra copy. In
particular, things
On Tue, Jan 09, 2001 at 02:21:56PM +0200, Matti Aarnio wrote:
[...]
For IO on usual systems you have 32 bit address space PCI busmasters,
so those can access only the lowest 4GB of address space, and to have
a block of data in upper area, it needs to be "bounced", that is, CPU
must
On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
you are correct in saying that ia32 systems don't have IOMMU hardware, but
it's unfortunate that we don't support 64-bit PCI bus master cards, since
they're inexpensive and fairly common now. For instance, the Qlogic ISP SCSI
cards
On Tue, Jan 09, 2001 at 05:44:46PM +0100, Andi Kleen wrote:
On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
you are correct in saying that ia32 systems don't have IOMMU hardware, but
it's unfortunate that we don't support 64-bit PCI bus master cards, since
they're inexpensive
Problem is that it needs a driver interface change and cooperation from
the
drivers.
[Venkatesh Ramamurthy] Atleast the spec for this new interface,
that the driver has to support be prepared? Once this is done we can port
driver by driver to this new standard.
-Andi
-
To
On Tue, Jan 09, 2001 at 12:35:02PM -0500, Venkatesh Ramamurthy wrote:
Problem is that it needs a driver interface change and cooperation from
the
drivers.
[Venkatesh Ramamurthy] Atleast the spec for this new interface,
that the driver has to support be prepared? Once this is
On Tue, Jan 09, 2001 at 08:27:49AM -0800, Tim Wright wrote:
you are correct in saying that ia32 systems don't have IOMMU hardware,
but
it's unfortunate that we don't support 64-bit PCI bus master cards,
since
they're inexpensive and fairly common now. For instance, the Qlogic ISP
SCSI
> Max. RAM size:64 GB (any slowness
accessing RAM over 4 GB
* with 32 bit machines ?)
Imore than 4GB in RAM is bounce buffered, so there is performance
penalty as the data have to be copied into the 4GB RAM area
-
To unsubscribe from this list:
Hi!
> Hi, I would like to know whether following limits are right for kernel
> 2.4.x:
>
> Max. N. of CPU: 32 (SMP)
> Max. CPU speed: > 2 Ghz (up to ?)
> Max. RAM size:64 GB (any slowness accessing RAM over 4 GB
>
Hi!
Hi, I would like to know whether following limits are right for kernel
2.4.x:
Max. N. of CPU: 32 (SMP)
Max. CPU speed:2 Ghz (up to ?)
Max. RAM size:64 GB (any slowness accessing RAM over 4 GB
Max. RAM size:64 GB (any slowness
accessing RAM over 4 GB
* with 32 bit machines ?)
Imore than 4GB in RAM is bounce buffered, so there is performance
penalty as the data have to be copied into the 4GB RAM area
-
To unsubscribe from this list: send
> Hi, I would like to know whether following limits are right for kernel
> 2.4.x:
>
> Max. N. of CPU: 32 (SMP)
Max CPUs is 64 on 64 bit architectures (well you have to change NR_CPUS).
I am told larger than 32 cpu ultrasparcs have booted linux already.
Anton
-
To
On Thu, 4 Jan 2001, A.D.F. wrote:
> Max. RAM size:64 GB (any slowness accessing RAM over 4 GB
>with 32 bit machines ?)
realistic benchmarks (unixbench) will show about 3%-6% performance
degradation with use of PAE. Note that this
On Thu, 4 Jan 2001, A.D.F. wrote:
Max. RAM size:64 GB (any slowness accessing RAM over 4 GB
with 32 bit machines ?)
realistic benchmarks (unixbench) will show about 3%-6% performance
degradation with use of PAE. Note that this is
Hi, I would like to know whether following limits are right for kernel
2.4.x:
Max. N. of CPU: 32 (SMP)
Max CPUs is 64 on 64 bit architectures (well you have to change NR_CPUS).
I am told larger than 32 cpu ultrasparcs have booted linux already.
Anton
-
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