Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-20 Thread Chen-Yu Tsai
On Fri, Apr 21, 2017 at 3:59 AM, Priit Laes wrote: > On Fri, Apr 07, 2017 at 03:38:05PM +0200, Maxime Ripard wrote: >> Hi Priit, >> >> On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: >> > > > +/* Not documented on A10 */ >> > > > +static

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-20 Thread Chen-Yu Tsai
On Fri, Apr 21, 2017 at 3:59 AM, Priit Laes wrote: > On Fri, Apr 07, 2017 at 03:38:05PM +0200, Maxime Ripard wrote: >> Hi Priit, >> >> On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: >> > > > +/* Not documented on A10 */ >> > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk,

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-20 Thread Priit Laes
On Fri, Apr 07, 2017 at 03:38:05PM +0200, Maxime Ripard wrote: > Hi Priit, > > On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: > > > > +/* Not documented on A10 */ > > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk, "pll-periph-sata", > > > > "pll-periph", > > > > +

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-20 Thread Priit Laes
On Fri, Apr 07, 2017 at 03:38:05PM +0200, Maxime Ripard wrote: > Hi Priit, > > On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: > > > > +/* Not documented on A10 */ > > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk, "pll-periph-sata", > > > > "pll-periph", > > > > +

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-07 Thread Maxime Ripard
Hi Priit, On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: > > > +/* Not documented on A10 */ > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk, "pll-periph-sata", > > > "pll-periph", > > > + 0x028, BIT(14), 0); > > > > The rate doesn't come from pll-periph directly,

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-07 Thread Maxime Ripard
Hi Priit, On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: > > > +/* Not documented on A10 */ > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk, "pll-periph-sata", > > > "pll-periph", > > > + 0x028, BIT(14), 0); > > > > The rate doesn't come from pll-periph directly,

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-04 Thread Priit Laes
On Mon, Mar 27, 2017 at 09:54:38AM +0200, Maxime Ripard wrote: > Hi, > > Thanks a lot for working on this. > > On Sun, Mar 26, 2017 at 08:20:16PM +0300, Priit Laes wrote: > > Introduce a clock controller driver for sun4i A10 and sun7i A20 > > series SoCs. > > > > Signed-off-by: Priit Laes

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

2017-04-04 Thread Priit Laes
On Mon, Mar 27, 2017 at 09:54:38AM +0200, Maxime Ripard wrote: > Hi, > > Thanks a lot for working on this. > > On Sun, Mar 26, 2017 at 08:20:16PM +0300, Priit Laes wrote: > > Introduce a clock controller driver for sun4i A10 and sun7i A20 > > series SoCs. > > > > Signed-off-by: Priit Laes > >