On Mon, Sep 09, 2013 at 10:11:05AM +0200, Ingo Molnar wrote:
>
> * Andi Kleen wrote:
>
> > I hope this version is ok for everyone now.
>
> This version arrived in the middle of the merge window, will look after
> -rc1 has been released.
Ok.
>
> If there are any bugfixes (or erratum
* Andi Kleen wrote:
> I hope this version is ok for everyone now.
This version arrived in the middle of the merge window, will look after
-rc1 has been released.
If there are any bugfixes (or erratum fixes/workarounds) pending then
you'll need to send them separately against the current
On Mon, Sep 09, 2013 at 10:11:05AM +0200, Ingo Molnar wrote:
* Andi Kleen a...@firstfloor.org wrote:
I hope this version is ok for everyone now.
This version arrived in the middle of the merge window, will look after
-rc1 has been released.
Ok.
If there are any bugfixes (or erratum
* Andi Kleen a...@firstfloor.org wrote:
I hope this version is ok for everyone now.
This version arrived in the middle of the merge window, will look after
-rc1 has been released.
If there are any bugfixes (or erratum fixes/workarounds) pending then
you'll need to send them separately
I hope this version is ok for everyone now.
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
[v4: Remove XXX comment in checkpoint patch.
Add Arnaldo's ack for tools patch]
[v5: Some white space
> Well, at least the front-end side is still documented in the SDM as being
> usable to count stalled cycles.
Stalled frontend cycles does not necessarily mean frontend bound.
The real bottleneck can be still somewhere later in the PipeLine.
Out of Order CPUs are complex.
>
> AFAICS backend
* Andi Kleen wrote:
> On Thu, Sep 05, 2013 at 03:15:02PM +0200, Ingo Molnar wrote:
> >
> > * Ingo Molnar wrote:
> >
> > > One thing I'm not seeing in the current Haswell code is the config set
> > > up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
> > > them
* Andi Kleen wrote:
> The correct way is to implement it like TopDown level 1, but I don't
> know how to put that into the kernel.
Create an event group, with some callbacks to do the
additions/subtractions to get at the right figures? (if it's plain linear
arithmetics then that could be
On Thu, Sep 05, 2013 at 03:15:02PM +0200, Ingo Molnar wrote:
>
> * Ingo Molnar wrote:
>
> > One thing I'm not seeing in the current Haswell code is the config set
> > up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
> > them configured.
>
> Ping? Consider this a
* Ingo Molnar wrote:
> One thing I'm not seeing in the current Haswell code is the config set
> up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
> them configured.
Ping? Consider this a regression report.
Thanks,
Ingo
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* Ingo Molnar mi...@kernel.org wrote:
One thing I'm not seeing in the current Haswell code is the config set
up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
them configured.
Ping? Consider this a regression report.
Thanks,
Ingo
--
To unsubscribe from this
On Thu, Sep 05, 2013 at 03:15:02PM +0200, Ingo Molnar wrote:
* Ingo Molnar mi...@kernel.org wrote:
One thing I'm not seeing in the current Haswell code is the config set
up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
them configured.
Ping? Consider this a
* Andi Kleen a...@firstfloor.org wrote:
The correct way is to implement it like TopDown level 1, but I don't
know how to put that into the kernel.
Create an event group, with some callbacks to do the
additions/subtractions to get at the right figures? (if it's plain linear
arithmetics then
* Andi Kleen a...@firstfloor.org wrote:
On Thu, Sep 05, 2013 at 03:15:02PM +0200, Ingo Molnar wrote:
* Ingo Molnar mi...@kernel.org wrote:
One thing I'm not seeing in the current Haswell code is the config set
up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB
Well, at least the front-end side is still documented in the SDM as being
usable to count stalled cycles.
Stalled frontend cycles does not necessarily mean frontend bound.
The real bottleneck can be still somewhere later in the PipeLine.
Out of Order CPUs are complex.
AFAICS backend stall
I hope this version is ok for everyone now.
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
[v4: Remove XXX comment in checkpoint patch.
Add Arnaldo's ack for tools patch]
[v5: Some white space
One thing I'm not seeing in the current Haswell code is the config set up
for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has them
configured.
Thanks,
Ingo
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
One thing I'm not seeing in the current Haswell code is the config set up
for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has them
configured.
Thanks,
Ingo
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
[v4: Remove XXX comment in checkpoint patch.
Add Arnaldo's ack for tools patch]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
[v4: Remove XXX comment in checkpoint patch.
Add Arnaldo's ack for tools patch]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the
I hope this version is ok for everyone now.
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
I hope this version is ok for everyone now.
[v2: Added Peter's changes to the PEBS handler]
[v3: Addressed Arnaldo's feedback for the perf stat -T change
and avoid conflict]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
[v2: Added Peter's changes to the PEBS handler]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
been merged earlier, so it is all quite straight forward
now.
- Add the checkpointed counter workaround.
(Parts of this have been
[v2: Added Peter's changes to the PEBS handler]
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
been merged earlier, so it is all quite straight forward
now.
- Add the checkpointed counter workaround.
(Parts of this have been
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
been merged earlier, so it is all quite straight forward
now.
- Add the checkpointed counter workaround.
(Parts of this have been already merged earlier)
- Add support for reporting
Add some more TSX functionality to the basic Haswell PMU.
A lot of the infrastructure needed for these patches has
been merged earlier, so it is all quite straight forward
now.
- Add the checkpointed counter workaround.
(Parts of this have been already merged earlier)
- Add support for reporting
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