Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-28 Thread Andreas Rammhold
On 06:33 26.05.20, Ricardo Neri wrote: > On Sat, May 23, 2020 at 04:17:39AM +0200, Andreas Rammhold wrote: > > On 12:43 19.05.20, Ricardo Neri wrote: > > > I have a patch for this already that I wrote for testing purposes: > > >

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-26 Thread Ricardo Neri
On Sat, May 23, 2020 at 04:17:39AM +0200, Andreas Rammhold wrote: > On 12:43 19.05.20, Ricardo Neri wrote: > > I have a patch for this already that I wrote for testing purposes: > > https://github.com/ricardon/tip/commit/1692889cb3f8accb523d44b682458e234b93be50 > > Perhaps it can be used as a

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-22 Thread andi
On 11:56 19.05.20, Brendan Shanks wrote: > The problem is that the kernel does not emulate/spoof the SLDT instruction, > only SGDT, SIDT, and SMSW. > SLDT and STR weren't thought to be commonly used, so emulation/spoofing > wasn’t added. > In the last few months I have seen reports of one or two

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-22 Thread Andreas Rammhold
On 12:43 19.05.20, Ricardo Neri wrote: > I have a patch for this already that I wrote for testing purposes: > https://github.com/ricardon/tip/commit/1692889cb3f8accb523d44b682458e234b93be50 > Perhaps it can be used as a starting point? Not sure what the spoofing > value should be, though. Perhaps

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-20 Thread Andy Lutomirski
> On May 20, 2020, at 5:55 PM, Ricardo Neri > wrote: > > On Tue, May 19, 2020 at 05:54:53PM -0700, Andy Lutomirski wrote: >>> On Tue, May 19, 2020 at 12:43 PM Ricardo Neri >>> wrote: >>> >>> On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote: > On May 19, 2020, at

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-20 Thread Ricardo Neri
On Tue, May 19, 2020 at 05:54:53PM -0700, Andy Lutomirski wrote: > On Tue, May 19, 2020 at 12:43 PM Ricardo Neri > wrote: > > > > On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote: > > > > > > > On May 19, 2020, at 7:38 AM, Andreas Rammhold > > > > wrote: > > > > > > > > Hi, > > >

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread andi
On 11:56 19.05.20, Brendan Shanks wrote: > The problem is that the kernel does not emulate/spoof the SLDT instruction, > only SGDT, SIDT, and SMSW. > SLDT and STR weren't thought to be commonly used, so emulation/spoofing > wasn’t added. > In the last few months I have seen reports of one or two

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread andi
On 12:43 19.05.20, Ricardo Neri wrote: > > > Running the same executable on the exact same kernel (and userland) but > > > on a Intel i7-8565U doesn't crash at this point. I am guessing the > > > emulation is supposed to do something different on AMD CPUs? > > I am surprised you don't see it on

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread Andy Lutomirski
On Tue, May 19, 2020 at 12:43 PM Ricardo Neri wrote: > > On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote: > > > > > On May 19, 2020, at 7:38 AM, Andreas Rammhold wrote: > > > > > > Hi, > > > > > > I've been running into a weird problem with UMIP on a current Ryzen > > > 3900x with

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread H. Peter Anvin
On 2020-05-19 07:38, Andreas Rammhold wrote: > Hi, > > I've been running into a weird problem with UMIP on a current Ryzen > 3900x with kernel 5.6.11 where a process receives a page fault after the > kernel handled the SLDT (or SIDT) instruction (emulation). > > The program I am running is run

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread Ricardo Neri
On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote: > > > On May 19, 2020, at 7:38 AM, Andreas Rammhold wrote: > > > > Hi, > > > > I've been running into a weird problem with UMIP on a current Ryzen > > 3900x with kernel 5.6.11 where a process receives a page fault after the > >

Re: umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread Brendan Shanks
> On May 19, 2020, at 7:38 AM, Andreas Rammhold wrote: > > Hi, > > I've been running into a weird problem with UMIP on a current Ryzen > 3900x with kernel 5.6.11 where a process receives a page fault after the > kernel handled the SLDT (or SIDT) instruction (emulation). > > The program I am

umip: AMD Ryzen 3900X, pagefault after emulate SLDT/SIDT instruction

2020-05-19 Thread Andreas Rammhold
Hi, I've been running into a weird problem with UMIP on a current Ryzen 3900x with kernel 5.6.11 where a process receives a page fault after the kernel handled the SLDT (or SIDT) instruction (emulation). The program I am running is run through WINE in 32bit mode and tries to figure out if it is