Re: [PATCH part1 v5 5/7] PCI: Add pci_dummy_ops to isolate pci device temporarily

2014-02-10 Thread Yijing Wang
Hi Oliver,
   Thanks for your review and comments!

 +static DEFINE_SPINLOCK(pci_freeze_lock);
 
 The lock is used only here.

Also be used in pci_bus_unfreeze_device();

 
 +/**
 + * pci_bus_freeze_device - freeze pci bus to access pci device
 + * @bus: the pci bus to freeze
 + *
 + * Replace pci bus ops by pci_dummy_ops, protect system from
 + * accessing pci devices.
 + */
 +void pci_bus_freeze_device(struct pci_bus *bus)
 +{
 +struct pci_ops *ops;
 +unsigned long flags;
 +
 +spin_lock_irqsave(pci_freeze_lock, flags);
 +ops = pci_bus_set_ops(bus, pci_dummy_ops);
 +bus-save_ops = ops;
 +spin_unlock_irqrestore(pci_freeze_lock, flags);
 
 Against what exactly are you locking here?

I want to use this spin lock to serialize freeze device and unfreeze device.

Thanks!
Yijing.
 
 
 
 


-- 
Thanks!
Yijing

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[PATCH v14 0/9] Add 32 bit VDSO time function support

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch add the functions vdso_gettimeofday(), vdso_clock_gettime()
and vdso_time() to the 32 bit VDSO.

The reason to do this was to get a fast reliable time stamp. Many developers
uses TSC to get a fast time stamp, without knowing the pitfalls. VDSO
time functions a fast and a reliable way, because the kernel knows the
best time source and the P- and C-state of the CPU.

The helper library to use the VDSO functions can be download at
http://http://seibold.net/vdso.c
The libary is very small, only 228 lines of code. Compile it with
gcc -Wall -O3 -fpic vdso.c -lrt -shared -o libvdso.so
and use it with LD_PRELOAD=path/libvdso.so

This kind of helper must be integrated into glibc, for x86 64 bit and
PowerPC it is already there.

Some linux 32 bit kernel benchmark results (all measurements are in nano
seconds):

Intel(R) Celeron(TM) CPU 400MHz

Average time kernel call:
 gettimeofday(): 1039
 clock_gettime(): 1578
 time(): 526
Average time VDSO call:
 gettimeofday(): 378
 clock_gettime(): 303
 time(): 60

Celeron(R) Dual-Core CPU T3100 1.90GHz

Average time kernel call:
 gettimeofday(): 209
 clock_gettime(): 406
 time(): 135
Average time VDSO call:
 gettimeofday(): 51
 clock_gettime(): 43
 time(): 10

So you can see a performance increase between 4 and 13, depending on the
CPU and the function.

The address layout of the VDSO has changed, because there is no fixed
address space available on a x86 32 bit kernel, despite the name. Because
someone decided to add an offset to the __FIXADDR_TOP for virtualization.

Also the IA32 Emulation uses the whole 4 GB address space, so there is no
fixed address available.

This was the reason not depend on this kind of address and change the layout
of the VDSO. The VDSO for a 32 bit application has now three pages:

^ Higher Address
|
++
+ VDSO page (includes code) ro+x +
++
+ VVAR page (export kernel variables) ro +
++
+ HPET page (mapped registers) ro 
++
|
^ Lower Address

The VDSO page for a 32 bit resided still on 0xe000, the the VVAR and
HPET page are mapped before.

In the non compat mode the VMA of the VDSO is now 3 pages for a 32 bit kernel.
So this decrease the available logical address room by 2 pages.

The patch is against kernel 3.14 (e7651b819e90da924991d727d3c007200a18670d)

Changelog:
25.11.2012 - first release and proof of concept for linux 3.4
11.12.2012 - Port to linux 3.7 and code cleanup
12.12.2012 - fixes suggested by Andy Lutomirski
   - fixes suggested by John Stultz
   - use call VDSO32_vsyscall instead of int 80
   - code cleanup
17.12.2012 - support for IA32_EMULATION, this includes
 - code cleanup
 - include cleanup to fix compile warnings and errors
 - move out seqcount from seqlock, enable use in VDSO
 - map FIXMAP and HPET into the 32 bit address space
18.12.2012 - split into separate patches
30.01.2014 - revamp the code
 - code clean up
 - VDSO layout changed
 - no fixed addresses
 - port to 3.14
01.02.2014 - code cleanup
02.02.2014 - code cleanup
 - split into more patches
 - use HPET_COUNTER instead of hard coded value
 - fix changelog to the right year ;-)
02.02.2014 - reverse the mapping, this make the new VDSO 32 bit support
 full compatible.
03.02.2014 - code cleanup
 - fix comment
 - fix ABI break in vdso32.lds.S
04.02.2014 - revamp IA32 emulation support
 - introduce VVAR macro
 - rearranged vsyscall_gtod_data struture for IA32 emulation support
 - code cleanup
05.02.2014 - revamp IA32 emulation support
 - replace seqcount_t by an unsigned, to make the vsyscall_gtod_data
   structure independed of kernel config and functions.
08.02.2014 - revamp IA32 emulation support
 - replace all internal structures by fix size elements
10.02.2014 - code cleanup
 - add commets
 - revamp inline assembly
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[PATCH v14 3/9] revamp vclock_gettime.c

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This intermediate patch revamps the vclock_gettime.c by moving some functions
around. It is only for spliting purpose, to make whole the 32 bit vdso timer
patch easier to review.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/vdso/vclock_gettime.c | 85 +-
 1 file changed, 42 insertions(+), 43 deletions(-)

diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index eb5d7a5..bbc8065 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -26,41 +26,26 @@
 
 #define gtod (VVAR(vsyscall_gtod_data))
 
-notrace static cycle_t vread_tsc(void)
+static notrace cycle_t vread_hpet(void)
 {
-   cycle_t ret;
-   u64 last;
-
-   /*
-* Empirically, a fence (of type that depends on the CPU)
-* before rdtsc is enough to ensure that rdtsc is ordered
-* with respect to loads.  The various CPU manuals are unclear
-* as to whether rdtsc can be reordered with later loads,
-* but no one has ever seen it happen.
-*/
-   rdtsc_barrier();
-   ret = (cycle_t)vget_cycles();
-
-   last = VVAR(vsyscall_gtod_data).clock.cycle_last;
-
-   if (likely(ret = last))
-   return ret;
+   return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 
HPET_COUNTER);
+}
 
-   /*
-* GCC likes to generate cmov here, but this branch is extremely
-* predictable (it's just a funciton of time and the likely is
-* very likely) and there's a data dependence, so force GCC
-* to generate a branch instead.  I don't barrier() because
-* we don't actually need a barrier, and if this function
-* ever gets inlined it will generate worse code.
-*/
-   asm volatile ();
-   return last;
+notrace static long vdso_fallback_gettime(long clock, struct timespec *ts)
+{
+   long ret;
+   asm(syscall : =a (ret) :
+   0 (__NR_clock_gettime), D (clock), S (ts) : memory);
+   return ret;
 }
 
-static notrace cycle_t vread_hpet(void)
+notrace static long vdso_fallback_gtod(struct timeval *tv, struct timezone *tz)
 {
-   return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 
HPET_COUNTER);
+   long ret;
+
+   asm(syscall : =a (ret) :
+   0 (__NR_gettimeofday), D (tv), S (tz) : memory);
+   return ret;
 }
 
 #ifdef CONFIG_PARAVIRT_CLOCK
@@ -133,23 +118,37 @@ static notrace cycle_t vread_pvclock(int *mode)
 }
 #endif
 
-notrace static long vdso_fallback_gettime(long clock, struct timespec *ts)
+notrace static cycle_t vread_tsc(void)
 {
-   long ret;
-   asm(syscall : =a (ret) :
-   0 (__NR_clock_gettime),D (clock), S (ts) : memory);
-   return ret;
-}
+   cycle_t ret;
+   u64 last;
 
-notrace static long vdso_fallback_gtod(struct timeval *tv, struct timezone *tz)
-{
-   long ret;
+   /*
+* Empirically, a fence (of type that depends on the CPU)
+* before rdtsc is enough to ensure that rdtsc is ordered
+* with respect to loads.  The various CPU manuals are unclear
+* as to whether rdtsc can be reordered with later loads,
+* but no one has ever seen it happen.
+*/
+   rdtsc_barrier();
+   ret = (cycle_t)vget_cycles();
 
-   asm(syscall : =a (ret) :
-   0 (__NR_gettimeofday), D (tv), S (tz) : memory);
-   return ret;
-}
+   last = VVAR(vsyscall_gtod_data).clock.cycle_last;
 
+   if (likely(ret = last))
+   return ret;
+
+   /*
+* GCC likes to generate cmov here, but this branch is extremely
+* predictable (it's just a funciton of time and the likely is
+* very likely) and there's a data dependence, so force GCC
+* to generate a branch instead.  I don't barrier() because
+* we don't actually need a barrier, and if this function
+* ever gets inlined it will generate worse code.
+*/
+   asm volatile ();
+   return last;
+}
 
 notrace static inline u64 vgetsns(int *mode)
 {
-- 
1.8.5.4

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[PATCH v14 4/9] vclock_gettime.c __vdso_clock_gettime cleanup

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch is a small code cleanup for the __vdso_clock_gettime() function.

It removes the unneeded return values from do_monotonic_coarse() and
do_realtime_coarse() and add a fallback label for doing the kernel
gettimeofday() system call.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/vdso/vclock_gettime.c | 27 ++-
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index bbc8065..fd074dd 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -209,7 +209,7 @@ notrace static int do_monotonic(struct timespec *ts)
return mode;
 }
 
-notrace static int do_realtime_coarse(struct timespec *ts)
+notrace static void do_realtime_coarse(struct timespec *ts)
 {
unsigned long seq;
do {
@@ -217,10 +217,9 @@ notrace static int do_realtime_coarse(struct timespec *ts)
ts-tv_sec = gtod-wall_time_coarse.tv_sec;
ts-tv_nsec = gtod-wall_time_coarse.tv_nsec;
} while (unlikely(read_seqcount_retry(gtod-seq, seq)));
-   return 0;
 }
 
-notrace static int do_monotonic_coarse(struct timespec *ts)
+notrace static void do_monotonic_coarse(struct timespec *ts)
 {
unsigned long seq;
do {
@@ -228,30 +227,32 @@ notrace static int do_monotonic_coarse(struct timespec 
*ts)
ts-tv_sec = gtod-monotonic_time_coarse.tv_sec;
ts-tv_nsec = gtod-monotonic_time_coarse.tv_nsec;
} while (unlikely(read_seqcount_retry(gtod-seq, seq)));
-
-   return 0;
 }
 
 notrace int __vdso_clock_gettime(clockid_t clock, struct timespec *ts)
 {
-   int ret = VCLOCK_NONE;
-
switch (clock) {
case CLOCK_REALTIME:
-   ret = do_realtime(ts);
+   if (do_realtime(ts) == VCLOCK_NONE)
+   goto fallback;
break;
case CLOCK_MONOTONIC:
-   ret = do_monotonic(ts);
+   if (do_monotonic(ts) == VCLOCK_NONE)
+   goto fallback;
break;
case CLOCK_REALTIME_COARSE:
-   return do_realtime_coarse(ts);
+   do_realtime_coarse(ts);
+   break;
case CLOCK_MONOTONIC_COARSE:
-   return do_monotonic_coarse(ts);
+   do_monotonic_coarse(ts);
+   break;
+   default:
+   goto fallback;
}
 
-   if (ret == VCLOCK_NONE)
-   return vdso_fallback_gettime(clock, ts);
return 0;
+fallback:
+   return vdso_fallback_gettime(clock, ts);
 }
 int clock_gettime(clockid_t, struct timespec *)
__attribute__((weak, alias(__vdso_clock_gettime)));
-- 
1.8.5.4

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[PATCH v14 2/9] Add new func _install_special_mapping() to mmap.c

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

The _install_special_mapping() is the new base function for
install_special_mapping(). This function will return a pointer of the
created VMA or a error code in an ERR_PTR()

This new function will be needed by the for the vdso 32 bit support to map the
additonal vvar and hpet pages into the 32 bit address space. This will be done
with io_remap_pfn_range() and remap_pfn_range, which requieres a vm_area_struct.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 include/linux/mm.h |  3 +++
 mm/mmap.c  | 20 
 2 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/include/linux/mm.h b/include/linux/mm.h
index f28f46e..55342aa 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1740,6 +1740,9 @@ extern void set_mm_exe_file(struct mm_struct *mm, struct 
file *new_exe_file);
 extern struct file *get_mm_exe_file(struct mm_struct *mm);
 
 extern int may_expand_vm(struct mm_struct *mm, unsigned long npages);
+extern struct vm_area_struct *_install_special_mapping(struct mm_struct *mm,
+  unsigned long addr, unsigned long len,
+  unsigned long flags, struct page **pages);
 extern int install_special_mapping(struct mm_struct *mm,
   unsigned long addr, unsigned long len,
   unsigned long flags, struct page **pages);
diff --git a/mm/mmap.c b/mm/mmap.c
index 20ff0c3..81ba54f 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -2918,7 +2918,7 @@ static const struct vm_operations_struct 
special_mapping_vmops = {
  * The array pointer and the pages it points to are assumed to stay alive
  * for as long as this mapping might exist.
  */
-int install_special_mapping(struct mm_struct *mm,
+struct vm_area_struct *_install_special_mapping(struct mm_struct *mm,
unsigned long addr, unsigned long len,
unsigned long vm_flags, struct page **pages)
 {
@@ -2927,7 +2927,7 @@ int install_special_mapping(struct mm_struct *mm,
 
vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
if (unlikely(vma == NULL))
-   return -ENOMEM;
+   return ERR_PTR(-ENOMEM);
 
INIT_LIST_HEAD(vma-anon_vma_chain);
vma-vm_mm = mm;
@@ -2948,11 +2948,23 @@ int install_special_mapping(struct mm_struct *mm,
 
perf_event_mmap(vma);
 
-   return 0;
+   return vma;
 
 out:
kmem_cache_free(vm_area_cachep, vma);
-   return ret;
+   return ERR_PTR(ret);
+}
+
+int install_special_mapping(struct mm_struct *mm,
+   unsigned long addr, unsigned long len,
+   unsigned long vm_flags, struct page **pages)
+{
+   struct vm_area_struct *vma = _install_special_mapping(mm,
+   addr, len, vm_flags, pages);
+
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
+   return 0;
 }
 
 static DEFINE_MUTEX(mm_all_locks_mutex);
-- 
1.8.5.4

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[PATCH v14 6/9] cleanup __vdso_gettimeofday

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch do a little cleanup for the __vdso_gettimeofday() function.

It kick out an unneeded ret local variable and makes the code faster if
only the timezone is needed.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/vdso/vclock_gettime.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 743f277..09dae4a 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -259,13 +259,12 @@ int clock_gettime(clockid_t, struct timespec *)
 
 notrace int __vdso_gettimeofday(struct timeval *tv, struct timezone *tz)
 {
-   long ret = VCLOCK_NONE;
-
if (likely(tv != NULL)) {
BUILD_BUG_ON(offsetof(struct timeval, tv_usec) !=
 offsetof(struct timespec, tv_nsec) ||
 sizeof(*tv) != sizeof(struct timespec));
-   ret = do_realtime((struct timespec *)tv);
+   if (unlikely(do_realtime((struct timespec *)tv) == VCLOCK_NONE))
+   return vdso_fallback_gtod(tv, tz);
tv-tv_usec /= 1000;
}
if (unlikely(tz != NULL)) {
@@ -274,8 +273,6 @@ notrace int __vdso_gettimeofday(struct timeval *tv, struct 
timezone *tz)
tz-tz_dsttime = gtod-sys_tz.tz_dsttime;
}
 
-   if (ret == VCLOCK_NONE)
-   return vdso_fallback_gtod(tv, tz);
return 0;
 }
 int gettimeofday(struct timeval *, struct timezone *)
-- 
1.8.5.4

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[PATCH v14 8/9] Add 32 bit VDSO time support for 32 bit kernel

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch add the time support for 32 bit a VDSO to a 32 bit kernel.

For 32 bit programs running on a 32 bit kernel, the same mechanism is
used as for 64 bit programs running on a 64 bit kernel.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/include/asm/vdso.h   |  3 ++
 arch/x86/include/asm/vdso32.h | 11 +++
 arch/x86/vdso/Makefile|  7 +
 arch/x86/vdso/vclock_gettime.c| 55 +--
 arch/x86/vdso/vdso-layout.lds.S   | 22 ++
 arch/x86/vdso/vdso32-setup.c  | 53 +
 arch/x86/vdso/vdso32/vclock_gettime.c | 36 +++
 arch/x86/vdso/vdso32/vdso32.lds.S |  9 ++
 8 files changed, 188 insertions(+), 8 deletions(-)
 create mode 100644 arch/x86/include/asm/vdso32.h
 create mode 100644 arch/x86/vdso/vdso32/vclock_gettime.c

diff --git a/arch/x86/include/asm/vdso.h b/arch/x86/include/asm/vdso.h
index fddb53d..fe3cef9 100644
--- a/arch/x86/include/asm/vdso.h
+++ b/arch/x86/include/asm/vdso.h
@@ -2,6 +2,9 @@
 #define _ASM_X86_VDSO_H
 
 #if defined CONFIG_X86_32 || defined CONFIG_COMPAT
+
+#include asm/vdso32.h
+
 extern const char VDSO32_PRELINK[];
 
 /*
diff --git a/arch/x86/include/asm/vdso32.h b/arch/x86/include/asm/vdso32.h
new file mode 100644
index 000..7efb701
--- /dev/null
+++ b/arch/x86/include/asm/vdso32.h
@@ -0,0 +1,11 @@
+#ifndef _ASM_X86_VDSO32_H
+#define _ASM_X86_VDSO32_H
+
+#define VDSO_BASE_PAGE 0
+#define VDSO_VVAR_PAGE 1
+#define VDSO_HPET_PAGE 2
+#define VDSO_PAGES 3
+#define VDSO_PREV_PAGES2
+#define VDSO_OFFSET(x) ((x) * PAGE_SIZE)
+
+#endif
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index fd14be1..1ff5b0a 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -145,8 +145,15 @@ KBUILD_AFLAGS_32 := $(filter-out -m64,$(KBUILD_AFLAGS))
 $(vdso32-images:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_32)
 $(vdso32-images:%=$(obj)/%.dbg): asflags-$(CONFIG_X86_64) += -m32
 
+KBUILD_CFLAGS_32 := $(filter-out -m64,$(KBUILD_CFLAGS))
+KBUILD_CFLAGS_32 := $(filter-out -mcmodel=kernel,$(KBUILD_CFLAGS_32))
+KBUILD_CFLAGS_32 := $(filter-out -fno-pic,$(KBUILD_CFLAGS_32))
+KBUILD_CFLAGS_32 += -m32 -msoft-float -mregparm=3 -freg-struct-return -fpic
+$(vdso32-images:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_32)
+
 $(vdso32-images:%=$(obj)/%.dbg): $(obj)/vdso32-%.so.dbg: FORCE \
 $(obj)/vdso32/vdso32.lds \
+$(obj)/vdso32/vclock_gettime.o \
 $(obj)/vdso32/note.o \
 $(obj)/vdso32/%.o
$(call if_changed,vdso)
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 09dae4a..16a1c9c 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -4,6 +4,9 @@
  *
  * Fast user context implementation of clock_gettime, gettimeofday, and time.
  *
+ * 32 Bit compat layer by Stefani Seibold stef...@seibold.net
+ *  sponsored by Rohde  Schwarz GmbH  Co. KG Munich/Germany
+ *
  * The code should have no internal unresolved relocations.
  * Check with readelf after changing.
  */
@@ -26,6 +29,8 @@
 
 #define gtod (VVAR(vsyscall_gtod_data))
 
+#ifndef BUILD_VDSO32
+
 static notrace cycle_t vread_hpet(void)
 {
return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 
HPET_COUNTER);
@@ -47,6 +52,50 @@ notrace static long vdso_fallback_gtod(struct timeval *tv, 
struct timezone *tz)
0 (__NR_gettimeofday), D (tv), S (tz) : memory);
return ret;
 }
+#else
+
+u8 hpet_page
+   __attribute__((visibility(hidden)));
+
+#ifdef CONFIG_HPET_TIMER
+static notrace cycle_t vread_hpet(void)
+{
+   return readl(hpet_page + HPET_COUNTER);
+}
+#endif
+
+notrace static long vdso_fallback_gettime(long clock, struct timespec *ts)
+{
+   long ret;
+
+   asm(
+   mov %%ebx, %%edx \n
+   mov %2, %%ebx \n
+   mov %1, %%eax \n
+   call VDSO32_vsyscall \n
+   mov %%edx, %%ebx \n
+   : =a (ret)
+   : i (__NR_clock_gettime), g (clock), c (ts)
+   : memory, edx);
+   return ret;
+}
+
+notrace static long vdso_fallback_gtod(struct timeval *tv, struct timezone *tz)
+{
+   long ret;
+
+   asm(
+   mov %%ebx, %%edx \n
+   mov %2, %%ebx \n
+   mov %1, %%eax \n
+   call VDSO32_vsyscall \n
+   mov %%edx, %%ebx \n
+   : =a (ret)
+   : i (__NR_gettimeofday), g (tv), c (tz)
+   : memory, edx);
+   return ret;
+}
+#endif
 
 #ifdef CONFIG_PARAVIRT_CLOCK
 
@@ -152,12 +201,14 @@ notrace static cycle_t vread_tsc(void)
 
 notrace static inline u64 vgetsns(int *mode)
 {
-   long v;
+   u64 v;
cycles_t cycles;
if (gtod-clock.vclock_mode == VCLOCK_TSC)
  

[PATCH v14 7/9] introduce VVAR marco for vdso32

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch revamp the vvar.h for introduce the VVAR macro for vdso32.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/include/asm/vvar.h | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/vvar.h b/arch/x86/include/asm/vvar.h
index 0a534ea..52c79ff 100644
--- a/arch/x86/include/asm/vvar.h
+++ b/arch/x86/include/asm/vvar.h
@@ -26,6 +26,15 @@
 
 #else
 
+#ifdef BUILD_VDSO32
+
+#define DECLARE_VVAR(offset, type, name)   \
+   extern type vvar_ ## name __attribute__((visibility(hidden)));
+
+#define VVAR(name) (vvar_ ## name)
+
+#else
+
 extern char __vvar_page;
 
 /* Base address of vvars.  This is not ABI. */
@@ -39,12 +48,13 @@ extern char __vvar_page;
static type const * const vvaraddr_ ## name =   \
(void *)(VVAR_ADDRESS + (offset));
 
+#define VVAR(name) (*vvaraddr_ ## name)
+#endif
+
 #define DEFINE_VVAR(type, name)
\
type name   \
__attribute__((section(.vvar_ #name), aligned(16))) __visible
 
-#define VVAR(name) (*vvaraddr_ ## name)
-
 #endif
 
 /* DECLARE_VVAR(offset, type, name) */
-- 
1.8.5.4

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[PATCH v14 5/9] replace VVAR(vsyscall_gtod_data) by gtod macro

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

There a currently more than 30 users of the gtod macro, so replace the
last VVAR(vsyscall_gtod_data) by gtod macro.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/vdso/vclock_gettime.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index fd074dd..743f277 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -109,7 +109,7 @@ static notrace cycle_t vread_pvclock(int *mode)
*mode = VCLOCK_NONE;
 
/* refer to tsc.c read_tsc() comment for rationale */
-   last = VVAR(vsyscall_gtod_data).clock.cycle_last;
+   last = gtod-clock.cycle_last;
 
if (likely(ret = last))
return ret;
@@ -133,7 +133,7 @@ notrace static cycle_t vread_tsc(void)
rdtsc_barrier();
ret = (cycle_t)vget_cycles();
 
-   last = VVAR(vsyscall_gtod_data).clock.cycle_last;
+   last = gtod-clock.cycle_last;
 
if (likely(ret = last))
return ret;
@@ -288,7 +288,7 @@ int gettimeofday(struct timeval *, struct timezone *)
 notrace time_t __vdso_time(time_t *t)
 {
/* This is atomic on x86_64 so we don't need any locks. */
-   time_t result = ACCESS_ONCE(VVAR(vsyscall_gtod_data).wall_time_sec);
+   time_t result = ACCESS_ONCE(gtod-wall_time_sec);
 
if (t)
*t = result;
-- 
1.8.5.4

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[PATCH v14 1/9] Make vsyscall_gtod_data handling x86 generic

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch move the vsyscall_gtod_data handling out of vsyscall_64.c
into an additonal file vsyscall_gtod.c to make the functionality
available for x86 32 bit kernel.

It also adds a new vsyscall_32.c which setup the VVAR page.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/Kconfig   |  4 +--
 arch/x86/include/asm/clocksource.h |  4 ---
 arch/x86/include/asm/fixmap.h  |  2 ++
 arch/x86/include/asm/vvar.h| 12 ++--
 arch/x86/kernel/Makefile   |  3 +-
 arch/x86/kernel/hpet.c |  4 ---
 arch/x86/kernel/setup.c|  2 --
 arch/x86/kernel/tsc.c  |  2 --
 arch/x86/kernel/vmlinux.lds.S  |  3 --
 arch/x86/kernel/vsyscall_32.c  | 21 +
 arch/x86/kernel/vsyscall_64.c  | 45 
 arch/x86/kernel/vsyscall_gtod.c| 60 ++
 12 files changed, 96 insertions(+), 66 deletions(-)
 create mode 100644 arch/x86/kernel/vsyscall_32.c
 create mode 100644 arch/x86/kernel/vsyscall_gtod.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 940e50e..b556f00 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -107,9 +107,9 @@ config X86
select HAVE_ARCH_SOFT_DIRTY
select CLOCKSOURCE_WATCHDOG
select GENERIC_CLOCKEVENTS
-   select ARCH_CLOCKSOURCE_DATA if X86_64
+   select ARCH_CLOCKSOURCE_DATA
select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32  
X86_LOCAL_APIC)
-   select GENERIC_TIME_VSYSCALL if X86_64
+   select GENERIC_TIME_VSYSCALL
select KTIME_SCALAR if X86_32
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
diff --git a/arch/x86/include/asm/clocksource.h 
b/arch/x86/include/asm/clocksource.h
index 16a57f4..eda81dc 100644
--- a/arch/x86/include/asm/clocksource.h
+++ b/arch/x86/include/asm/clocksource.h
@@ -3,8 +3,6 @@
 #ifndef _ASM_X86_CLOCKSOURCE_H
 #define _ASM_X86_CLOCKSOURCE_H
 
-#ifdef CONFIG_X86_64
-
 #define VCLOCK_NONE 0  /* No vDSO clock available. */
 #define VCLOCK_TSC  1  /* vDSO should use vread_tsc.   */
 #define VCLOCK_HPET 2  /* vDSO should use vread_hpet.  */
@@ -14,6 +12,4 @@ struct arch_clocksource_data {
int vclock_mode;
 };
 
-#endif /* CONFIG_X86_64 */
-
 #endif /* _ASM_X86_CLOCKSOURCE_H */
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 7252cd3..094d0cc 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -75,6 +75,8 @@ enum fixed_addresses {
 #ifdef CONFIG_X86_32
FIX_HOLE,
FIX_VDSO,
+   VVAR_PAGE,
+   VSYSCALL_HPET,
 #else
VSYSCALL_LAST_PAGE,
VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
diff --git a/arch/x86/include/asm/vvar.h b/arch/x86/include/asm/vvar.h
index d76ac40..0a534ea 100644
--- a/arch/x86/include/asm/vvar.h
+++ b/arch/x86/include/asm/vvar.h
@@ -16,9 +16,6 @@
  * you mess up, the linker will catch it.)
  */
 
-/* Base address of vvars.  This is not ABI. */
-#define VVAR_ADDRESS (-10*1024*1024 - 4096)
-
 #if defined(__VVAR_KERNEL_LDS)
 
 /* The kernel linker script defines its own magic to put vvars in the
@@ -29,6 +26,15 @@
 
 #else
 
+extern char __vvar_page;
+
+/* Base address of vvars.  This is not ABI. */
+#ifdef CONFIG_X86_64
+#define VVAR_ADDRESS (-10*1024*1024 - 4096)
+#else
+#define VVAR_ADDRESS (__vvar_page)
+#endif
+
 #define DECLARE_VVAR(offset, type, name)   \
static type const * const vvaraddr_ ## name =   \
(void *)(VVAR_ADDRESS + (offset));
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index cb648c8..3282eda 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -26,7 +26,8 @@ obj-$(CONFIG_IRQ_WORK)  += irq_work.o
 obj-y  += probe_roms.o
 obj-$(CONFIG_X86_32)   += i386_ksyms_32.o
 obj-$(CONFIG_X86_64)   += sys_x86_64.o x8664_ksyms_64.o
-obj-y  += syscall_$(BITS).o
+obj-y  += syscall_$(BITS).o vsyscall_gtod.o
+obj-$(CONFIG_X86_32)   += vsyscall_32.o
 obj-$(CONFIG_X86_64)   += vsyscall_64.o
 obj-$(CONFIG_X86_64)   += vsyscall_emu_64.o
 obj-$(CONFIG_SYSFS)+= ksysfs.o
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index da85a8e..54263f0 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -74,9 +74,7 @@ static inline void hpet_writel(unsigned int d, unsigned int a)
 static inline void hpet_set_mapping(void)
 {
hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
-#ifdef CONFIG_X86_64
__set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VVAR_NOCACHE);
-#endif
 }
 
 static inline void hpet_clear_mapping(void)
@@ -752,9 +750,7 @@ static struct clocksource clocksource_hpet = {
.mask   = HPET_MASK,
.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
.resume = hpet_resume_counter,
-#ifdef CONFIG_X86_64
.archdata   = 

[PATCH v14 9/9] Add 32 bit VDSO time support for 64 bit kernel

2014-02-10 Thread stefani
From: Stefani Seibold stef...@seibold.net

This patch add the VDSO time support for the IA32 Emulation Layer.

Due the nature of the kernel headers and the LP64 compiler where the
size of a long and a pointer differs against a 32 bit compiler, there
is some type hacking necessary for optimal performance.

The vsyscall_gtod_data struture must be a rearranged to serve 32- and
64-bit code access at the same time:

- The seqcount_t was replaced by an unsigned, this makes the
  vsyscall_gtod_data intedepend of kernel configuration and internal functions.
- All kernel internal structures are replaced by fix size elements
  which works for 32- and 64-bit access
- The inner struct clock was removed to pack the whole struct.

The unsigned seq would be handled by functions derivated from seqcount_t.

Signed-off-by: Stefani Seibold stef...@seibold.net
---
 arch/x86/include/asm/vgtod.h  | 69 ---
 arch/x86/include/asm/vvar.h   |  5 +++
 arch/x86/kernel/vsyscall_gtod.c   | 33 +++--
 arch/x86/vdso/vclock_gettime.c| 68 +-
 arch/x86/vdso/vdso32/vclock_gettime.c | 13 +++
 5 files changed, 128 insertions(+), 60 deletions(-)

diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index 46e24d3..abb9e45 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -4,27 +4,70 @@
 #include asm/vsyscall.h
 #include linux/clocksource.h
 
+#ifdef CONFIG_X86_64
+typedef u64 gtod_long_t;
+#else
+typedef u32 gtod_long_t;
+#endif
+/*
+ * vsyscall_gtod_data will be accessed by 32 and 64 bit code at the same time
+ * so be carefull by modifying this structure.
+ */
 struct vsyscall_gtod_data {
-   seqcount_t  seq;
+   unsigned seq;
 
-   struct { /* extract of a clocksource struct */
-   int vclock_mode;
-   cycle_t cycle_last;
-   cycle_t mask;
-   u32 mult;
-   u32 shift;
-   } clock;
+   int vclock_mode;
+   cycle_t cycle_last;
+   cycle_t mask;
+   u32 mult;
+   u32 shift;
 
/* open coded 'struct timespec' */
-   time_t  wall_time_sec;
u64 wall_time_snsec;
+   gtod_long_t wall_time_sec;
+   gtod_long_t monotonic_time_sec;
u64 monotonic_time_snsec;
-   time_t  monotonic_time_sec;
+   gtod_long_t wall_time_coarse_sec;
+   gtod_long_t wall_time_coarse_nsec;
+   gtod_long_t monotonic_time_coarse_sec;
+   gtod_long_t monotonic_time_coarse_nsec;
 
-   struct timezone sys_tz;
-   struct timespec wall_time_coarse;
-   struct timespec monotonic_time_coarse;
+   int tz_minuteswest;
+   int tz_dsttime;
 };
 extern struct vsyscall_gtod_data vsyscall_gtod_data;
 
+static inline unsigned gtod_read_begin(const struct vsyscall_gtod_data *s)
+{
+   unsigned ret;
+
+repeat:
+   ret = ACCESS_ONCE(s-seq);
+   if (unlikely(ret  1)) {
+   cpu_relax();
+   goto repeat;
+   }
+   smp_rmb();
+   return ret;
+}
+
+static inline int gtod_read_retry(const struct vsyscall_gtod_data *s,
+   unsigned start)
+{
+   smp_rmb();
+   return unlikely(s-seq != start);
+}
+
+static inline void gtod_write_begin(struct vsyscall_gtod_data *s)
+{
+   ++s-seq;
+   smp_wmb();
+}
+
+static inline void gtod_write_end(struct vsyscall_gtod_data *s)
+{
+   smp_wmb();
+   ++s-seq;
+}
+
 #endif /* _ASM_X86_VGTOD_H */
diff --git a/arch/x86/include/asm/vvar.h b/arch/x86/include/asm/vvar.h
index 52c79ff..081d909 100644
--- a/arch/x86/include/asm/vvar.h
+++ b/arch/x86/include/asm/vvar.h
@@ -16,6 +16,9 @@
  * you mess up, the linker will catch it.)
  */
 
+#ifndef _ASM_X86_VVAR_H
+#define _ASM_X86_VVAR_H
+
 #if defined(__VVAR_KERNEL_LDS)
 
 /* The kernel linker script defines its own magic to put vvars in the
@@ -64,3 +67,5 @@ DECLARE_VVAR(16, int, vgetcpu_mode)
 DECLARE_VVAR(128, struct vsyscall_gtod_data, vsyscall_gtod_data)
 
 #undef DECLARE_VVAR
+
+#endif
diff --git a/arch/x86/kernel/vsyscall_gtod.c b/arch/x86/kernel/vsyscall_gtod.c
index 91862a4..973dcc4 100644
--- a/arch/x86/kernel/vsyscall_gtod.c
+++ b/arch/x86/kernel/vsyscall_gtod.c
@@ -4,6 +4,7 @@
  *
  *  Modified for x86 32 bit architecture by
  *  Stefani Seibold stef...@seibold.net
+ *  sponsored by Rohde  Schwarz GmbH  Co. KG Munich/Germany
  *
  *  Thanks to h...@transmeta.com for some useful hint.
  *  Special thanks to Ingo Molnar for his early experience with
@@ -18,21 +19,22 @@ DEFINE_VVAR(struct vsyscall_gtod_data, vsyscall_gtod_data);
 
 void update_vsyscall_tz(void)
 {
-   vsyscall_gtod_data.sys_tz = sys_tz;
+   vsyscall_gtod_data.tz_minuteswest = sys_tz.tz_minuteswest;
+   vsyscall_gtod_data.tz_dsttime = sys_tz.tz_dsttime;
 }
 
 void update_vsyscall(struct timekeeper *tk)
 {
   

[PATCH v3] mfd: MAX6650/6651 support

2014-02-10 Thread Laszlo Papp
MAX6650/MAX6651 chip is a multi-function device with I2C busses. The
chip includes fan-speed regulators and monitors, GPIO, and alarm.

This patch is an initial release of a MAX6650/6651 MFD driver that
supports to enable the chip with its primary I2C bus that will connect
the hwmon, and then the gpio devices for now.

Signed-off-by: Laszlo Papp lp...@kde.org
---
 drivers/mfd/Kconfig | 11 +
 drivers/mfd/Makefile|  1 +
 drivers/mfd/max665x.c   | 88 +
 include/linux/mfd/max665x-private.h | 42 ++
 4 files changed, 142 insertions(+)
 create mode 100644 drivers/mfd/max665x.c
 create mode 100644 include/linux/mfd/max665x-private.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 49bb445..4ad39f4 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -368,6 +368,17 @@ config MFD_MAX8907
  accessing the device; additional drivers must be enabled in order
  to use the functionality of the device.
 
+config MFD_MAX665X
+   bool Maxim Semiconductor MAX6650/MAX6651 Support
+   select MFD_CORE
+   depends on I2C
+   select REGMAP_I2C
+   help
+ Say yes here to support for Maxim Semiconductor MAX6650/MAX6651. This 
is
+ a fan speed regulator and monitor IC. This driver provides common 
support
+ for accessing the device, additional drivers must be enabled in order 
to
+ use the functionality of the device.
+
 config MFD_MAX8925
bool Maxim Semiconductor MAX8925 PMIC Support
depends on I2C=y
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5aea5ef..63668c5 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -111,6 +111,7 @@ obj-$(CONFIG_MFD_DA9055)+= da9055.o
 da9063-objs:= da9063-core.o da9063-irq.o da9063-i2c.o
 obj-$(CONFIG_MFD_DA9063)   += da9063.o
 
+obj-$(CONFIG_MFD_MAX665X)  += max665x.o
 obj-$(CONFIG_MFD_MAX14577) += max14577.o
 obj-$(CONFIG_MFD_MAX77686) += max77686.o max77686-irq.o
 obj-$(CONFIG_MFD_MAX77693) += max77693.o max77693-irq.o
diff --git a/drivers/mfd/max665x.c b/drivers/mfd/max665x.c
new file mode 100644
index 000..cd39b5a
--- /dev/null
+++ b/drivers/mfd/max665x.c
@@ -0,0 +1,88 @@
+/*
+ * Device access for MAX6650-MAX6651
+ *
+ * Copyright(c) 2013 Polatis Ltd.
+ *
+ * Author: Laszlo Papp laszlo.p...@polatis.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#include linux/device.h
+#include linux/mfd/core.h
+#include linux/module.h
+#include linux/i2c.h
+
+#include linux/mfd/max665x-private.h
+
+static struct mfd_cell max665x_devs[] = {
+   { .name = max6651-gpio, },
+   { .name = max6650, }, /* hwmon driver */
+   {},
+};
+
+const struct regmap_config max665x_regmap_config = {
+   .reg_bits = 5,
+};
+
+static int max665x_probe(struct i2c_client *i2c,
+   const struct i2c_device_id *id)
+{
+   struct max665x_dev *max665x;
+   int ret;
+
+   max665x = devm_kzalloc(i2c-dev, sizeof(*max665x), GFP_KERNEL);
+   if (!max665x)
+   return -ENOMEM;
+
+   i2c_set_clientdata(i2c, max665x);
+   max665x-dev = i2c-dev;
+   max665x-i2c = i2c;
+   max665x-map = devm_regmap_init_i2c(i2c, max665x_regmap_config);
+
+   mutex_init(max665x-iolock);
+
+   ret = mfd_add_devices(max665x-dev, -1, max665x_devs,
+   ARRAY_SIZE(max665x_devs),
+   NULL, 0, NULL);
+
+   if (ret  0)
+   dev_err(max665x-dev, failed to register child devices\n);
+
+   return ret;
+}
+
+static int max665x_remove(struct i2c_client *i2c)
+{
+   struct max665x_dev *max665x = i2c_get_clientdata(i2c);
+
+   mfd_remove_devices(max665x-dev);
+
+   return 0;
+}
+
+static const struct i2c_device_id max665x_id[] = {
+   { max6650, TYPE_MAX6650 },
+   { max6651, TYPE_MAX6651 },
+   {},
+};
+MODULE_DEVICE_TABLE(i2c, max665x_id);
+
+static struct i2c_driver max665x_driver = {
+   .driver = {
+   .name = max665x,
+   .owner = THIS_MODULE,
+   },
+   .probe = max665x_probe,
+   .remove = max665x_remove,
+   .id_table = max665x_id,
+};
+
+module_i2c_driver(max665x_driver);
+
+MODULE_AUTHOR(Laszlo Papp laszlo.p...@polatis.com);
+MODULE_DESCRIPTION(MAX6650-MAX6651 MFD);
+MODULE_LICENSE(GPL);
diff --git a/include/linux/mfd/max665x-private.h 
b/include/linux/mfd/max665x-private.h
new file mode 100644
index 000..eed5fdf
--- /dev/null
+++ b/include/linux/mfd/max665x-private.h
@@ -0,0 +1,42 @@
+/*
+ * max665x-private.h - Driver for the Maxim 6650/6651
+ *
+ * Copyright 2013 Polatis Ltd.
+ *
+ * Author: Laszlo Papp laszlo.p...@polatis.com
+ *
+ * This 

Re: [PATCH] ASoC: fsl-esai: fix ESAI TDM slot setting

2014-02-10 Thread Nicolin Chen
On Mon, Feb 10, 2014 at 02:47:17PM +0800, Xiubo Li wrote:
 Cc: Nicolin Chen guangyu.c...@freescale.com
 Signed-off-by: Xiubo Li li.xi...@freescale.com
 ---
  sound/soc/fsl/fsl_esai.c | 4 ++--
  sound/soc/fsl/fsl_esai.h | 2 +-
  2 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
 index d0c72ed..c84026c 100644
 --- a/sound/soc/fsl/fsl_esai.c
 +++ b/sound/soc/fsl/fsl_esai.c
 @@ -326,7 +326,7 @@ static int fsl_esai_set_dai_tdm_slot(struct snd_soc_dai 
 *dai, u32 tx_mask,
   regmap_update_bits(esai_priv-regmap, REG_ESAI_TSMA,
  ESAI_xSMA_xS_MASK, ESAI_xSMA_xS(tx_mask));
   regmap_update_bits(esai_priv-regmap, REG_ESAI_TSMB,
 -ESAI_xSMA_xS_MASK, ESAI_xSMB_xS(tx_mask));
 +ESAI_xSMB_xS_MASK, ESAI_xSMB_xS(tx_mask));
  
   regmap_update_bits(esai_priv-regmap, REG_ESAI_RCCR,
  ESAI_xCCR_xDC_MASK, ESAI_xCCR_xDC(slots));
 @@ -334,7 +334,7 @@ static int fsl_esai_set_dai_tdm_slot(struct snd_soc_dai 
 *dai, u32 tx_mask,
   regmap_update_bits(esai_priv-regmap, REG_ESAI_RSMA,
  ESAI_xSMA_xS_MASK, ESAI_xSMA_xS(rx_mask));
   regmap_update_bits(esai_priv-regmap, REG_ESAI_RSMB,
 -ESAI_xSMA_xS_MASK, ESAI_xSMB_xS(rx_mask));
 +ESAI_xSMB_xS_MASK, ESAI_xSMB_xS(rx_mask));
  
   esai_priv-slot_width = slot_width;
  
 diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h
 index 9c9f957..75e1403 100644
 --- a/sound/soc/fsl/fsl_esai.h
 +++ b/sound/soc/fsl/fsl_esai.h
 @@ -322,7 +322,7 @@
  #define ESAI_xSMB_xS_SHIFT   0
  #define ESAI_xSMB_xS_WIDTH   16
  #define ESAI_xSMB_xS_MASK(((1  ESAI_xSMB_xS_WIDTH) - 1)  
 ESAI_xSMB_xS_SHIFT)
 -#define ESAI_xSMB_xS(v)  (((v)  ESAI_xSMA_xS_WIDTH)  
 ESAI_xSMA_xS_MASK)
 +#define ESAI_xSMB_xS(v)  (((v)  ESAI_xSMA_xS_WIDTH)  
 ESAI_xSMB_xS_MASK)

It should use ESAI_xSMB_xS_WIDTH.

Otherwise, it looks fine. Thank you.

Acked-by: Nicolin Chen guangyu.c...@freescale.com

---
  
  /* Port C Direction Register -- REG_ESAI_PRRC 0xF8 */
  #define ESAI_PRRC_PDC_SHIFT  0
 -- 
 1.8.4
 
 


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Re: [PATCHSET 00/21] perf tools: Add support to accumulate hist periods (v8)

2014-02-10 Thread Jiri Olsa
On Fri, Feb 07, 2014 at 10:35:02AM +0900, Namhyung Kim wrote:

SNIP

 
 
 Namhyung Kim (21):
   perf tools: Introduce struct hist_entry_iter
   perf hists: Add support for accumulated stat of hist entry
   perf hists: Check if accumulated when adding a hist entry
   perf hists: Accumulate hist entry stat based on the callchain
   perf tools: Update cpumode for each cumulative entry
   perf report: Cache cumulative callchains
   perf callchain: Add callchain_cursor_snapshot()
   perf tools: Save callchain info for each cumulative entry
   perf hists: Sort hist entries by accumulated period
   perf ui/hist: Add support to accumulated hist stat
   perf ui/browser: Add support to accumulated hist stat
   perf ui/gtk: Add support to accumulated hist stat
   perf tools: Apply percent-limit to cumulative percentage
   perf tools: Add more hpp helper functions
   perf report: Add --children option
   perf report: Add report.children config option
   perf tools: Add callback function to hist_entry_iter
   perf top: Convert to hist_entry_iter
   perf top: Add --children option
   perf top: Add top.children config option
   perf tools: Enable --children option by default

heya, I wasn't CC-ed ;-)

Acked-by: Jiri Olsa jo...@redhat.com

for the patchset

thanks,
jirka
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Support for automatic screen rotation on Lenovo Yogo 2 Pro

2014-02-10 Thread Nico Schottelius
Good morning hackers,

The screen on the Lenovo Yoga 2 Pro can rotate up to 180 degrees and it would 
be awesome
if we could rotate it automatically under Linux. xrandr can already rotate it, 
what is missing 
is an event that we can trigger on. 

Is there any way to find out 
a) if the screen is opened for more than 90 degrees?
a) what the opening angle of the screen is?

I guess there must be support somewhere, as it is supposed to happen
automatically under windows. [1]

I am still facing the problem that there are no keycodes present for
some keys [0] - if you have a hint for this problem, I am wondering 
if anyone has a pointer on how to solve one of these issues?

Cheers,

Nico

[0] https://lkml.org/lkml/2014/1/28/251
[1] I have never tried windows on this device, but from the forums and
marketing I assume it works trigger based on the opening angle.



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Re: [PATCH] pinctrl: capri: Make capri_pinctrl_probe static

2014-02-10 Thread Linus Walleij
On Fri, Feb 7, 2014 at 8:01 PM, Christian Daudt b...@fixthebug.org wrote:
 On Fri, Feb 7, 2014 at 10:35 AM, Christian Daudt b...@fixthebug.org wrote:
 On Thu, Feb 6, 2014 at 1:21 AM, Linus Walleij linus.wall...@linaro.org 
 wrote:
 On Tue, Feb 4, 2014 at 9:13 PM, Sherman Yin s...@broadcom.com wrote:
 On 14-02-04 12:49 AM, Axel Lin wrote:

 Signed-off-by: Axel Lin axel@ingics.com

 Note that this will collide with the capri-bcm281xx renaming patches.

 Linus, Christian, are those patches going in soon?

 I have ACKed it, expecting it to be funneled through ARM SoC.

 Yours,
 Linus Walleij

 Linus, just to confirm. the bcm_defconfig portion is the only one
 going through armsoc right ?

  thanks,
csd

 Linus,
  Sorry for the noise. I just had a chat with Olof on irc and it is
 probably best to revert to v1 and push a single patch through, either
 through pinctrl or armsoc. If you have further patches for 3.14 could
 you pull this one in along with it ? If not then I'll ask Olof to pull
 it in instead.

Not quite following, I have ACKed the patches, so please push
whatever changes you need done through ARM SoC as this is
basically a device tree problem.

Yours,
Linus Walleij
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Re: [RFC PATCH V5] mm readahead: Fix readahead fail for no local memory and limit readahead pages

2014-02-10 Thread Raghavendra K T

On 02/08/2014 02:11 AM, David Rientjes wrote:

On Fri, 7 Feb 2014, Raghavendra K T wrote:

3) Change the readahead into remote memory part of the documentation
which is misleading.

( I feel no need to add numa_mem_id() since we would specifically limit
the readahead with MAX_REMOTE_READAHEAD in memoryless cpu cases).



I don't understand what you're saying, numa_mem_id() is local memory to
current's cpu.  When a node consists only of cpus and not memory it is not
true that all memory is then considered remote, you won't find that in any
specification that defines memory affinity including the ACPI spec.  I can
trivially define all cpus on my system to be on memoryless nodes and
having that affect readahead behavior when, in fact, there is affinity
would be ridiculous.


As you rightly pointed , I 'll drop remote memory term and use
something like  :

* Ensure readahead success on a memoryless node cpu. But we limit
 * the readahead to 4k pages to avoid trashing page cache. ..

Regarding ACCESS_ONCE, since we will have to add
inside the function and still there is nothing that could prevent us
getting run on different cpu with a different node (as Andrew ponted), I 
have not included in current patch that I am posting.
Moreover this case is hopefully not fatal since it is just a hint for 
readahead we can do.


So there are many possible implementation:
(1) use numa_mem_id(), apply freepage limit  and use 4k page limit for 
all case

(Jan had reservation about this case)

(2)for normal case:use free memory calculation and do not apply 4k
limit (no change).
   for memoryless cpu case:  use numa_mem_id for more accurate
calculation of limit and also apply 4k limit.

(3) for normal case:   use free memory calculation and do not apply 4k
limit (no change).
for memoryless case: apply 4k page limit

(4) use numa_mem_id() and apply only free page limit..

So, I ll be resending the patch with changelog and comment changes
based on your and Andrew's feedback (type (3) implementation).




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Re: 3.12: ethernet controller missing after resuming from suspend to RAM

2014-02-10 Thread Francis Moreau
On 02/09/2014 07:44 PM, Bastien Traverse wrote:
 Le 07/02/2014 02:19, Rafael J. Wysocki a écrit :
 Please send the output of lspci -vv right before suspend and right after
 the subsequent resume as attachments.
 
 You'll find them attached, but I got a strange error when I wanted to
 run it as root:
 $ sudo lspci -vv  lspci_vv_before
 pcilib: sysfs_read_vpd: read failed: Connection timed out
 $ sudo -i
 # lspci -vv
 pcilib: sysfs_read_vpd: read failed: Connection timed out
 
 So I only got the unpriviledge output.
 
 Some complementary lines from my journal:
 
 kernel: r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
 kernel: r8169 :03:00.2: can't disable ASPM; OS doesn't have ASPM control
 kernel: pcieport :00:1c.3: driver skip pci_set_master, fix it!
 kernel: r8169 :03:00.2: irq 44 for MSI/MSI-X
 kernel: r8169 :03:00.2 eth0: RTL8411 at 0xc90016ed4000,
 00:90:f5:d7:34:53, XID 08800800 IRQ 44
 kernel: r8169 :03:00.2 eth0: jumbo features [frames: 9200 bytes, tx
 checksumming: ko]
 kernel: rtsx_pci :03:00.0: irq 45 for MSI/MSI-X
 kernel: rtsx_pci :03:00.0: rtsx_pci_acquire_irq: pcr-msi_en = 1,
 pci-irq = 45
 ...
 
 And one I thought of interest:
 
 kernel: rtsx_pci :03:00.0: vpd r/w failed.  This is likely a
 firmware bug on this device.  Contact the card vendor for a firmware update.
 
 That came three times before suspend.
 
 Only two lines about hotplug, none special.
 
 Stripped journal attached for the suspend cycle.
 
 
 Le 07/02/2014 08:29, Francis Moreau a écrit :
 yeah, but calling this fast resolution is quite incorrect.

 I don't blame anyone for this and I'm quite happy that a workaround has
 been found at last but calling this fast resolution is a bit funny
 compare to the PITA it was to debug this.
 
 Sorry, I didn't mean to underestimate the amount of work you put in that
 bug resolution (actually it was the first time I heard of kernel
 bisection and was pretty impressed by how you led it).

No problem Bastien and don't be impressed by this :). Bisection thing is
a mechanical work but can be useful sometimes when we, users, are lost
and have no clue on what's going on.

The real PITA in that case was to reboot more than 10 times the system
in order to test each suspicious commits on a live system.

Anyways, good luck, all my hopes are on you now :)

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RE: [PATCH] ASoC: fsl-esai: fix ESAI TDM slot setting

2014-02-10 Thread li.xi...@freescale.com

  diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h
  index 9c9f957..75e1403 100644
  --- a/sound/soc/fsl/fsl_esai.h
  +++ b/sound/soc/fsl/fsl_esai.h
  @@ -322,7 +322,7 @@
   #define ESAI_xSMB_xS_SHIFT 0
   #define ESAI_xSMB_xS_WIDTH 16
   #define ESAI_xSMB_xS_MASK  (((1  ESAI_xSMB_xS_WIDTH) - 1) 
 ESAI_xSMB_xS_SHIFT)
  -#define ESAI_xSMB_xS(v)(((v)  ESAI_xSMA_xS_WIDTH) 
 ESAI_xSMA_xS_MASK)
  +#define ESAI_xSMB_xS(v)(((v)  ESAI_xSMA_xS_WIDTH) 
 ESAI_xSMB_xS_MASK)
 
 It should use ESAI_xSMB_xS_WIDTH.


Well, the ESAI_xSMB_xS_WIDTH is 0x0010(16), and ESAI_xSMB_xS_MASK will
be 0x.



Thanks,

--
Best Regards,
Xiubo
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Re: [PATCH 7/9] mm: Mark functions as static in page_cgroup.c

2014-02-10 Thread Michal Hocko
On Fri 07-02-14 17:41:34, Rashika Kheria wrote:
 Mark functions as static in page_cgroup.c because they are not used
 outside this file.
 
 This eliminates the following warning in mm/page_cgroup.c:
 mm/page_cgroup.c:177:6: warning: no previous prototype for 
 ‘__free_page_cgroup’ [-Wmissing-prototypes]
 mm/page_cgroup.c:190:15: warning: no previous prototype for 
 ‘online_page_cgroup’ [-Wmissing-prototypes]
 mm/page_cgroup.c:225:15: warning: no previous prototype for 
 ‘offline_page_cgroup’ [-Wmissing-prototypes]
 
 Signed-off-by: Rashika Kheria rashika.khe...@gmail.com
 Reviewed-by: Josh Triplett j...@joshtriplett.org

Acked-by: Michal Hocko mho...@suse.cz

 ---
  mm/page_cgroup.c |   12 ++--
  1 file changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/mm/page_cgroup.c b/mm/page_cgroup.c
 index 6d757e3a..6ec349c 100644
 --- a/mm/page_cgroup.c
 +++ b/mm/page_cgroup.c
 @@ -174,7 +174,7 @@ static void free_page_cgroup(void *addr)
   }
  }
  
 -void __free_page_cgroup(unsigned long pfn)
 +static void __free_page_cgroup(unsigned long pfn)
  {
   struct mem_section *ms;
   struct page_cgroup *base;
 @@ -187,9 +187,9 @@ void __free_page_cgroup(unsigned long pfn)
   ms-page_cgroup = NULL;
  }
  
 -int __meminit online_page_cgroup(unsigned long start_pfn,
 - unsigned long nr_pages,
 - int nid)
 +static int __meminit online_page_cgroup(unsigned long start_pfn,
 + unsigned long nr_pages,
 + int nid)
  {
   unsigned long start, end, pfn;
   int fail = 0;
 @@ -222,8 +222,8 @@ int __meminit online_page_cgroup(unsigned long start_pfn,
   return -ENOMEM;
  }
  
 -int __meminit offline_page_cgroup(unsigned long start_pfn,
 - unsigned long nr_pages, int nid)
 +static int __meminit offline_page_cgroup(unsigned long start_pfn,
 + unsigned long nr_pages, int nid)
  {
   unsigned long start, end, pfn;
  
 -- 
 1.7.9.5
 
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-- 
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SUSE Labs
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Re: [RFC PATCH V5 RESEND] mm readahead: Fix readahead fail for no local memory and limit readahead pages

2014-02-10 Thread Raghavendra K T
* Andrew Morton a...@linux-foundation.org [2014-02-06 14:51:05]:

 On Wed, 22 Jan 2014 16:23:45 +0530 Raghavendra K T 
 raghavendra...@linux.vnet.ibm.com wrote:
 
 
 Looks reasonable to me.  Please send along a fixed up changelog.
 

Hi Andrew,
Sorry took some time to get and measure benefit on the memoryless system.
Resending patch with changelog and comment changes based on your and
David's suggestion.

8--- 
From fc8186b5c33a34810a34f5aadd50082463117636 Mon Sep 17 00:00:00 2001
From: Raghavendra K T raghavendra...@linux.vnet.ibm.com
Date: Mon, 25 Nov 2013 14:29:03 +0530
Subject: [RFC PATCH V5 RESEND] mm readahead: Fix readahead fail for no local
 memory and limit readahead pages

Currently max_sane_readahead() returns zero on the cpu having no local memory 
node
which leads to readahead failure. Fix the readahead failure by returning
minimum of (requested pages, 4k). Users running application a on memory less cpu
which needs readahead such as streaming application see considerable boost in 
the
performance.

Result:
fadvise experiment with FADV_WILLNEED on a PPC machine having memoryless CPU
with 1GB testfile ( 12 iterations) yielded 46.66% improvement

kernel AvgStddev
base_ppc 11.946833 1.34%
patched_ppc   6.37208331.80%

Below result proves that there is no impact on the normal NUMA cases w/ patch.

fadvise experiment with FADV_WILLNEED on a x240 machine with 1GB testfile
32GB* 4G RAM  numa machine ( 12 iterations) yielded

Kernel Avg  Stddev
base  7.29631.10 %
patched   7.29721.18 %

Reviewed-by: Jan Kara j...@suse.cz
Signed-off-by: Raghavendra K T raghavendra...@linux.vnet.ibm.com
---
 
 Changes in V5:
 - Updated the changelog with benefit seen (Andrew)
 - Discard remote memroy term in comment since memoryless CPU
   will have affinity to numa_mem_id() (David)
 - Drop the 4k limit for normal readahead. (Jan Kara)

 Changes in V4:
 - Check for total node memory to decide whether we don't
   have local memory (jan Kara)
 - Add 4k page limit on readahead for normal and remote readahead (Linus)
   (Linus suggestion was 16MB limit).

 Changes in V3:
 - Drop iterating over numa nodes that calculates total free pages (Linus)

 Agree that we do not have control on allocation for readahead on a
 particular numa node and hence for remote readahead we can not further
 sanitize based on potential free pages of that node. and also we do
 not want to itererate through all nodes to find total free pages.

 Suggestions and comments welcome
 mm/readahead.c | 21 +++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/mm/readahead.c b/mm/readahead.c
index 0de2360..4c7343b 100644
--- a/mm/readahead.c
+++ b/mm/readahead.c
@@ -233,14 +233,31 @@ int force_page_cache_readahead(struct address_space 
*mapping, struct file *filp,
return 0;
 }
 
+#define MAX_REMOTE_READAHEAD   4096UL
 /*
  * Given a desired number of PAGE_CACHE_SIZE readahead pages, return a
  * sensible upper limit.
  */
 unsigned long max_sane_readahead(unsigned long nr)
 {
-   return min(nr, (node_page_state(numa_node_id(), NR_INACTIVE_FILE)
-   + node_page_state(numa_node_id(), NR_FREE_PAGES)) / 2);
+   unsigned long local_free_page;
+   int nid;
+
+   nid = numa_node_id();
+   if (node_present_pages(nid)) {
+   /*
+* We sanitize readahead size depending on free memory in
+* the local node.
+*/
+   local_free_page = node_page_state(nid, NR_INACTIVE_FILE)
++ node_page_state(nid, NR_FREE_PAGES);
+   return min(nr, local_free_page / 2);
+   }
+   /*
+* Ensure readahead success on a memoryless node cpu. But we limit
+* the readahead to 4k pages to avoid trashing page cache.
+*/
+   return min(nr, MAX_REMOTE_READAHEAD);
 }
 
 /*
-- 
1.7.11.7

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[PATCH 2/2] genirq: Fix one typo chasnge

2014-02-10 Thread Chuansheng Liu
Change the comment chasnge to change.

Signed-off-by: Chuansheng Liu chuansheng@intel.com
---
 kernel/irq/manage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 481a13c..4802295 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -727,7 +727,7 @@ out_unlock:
 
 #ifdef CONFIG_SMP
 /*
- * Check whether we need to chasnge the affinity of the interrupt thread.
+ * Check whether we need to change the affinity of the interrupt thread.
  */
 static void
 irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
-- 
1.9.rc0

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RE: [PATCH] ASoC: fsl-esai: fix ESAI TDM slot setting

2014-02-10 Thread li.xi...@freescale.com
Sorry, my misunderstanding about your comment.

Please ignore the last mail.

I will send v2 of this patch.

Thanks very much.

   diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h
   index 9c9f957..75e1403 100644
   --- a/sound/soc/fsl/fsl_esai.h
   +++ b/sound/soc/fsl/fsl_esai.h
   @@ -322,7 +322,7 @@
#define ESAI_xSMB_xS_SHIFT   0
#define ESAI_xSMB_xS_WIDTH   16
#define ESAI_xSMB_xS_MASK(((1  ESAI_xSMB_xS_WIDTH) - 1) 
  ESAI_xSMB_xS_SHIFT)
   -#define ESAI_xSMB_xS(v)  (((v)  ESAI_xSMA_xS_WIDTH) 
  ESAI_xSMA_xS_MASK)
   +#define ESAI_xSMB_xS(v)  (((v)  ESAI_xSMA_xS_WIDTH) 
  ESAI_xSMB_xS_MASK)
 
  It should use ESAI_xSMB_xS_WIDTH.
 
 
 Well, the ESAI_xSMB_xS_WIDTH is 0x0010(16), and ESAI_xSMB_xS_MASK will
 be 0x.
 
 
 
 Thanks,
 
 --
 Best Regards,
 Xiubo
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[PATCH 1/2] genirq: Fix the possible synchronize_irq() wait-forever

2014-02-10 Thread Chuansheng Liu
There is below race between irq handler and irq thread:
irq handler irq thread

irq_wake_thread()   irq_thread()
  set bit RUNTHREAD
  ...clear bit RUNTHREAD
 thread_fn()
 [A]test_and_decrease
   thread_active
  [B]increase thread_active

If action A is before action B, after that the thread_active
will be always  0, and for synchronize_irq() calling, which
will be waiting there forever.

Here put the increasing thread-active before setting bit
RUNTHREAD, which can resolve such race.

Signed-off-by: xiaoming wang xiaoming.w...@intel.com
Signed-off-by: Chuansheng Liu chuansheng@intel.com
---
 kernel/irq/handle.c | 21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 131ca17..5f9fbb7 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -65,7 +65,7 @@ static void irq_wake_thread(struct irq_desc *desc, struct 
irqaction *action)
 * Wake up the handler thread for this action. If the
 * RUNTHREAD bit is already set, nothing to do.
 */
-   if (test_and_set_bit(IRQTF_RUNTHREAD, action-thread_flags))
+   if (test_bit(IRQTF_RUNTHREAD, action-thread_flags))
return;
 
/*
@@ -126,6 +126,25 @@ static void irq_wake_thread(struct irq_desc *desc, struct 
irqaction *action)
 */
atomic_inc(desc-threads_active);
 
+   /*
+* set the RUNTHREAD bit after increasing the threads_active,
+* it can avoid the below race:
+* irq handler  irq thread in case it is in
+*running state
+*
+*  set RUNTHREAD bit
+*  clear the RUNTHREAD bit
+*...   thread_fn()
+*
+*  due to threads_active==0,
+*  no waking up wait_for_threads
+*
+* threads_active ++
+* After that, the threads_active will be always  0, which
+* will block the synchronize_irq().
+*/
+   set_bit(IRQTF_RUNTHREAD, action-thread_flags);
+
wake_up_process(action-thread);
 }
 
-- 
1.9.rc0

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Re: [PATCH v3] phy: Add new Exynos5 USB 3.0 PHY driver

2014-02-10 Thread Kishon Vijay Abraham I
Hi,

On Thursday 06 February 2014 07:37 PM, Tomasz Figa wrote:
 Hi Vivek,
 
 This patch is just adding the PHY driver. I would also like to look at some
 users of it, to see how this works when put together.
 
 For now, please see my comments inline.
 
 On 20.01.2014 14:42, Vivek Gautam wrote:
 Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
 The new driver uses the generic PHY framework and will interact
 with DWC3 controller present on Exynos5 series of SoCs.
 Thereby, removing old phy-samsung-usb3 driver and related code
 used untill now which was based on usb/phy framework.

 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 ---

 Changes from v2:
 1) Added support for multiple PHYs (UTMI+ and PIPE3) and
 related changes in the driver structuring.
 
 I'm a bit skeptical about this separation. Can the PHY operate with just the
 UTMI+ or PIPE3 part enabled alone without the other? Can any PHY consumer
 operate this way?

Theoretically yes. If the USB controller should operate only in high-speed
mode, the PIPE3 part is not required at all. However for super speed mode both
PIPE3 part and UTMI part should be enabled. Maybe it doesn't work that way with
all SoCs because of some HW bug.
 
 Introducing separation of something that can't exist alone doesn't add any
 value, but instead makes things more difficult to work with. Of course, it's

IMO separating it into different parts adds more clarity to the driver.

Thanks
Kishon
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Re: [PATCH] net: rfkill-regulator: Add devicetree support.

2014-02-10 Thread Johannes Berg
On Fri, 2014-02-07 at 20:48 +0100, Marek Belisko wrote:

 +#define RFKILL_TYPE_ALL  (0)
 +#define RFKILL_TYPE_WLAN (1)
 +#define RFKILL_TYPE_BLUETOOTH(2)
 +#define RFKILL_TYPE_UWB  (3)
 +#define RFKILL_TYPE_WIMAX(4)
 +#define RFKILL_TYPE_WWAN (5)
 +#define RFKILL_TYPE_GPS  (6)
 +#define RFKILL_TYPE_FM   (7)
 +#define RFKILL_TYPE_NFC  (8)

This seems like a bad idea since there's an enum elsewhere in userspace
API already.

johannes

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Re: [PATCH] ASoC: fsl-esai: fix ESAI TDM slot setting

2014-02-10 Thread Nicolin Chen
On Mon, Feb 10, 2014 at 04:24:43PM +0800, Xiubo Li-B47053 wrote:
 Sorry, my misunderstanding about your comment.
 
 Please ignore the last mail.
 
 I will send v2 of this patch.

No, you don't need to.

Just rechecked it with RM. Your patch is correct.

I forgot I used A's WIDTH intentionally at the first place.

TSMA- [15:0]
TSMB- [31:16] - higher 16bits.

Thus its shift should be corresponding to A's WIDTH.

The patch is fine. Acked.

Thank you.

diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h
index 9c9f957..75e1403 100644
--- a/sound/soc/fsl/fsl_esai.h
+++ b/sound/soc/fsl/fsl_esai.h
@@ -322,7 +322,7 @@
 #define ESAI_xSMB_xS_SHIFT 0
 #define ESAI_xSMB_xS_WIDTH 16
 #define ESAI_xSMB_xS_MASK  (((1  ESAI_xSMB_xS_WIDTH) - 1) 
   ESAI_xSMB_xS_SHIFT)
-#define ESAI_xSMB_xS(v)(((v)  ESAI_xSMA_xS_WIDTH) 
   ESAI_xSMA_xS_MASK)
+#define ESAI_xSMB_xS(v)(((v)  ESAI_xSMA_xS_WIDTH) 
   ESAI_xSMB_xS_MASK)
  
   It should use ESAI_xSMB_xS_WIDTH.
  
  
  Well, the ESAI_xSMB_xS_WIDTH is 0x0010(16), and ESAI_xSMB_xS_MASK will
  be 0x.
  
  
  
  Thanks,
  
  --
  Best Regards,
  Xiubo


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RE: [PATCH 0/5] Enabling the asynchronous threads for other phases

2014-02-10 Thread Liu, Chuansheng
Hello Rafael,

 -Original Message-
 From: Rafael J. Wysocki [mailto:r...@rjwysocki.net]
 Sent: Thursday, February 06, 2014 5:53 AM
 To: Liu, Chuansheng
 Cc: gre...@linuxfoundation.org; pa...@ucw.cz; Brown, Len;
 linux...@vger.kernel.org; linux-kernel@vger.kernel.org; Li, Zhuangzhi
 Subject: Re: [PATCH 0/5] Enabling the asynchronous threads for other phases
 
 On Monday, January 20, 2014 04:44:34 PM Liu, Chuansheng wrote:
  Hello,
 
  This patch series are for enabling the asynchronous threads for the phases
  resume_noirq, resume_early, suspend_noirq and suspend_late.
 
  Just like commit 5af84b82701a and 97df8c12995, with async threads it will
  reduce the system suspending and resuming time significantly.
 
  With these patches, in my test platform, it saved 80% time in resume_noirq
  phase.
 
  Has done the suspend-resume stress test for a long time, please help to
  review.
 
  Best Regards,
 
  [PATCH 1/5] PM: Adding two flags for async suspend_noirq and
  [PATCH 2/5] PM: Enabling the asynchronous threads for resume_noirq
  [PATCH 3/5] PM: Enabling the asyncronous threads for resume_early
  [PATCH 4/5] PM: Enabling the asyncronous threads for suspend_noirq
  [PATCH 5/5] PM: Enabling the asyncronous threads for suspend_late
 
 I've applied this to the bleeding-edge branch of the linux-pm.git tree, with
 minor changes related to coding style, white space etc.
Thanks your help.

 
 Can you please verify that the bleeding-edge branch works for you as
 expected?
I have picked them from your bleeding-edge branch and has done the
suspend-resume stress test for about 200 times and 3 hours,
It is still working well.

Best Regards
Chuansheng Liu
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0��h���i

Re: [PATCH 09/14] perf, x86: Save/resotre LBR stack during context switch

2014-02-10 Thread Yan, Zheng
On 02/06/2014 11:09 PM, Stephane Eranian wrote:
 On Wed, Feb 5, 2014 at 6:45 PM, Stephane Eranian eran...@google.com wrote:
 On Fri, Jan 3, 2014 at 6:48 AM, Yan, Zheng zheng.z@intel.com wrote:
 When the LBR call stack is enabled, it is necessary to save/restore
 the LBR stack on context switch. The solution is saving/restoring
 the LBR stack to/from task's perf event context.

 The LBR stack is saved/restored only when there are events that use
 the LBR call stack. If no event uses LBR call stack, the LBR stack
 is reset when task is scheduled in.

 Signed-off-by: Yan, Zheng zheng.z@intel.com
 ---
  arch/x86/kernel/cpu/perf_event_intel_lbr.c | 80 
 --
  1 file changed, 66 insertions(+), 14 deletions(-)

 diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c 
 b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
 index 2137a9f..51e1842 100644
 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
 +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
 @@ -187,18 +187,82 @@ void intel_pmu_lbr_reset(void)
 intel_pmu_lbr_reset_64();
  }

 +/*
 + * TOS = most recently recorded branch
 + */
 +static inline u64 intel_pmu_lbr_tos(void)
 +{
 +   u64 tos;
 +   rdmsrl(x86_pmu.lbr_tos, tos);
 +   return tos;
 +}
 +
 +enum {
 +   LBR_UNINIT,
 +   LBR_NONE,
 +   LBR_VALID,
 +};
 +
 I don't see where the x86_perf_task_context struct gets initialized with
 your task_ctx_data/task_ctx_size mechanism. You are relying on 0
 as a valid default value. But if later more fields are needed and they need
 non-zero init values, it will be easy to forget.

 So I think you need to provide a callback from alloc_perf_context().
 Should have mentioned that in Patch 05/14.

 +static void __intel_pmu_lbr_restore(struct x86_perf_task_context *task_ctx)
 +{
 +   int i;
 +   unsigned lbr_idx, mask = x86_pmu.lbr_nr - 1;
 +   u64 tos = intel_pmu_lbr_tos();
 +
 +   for (i = 0; i  x86_pmu.lbr_nr; i++) {
 +   lbr_idx = (tos - i)  mask;
 +   wrmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx-lbr_from[i]);
 +   wrmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx-lbr_to[i]);
 +   }
 +   task_ctx-lbr_stack_state = LBR_NONE;
 +}
 +
 +static void __intel_pmu_lbr_save(struct x86_perf_task_context *task_ctx)
 +{
 +   int i;
 +   unsigned lbr_idx, mask = x86_pmu.lbr_nr - 1;
 +   u64 tos = intel_pmu_lbr_tos();
 +
 +   for (i = 0; i  x86_pmu.lbr_nr; i++) {
 +   lbr_idx = (tos - i)  mask;
 +   rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx-lbr_from[i]);
 +   rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx-lbr_to[i]);
 +   }
 +   task_ctx-lbr_stack_state = LBR_VALID;
 +}
 +
 +
  void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool 
 sched_in)
  {
 +   struct cpu_hw_events *cpuc;
 +   struct x86_perf_task_context *task_ctx;
 +
 if (!x86_pmu.lbr_nr)
 return;

 +   cpuc = __get_cpu_var(cpu_hw_events);
 +   task_ctx = ctx ? ctx-task_ctx_data : NULL;
 +
 +
 /*
  * It is necessary to flush the stack on context switch. This 
 happens
  * when the branch stack does not tag its entries with the pid of 
 the
  * current task.
  */
 -   if (sched_in)
 -   intel_pmu_lbr_reset();
 +   if (sched_in) {
 +   if (!task_ctx ||
 +   !task_ctx-lbr_callstack_users ||
 +   task_ctx-lbr_stack_state != LBR_VALID)
 +   intel_pmu_lbr_reset();
 +   else
 +   __intel_pmu_lbr_restore(task_ctx);
 +   } else if (task_ctx) {
 +   if (task_ctx-lbr_callstack_users 
 +   task_ctx-lbr_stack_state != LBR_UNINIT)
 +   __intel_pmu_lbr_save(task_ctx);
 +   else
 +   task_ctx-lbr_stack_state = LBR_NONE;
 +   }
  }

 There ought to be a better way of structuring this if/else. It is
 ugly.

 Second thought on this. I am not sure I understand why the
 test has to be so complex including on the save() side.
 
 if (sched_in) {
  if (task_ctx  lbr_callstack_users)
   restore()
 else
 reset
 } else { /* sched_out */
  if (task_ctx  lbr_callstack_users)
save()
 }

I think you are right about the save side. But the lbr_state is still needed
by the restore side. Because perf context may have invaild LBR state when task
is being scheduled in. (task is newly created or the callstack feature was not
enabled when the task is scheduled out)

Regards
Yan, Zheng

 If you have lbr_callstack_users, then you need to save/restore.
 Looks like you are trying to prevent from double sched-in or
 double sched-out. Can this happen?
 
 In other words, I am not sure I understand the need for the
 lbr_state here.
 
 
  static inline bool branch_user_callstack(unsigned br_sel)
 @@ -267,18 +331,6 @@ void 

Re: [PATCH 24/28] Remove DEPRECATED

2014-02-10 Thread Geert Uytterhoeven
On Sun, Feb 9, 2014 at 9:21 PM, Richard Weinberger rich...@nod.at wrote:
 Am 09.02.2014 21:15, schrieb Paul Bolle:
 On Sun, 2014-02-09 at 21:04 +0100, Richard Weinberger wrote:
 Am 09.02.2014 20:38, schrieb Paul Bolle:
 But now you've enabled a lot of stuff that, as far as I can tell, could
 not have been built since v2.6.39.

 This is by design. If the code does not build/work it needs to be fixed or 
 removed.

 If that was the design goal of this patch (and similar patches you've
 sent) it would have been proper to at least say a few words along those
 lines in the commit explanation.

 I assumed that every kernel developer is aware of that fact that 
 unreachable/dead code
 should be removed.

Yes, it should be removed.

But that's not what you did. You did the Kconfig-equivalent of removing a
#if 0 in a C source file, which causes havoc.

Gr{oetje,eeting}s,

Geert

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In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say programmer or something like that.
-- Linus Torvalds
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Re: [RFC PATCH] ARM: Add imprecise abort enable/disable macro

2014-02-10 Thread Fabrice Gasnier

On 02/07/2014 06:09 PM, Will Deacon wrote:

On Fri, Feb 07, 2014 at 04:19:15PM +, Fabrice GASNIER wrote:

This patch adds imprecise abort enable/disable macros.
It also enables imprecise aborts when starting kernel.

Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com
---
  arch/arm/include/asm/irqflags.h |   33 +
  arch/arm/kernel/smp.c   |1 +
  arch/arm/kernel/traps.c |4 
  3 files changed, 38 insertions(+)

diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
index 3b763d6..82e3834 100644
--- a/arch/arm/include/asm/irqflags.h
+++ b/arch/arm/include/asm/irqflags.h
@@ -51,6 +51,9 @@ static inline void arch_local_irq_disable(void)
  
  #define local_fiq_enable()  __asm__(cpsie f	@ __stf : : : memory, cc)

  #define local_fiq_disable() __asm__(cpsid f @ __clf : : : memory, 
cc)
+
+#define local_abt_enable()  __asm__(cpsie a  @ __sta : : : memory, 
cc)
+#define local_abt_disable() __asm__(cpsid a  @ __cla : : : memory, 
cc)
  #else
  
  /*

@@ -130,6 +133,36 @@ static inline void arch_local_irq_disable(void)
: memory, cc);  \
})
  
+/*

+ * Enable Aborts
+ */
+#define local_abt_enable() \
+   ({  \
+   unsigned long temp; \
+   __asm__ __volatile__(   \
+   mrs   %0, cpsr@ sta\n   \
+ bic %0, %0, %1\n  \
+ msr cpsr_c, %0\
+   : =r (temp) \
+   : r (PSR_A_BIT) \

Can you use i instead of a register for this constant?

Hi,

Sure, I will change it in a future patch.



+   : memory, cc);  \

You don't need the cc clobber.
That surprises me: I think orr and bic instruction might change N 
and Z bits, depending on the result.

So shouldn't cc be placed here ?
I also see that it is used in local_fiq_enable/disable macros just 
above, that are similar:

#define local_fiq_enable()\
({\
unsigned long temp;\
__asm__ __volatile__(\
mrs%0, cpsr@ stf\n\
bic%0, %0, #64\n\
msrcpsr_c, %0\
: =r (temp)\
:\
: memory, cc);\
})

  #endif
  
  /*

diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index dc894ab..c2093cb 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -377,6 +377,7 @@ asmlinkage void secondary_start_kernel(void)
  
  	local_irq_enable();

local_fiq_enable();
+   local_abt_enable();
  
  	/*

 * OK, it's off to the idle thread for us
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 4636d56..ef15709 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -900,6 +900,10 @@ void __init early_trap_init(void *vectors_base)
  
  	flush_icache_range(vectors, vectors + PAGE_SIZE * 2);

modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
+
+   /* Enable imprecise aborts */
+   local_abt_enable();

Surely we want to enable this as early as possible? Now, putting this into
head.S is ugly, as it duplicating it across all the proc*.S files, so why
not setup_arch?

Sorry, I'm not sure to understand your last comment.
At least, I need it enabled before probing drivers (PCIe bus)
I've added imprecise abort enable code in traps.c, following Russel 
King's advice, please see:

http://archive.arm.linux.org.uk/lurker/message/20140131.170827.d752a1cc.en.html
As abort bit is local to a cpu, i've also added it in smp.c, but this 
may not be the right place ?


Please elaborate,

Thanks,
Fabrice


Will


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Re: [PATCH 24/28] Remove DEPRECATED

2014-02-10 Thread Richard Weinberger
Am 10.02.2014 09:49, schrieb Geert Uytterhoeven:
 On Sun, Feb 9, 2014 at 9:21 PM, Richard Weinberger rich...@nod.at wrote:
 Am 09.02.2014 21:15, schrieb Paul Bolle:
 On Sun, 2014-02-09 at 21:04 +0100, Richard Weinberger wrote:
 Am 09.02.2014 20:38, schrieb Paul Bolle:
 But now you've enabled a lot of stuff that, as far as I can tell, could
 not have been built since v2.6.39.

 This is by design. If the code does not build/work it needs to be fixed or 
 removed.

 If that was the design goal of this patch (and similar patches you've
 sent) it would have been proper to at least say a few words along those
 lines in the commit explanation.

 I assumed that every kernel developer is aware of that fact that 
 unreachable/dead code
 should be removed.
 
 Yes, it should be removed.
 
 But that's not what you did. You did the Kconfig-equivalent of removing a
 #if 0 in a C source file, which causes havoc.

Fair point. I'll remove that code in v2.
Hopefully I can catch all breakage on my testbed as many archs/configs are 
involved.

Thanks,
//richard
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[PATCH V5 4/8] phy: st-miphy-40lp: Add skeleton driver

2014-02-10 Thread Mohit Kumar
From: Pratyush Anand pratyush.an...@st.com

ST miphy-40lp supports PCIe, SATA and Super Speed USB. This driver adds
skeleton support for the same.

This skeleton defines function corresponding to phy ops as well as sleep
pm ops. Any platform using this phy can add its own platform specific
ops(if needed) corresponding to each phy ops.

Phy specific modifications will require phy register space, which is
passed from DT as a resource. Currently only SPEAr1310 and SPEAr1340 are
known user of this phy, which do not need to modify phy registers
normally. Therefore we have not retrieved phy base address from DT and
hence not io-remapped it. However, same can be added in future if
required.

SoC specific modifications should be done in plat specific ops and phy
specific modifications should be done in phy ops itself. As a general
rule, follow the convention of modifying misc reg space in plat ops and
phy reg space in phy ops.

Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar mohit.ku...@st.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Kishon Vijay Abraham I kis...@ti.com
Cc: spear-de...@list.st.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/phy/st-miphy40lp.txt   |  12 ++
 drivers/phy/Kconfig|   6 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-miphy40lp.c| 229 +
 4 files changed, 248 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/st-miphy40lp.txt
 create mode 100644 drivers/phy/phy-miphy40lp.c

diff --git a/Documentation/devicetree/bindings/phy/st-miphy40lp.txt 
b/Documentation/devicetree/bindings/phy/st-miphy40lp.txt
new file mode 100644
index 000..d0c7096
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st-miphy40lp.txt
@@ -0,0 +1,12 @@
+Required properties:
+- compatible : should be st,miphy40lp-phy
+   Other supported soc specific compatible:
+   st,spear1310-miphy
+   st,spear1340-miphy
+- reg : offset and length of the PHY register set.
+- misc: phandle for the syscon node to access misc registers
+- phy-id: Instance id of the phy.
+- #phy-cells : from the generic PHY bindings, must be 1.
+   - 1st cell: phandle to the phy node.
+   - 2nd cell: 0 if phy (in 1st cell) is to be used for SATA, 1 for PCIe
+ and 2 for Super Speed USB.
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index afa2354..2f58993 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -64,4 +64,10 @@ config BCM_KONA_USB2_PHY
help
  Enable this to support the Broadcom Kona USB 2.0 PHY.
 
+config PHY_ST_MIPHY40LP
+   tristate ST MIPHY 40LP driver
+   help
+ Support for ST MIPHY 40LP which can be used for PCIe, SATA and Super 
Speed USB.
+   select GENERIC_PHY
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index b57c253..c061091 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += 
phy-exynos-mipi-video.o
 obj-$(CONFIG_PHY_MVEBU_SATA)   += phy-mvebu-sata.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_TWL4030_USB)  += phy-twl4030-usb.o
+obj-$(CONFIG_PHY_ST_MIPHY40LP) += phy-miphy40lp.o
diff --git a/drivers/phy/phy-miphy40lp.c b/drivers/phy/phy-miphy40lp.c
new file mode 100644
index 000..3a9ada1
--- /dev/null
+++ b/drivers/phy/phy-miphy40lp.c
@@ -0,0 +1,229 @@
+/*
+ * ST MiPHY-40LP PHY driver
+ *
+ * Copyright (C) 2014 ST Microelectronics
+ * Pratyush Anand pratyush.an...@st.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/delay.h
+#include linux/dma-mapping.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of_device.h
+#include linux/phy/phy.h
+#include linux/regmap.h
+
+enum phy_mode {
+   SATA,
+   PCIE,
+   SS_USB,
+};
+
+struct miphy40lp_priv;
+
+/* platform specific function struct */
+struct miphy40lp_plat_ops {
+   int (*plat_init)(struct miphy40lp_priv *priv);
+   int (*plat_exit)(struct miphy40lp_priv *priv);
+   int (*plat_power_off)(struct miphy40lp_priv *priv);
+   int (*plat_power_on)(struct miphy40lp_priv *priv);
+   int (*plat_suspend)(struct miphy40lp_priv *priv);
+   int (*plat_resume)(struct miphy40lp_priv *priv);
+};
+
+struct miphy40lp_priv {
+   /* regmap for any soc specific misc registers */
+   struct regmap   *misc;
+   /* phy struct pointer */
+   struct phy  *phy;
+   /* phy mode: 0 for SATA 1 for PCIe and 2 for SS-USB */
+   enum phy_mode   mode;
+   /* 

[PATCH V5 6/8] phy: st-miphy-40lp: Add SPEAr1310 and SPEAr1340 PCIe phy support

2014-02-10 Thread Mohit Kumar
From: Pratyush Anand pratyush.an...@st.com

SPEAr1310 and SPEAr1340 uses miphy40lp phy for PCIe. This driver adds
support for the same.

Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar mohit.ku...@st.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Kishon Vijay Abraham I kis...@ti.com
Cc: spear-de...@list.st.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
 drivers/phy/phy-miphy40lp.c | 165 
 1 file changed, 165 insertions(+)

diff --git a/drivers/phy/phy-miphy40lp.c b/drivers/phy/phy-miphy40lp.c
index 0ee1972..fe8535a 100644
--- a/drivers/phy/phy-miphy40lp.c
+++ b/drivers/phy/phy-miphy40lp.c
@@ -9,6 +9,7 @@
  * published by the Free Software Foundation.
  *
  * 04/02/2014: Adding support of SATA mode for SPEAr1340.
+ * 04/02/2014: Adding support of PCIe mode for SPEAr1340 and SPEAr1310
  */
 
 #include linux/bitops.h
@@ -74,6 +75,80 @@
#define SPEAR1340_PCIE_SATA_MIPHY_CFG_PCIE \
(SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
+/* SPEAr1310 Registers */
+#define SPEAR1310_PCIE_SATA_CFG0x3A4
+   #define SPEAR1310_PCIE_SATA2_SEL_PCIE   (0  31)
+   #define SPEAR1310_PCIE_SATA1_SEL_PCIE   (0  30)
+   #define SPEAR1310_PCIE_SATA0_SEL_PCIE   (0  29)
+   #define SPEAR1310_PCIE_SATA2_SEL_SATA   BIT(31)
+   #define SPEAR1310_PCIE_SATA1_SEL_SATA   BIT(30)
+   #define SPEAR1310_PCIE_SATA0_SEL_SATA   BIT(29)
+   #define SPEAR1310_SATA2_CFG_TX_CLK_EN   BIT(27)
+   #define SPEAR1310_SATA2_CFG_RX_CLK_EN   BIT(26)
+   #define SPEAR1310_SATA2_CFG_POWERUP_RESET   BIT(25)
+   #define SPEAR1310_SATA2_CFG_PM_CLK_EN   BIT(24)
+   #define SPEAR1310_SATA1_CFG_TX_CLK_EN   BIT(23)
+   #define SPEAR1310_SATA1_CFG_RX_CLK_EN   BIT(22)
+   #define SPEAR1310_SATA1_CFG_POWERUP_RESET   BIT(21)
+   #define SPEAR1310_SATA1_CFG_PM_CLK_EN   BIT(20)
+   #define SPEAR1310_SATA0_CFG_TX_CLK_EN   BIT(19)
+   #define SPEAR1310_SATA0_CFG_RX_CLK_EN   BIT(18)
+   #define SPEAR1310_SATA0_CFG_POWERUP_RESET   BIT(17)
+   #define SPEAR1310_SATA0_CFG_PM_CLK_EN   BIT(16)
+   #define SPEAR1310_PCIE2_CFG_DEVICE_PRESENT  BIT(11)
+   #define SPEAR1310_PCIE2_CFG_POWERUP_RESET   BIT(10)
+   #define SPEAR1310_PCIE2_CFG_CORE_CLK_EN BIT(9)
+   #define SPEAR1310_PCIE2_CFG_AUX_CLK_EN  BIT(8)
+   #define SPEAR1310_PCIE1_CFG_DEVICE_PRESENT  BIT(7)
+   #define SPEAR1310_PCIE1_CFG_POWERUP_RESET   BIT(6)
+   #define SPEAR1310_PCIE1_CFG_CORE_CLK_EN BIT(5)
+   #define SPEAR1310_PCIE1_CFG_AUX_CLK_EN  BIT(4)
+   #define SPEAR1310_PCIE0_CFG_DEVICE_PRESENT  BIT(3)
+   #define SPEAR1310_PCIE0_CFG_POWERUP_RESET   BIT(2)
+   #define SPEAR1310_PCIE0_CFG_CORE_CLK_EN BIT(1)
+   #define SPEAR1310_PCIE0_CFG_AUX_CLK_EN  BIT(0)
+
+   #define SPEAR1310_PCIE_CFG_MASK(x) ((0xF  (x * 4)) | BIT((x + 29)))
+   #define SPEAR1310_SATA_CFG_MASK(x) ((0xF  (x * 4 + 16)) | \
+   BIT((x + 29)))
+   #define SPEAR1310_PCIE_CFG_VAL(x) \
+   (SPEAR1310_PCIE_SATA##x##_SEL_PCIE | \
+   SPEAR1310_PCIE##x##_CFG_AUX_CLK_EN | \
+   SPEAR1310_PCIE##x##_CFG_CORE_CLK_EN | \
+   SPEAR1310_PCIE##x##_CFG_POWERUP_RESET | \
+   SPEAR1310_PCIE##x##_CFG_DEVICE_PRESENT)
+   #define SPEAR1310_SATA_CFG_VAL(x) \
+   (SPEAR1310_PCIE_SATA##x##_SEL_SATA | \
+   SPEAR1310_SATA##x##_CFG_PM_CLK_EN | \
+   SPEAR1310_SATA##x##_CFG_POWERUP_RESET | \
+   SPEAR1310_SATA##x##_CFG_RX_CLK_EN | \
+   SPEAR1310_SATA##x##_CFG_TX_CLK_EN)
+
+#define SPEAR1310_PCIE_MIPHY_CFG_1 0x3A8
+   #define SPEAR1310_MIPHY_DUAL_OSC_BYPASS_EXT BIT(31)
+   #define SPEAR1310_MIPHY_DUAL_CLK_REF_DIV2   BIT(28)
+   #define SPEAR1310_MIPHY_DUAL_PLL_RATIO_TOP(x)   (x  16)
+   #define SPEAR1310_MIPHY_SINGLE_OSC_BYPASS_EXT   BIT(15)
+   #define SPEAR1310_MIPHY_SINGLE_CLK_REF_DIV2 BIT(12)
+   #define SPEAR1310_MIPHY_SINGLE_PLL_RATIO_TOP(x) (x  0)
+   #define SPEAR1310_PCIE_SATA_MIPHY_CFG_SATA_MASK (0x)
+   #define SPEAR1310_PCIE_SATA_MIPHY_CFG_PCIE_MASK (0x  16)
+   #define SPEAR1310_PCIE_SATA_MIPHY_CFG_SATA \
+   (SPEAR1310_MIPHY_DUAL_OSC_BYPASS_EXT | \
+   SPEAR1310_MIPHY_DUAL_CLK_REF_DIV2 | \
+   SPEAR1310_MIPHY_DUAL_PLL_RATIO_TOP(60) | \
+   SPEAR1310_MIPHY_SINGLE_OSC_BYPASS_EXT | \
+   SPEAR1310_MIPHY_SINGLE_CLK_REF_DIV2 | \
+   

[PATCH V5 5/8] SPEAr13xx: Fixup: Move SPEAr1340 SATA platform code to phy driver

2014-02-10 Thread Mohit Kumar
From: Pratyush Anand pratyush.an...@st.com

ahci driver needs some platform specific functions which are called at
init, exit, suspend and resume conditions. Till now these functions were
present in a platform driver with a fixme notes.

Similar functions modifying same set of registers will also be needed in
case of PCIe phy init/exit.

So move all these SATA platform code to phy-miphy40lp driver.

Signed-off-by: Pratyush Anand pratyush.an...@st.com
Tested-by: Mohit Kumar mohit.ku...@st.com
Cc: Viresh Kumar viresh.li...@gmail.com
Cc: Tejun Heo t...@kernel.org
Cc: Arnd Bergmann a...@arndb.de
Cc: Kishon Vijay Abraham I kis...@ti.com
Cc: spear-de...@list.st.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux...@vger.kernel.org
---
 .../devicetree/bindings/arm/spear-misc.txt |   4 +
 arch/arm/boot/dts/spear1310-evb.dts|   4 +
 arch/arm/boot/dts/spear1310.dtsi   |  39 +-
 arch/arm/boot/dts/spear1340-evb.dts|   4 +
 arch/arm/boot/dts/spear1340.dtsi   |  13 +-
 arch/arm/boot/dts/spear13xx.dtsi   |   5 +
 arch/arm/mach-spear/Kconfig|   2 +
 arch/arm/mach-spear/spear1340.c| 127 +-
 drivers/phy/phy-miphy40lp.c| 144 +
 9 files changed, 212 insertions(+), 130 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/spear-misc.txt

diff --git a/Documentation/devicetree/bindings/arm/spear-misc.txt 
b/Documentation/devicetree/bindings/arm/spear-misc.txt
new file mode 100644
index 000..aacd36a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spear-misc.txt
@@ -0,0 +1,4 @@
+* SPEAr Misc configuration
+** misc node required properties:
+- compatible Should be st,spear1340-misc, syscon.
+- reg: Address range of misc space
diff --git a/arch/arm/boot/dts/spear1310-evb.dts 
b/arch/arm/boot/dts/spear1310-evb.dts
index b56a801..d42c84b 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -106,6 +106,10 @@
status = okay;
};
 
+   miphy@eb80 {
+   status = okay;
+   };
+
cf@b280 {
status = okay;
};
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 122ae94..64e7dd5 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -29,24 +29,57 @@
#gpio-cells = 2;
};
 
-   ahci@b100 {
+   miphy0: miphy@eb80 {
+   compatible = st,miphy, st,spear1310-miphy;
+   reg = 0xeb80 0x4000;
+   misc = misc;
+   phy-id = 0;
+   #phy-cells = 1;
+   status = disabled;
+   };
+
+   miphy1: miphy@eb804000 {
+   compatible = st,miphy, st,spear1310-miphy;
+   reg = 0xeb804000 0x4000;
+   misc = misc;
+   phy-id = 1;
+   #phy-cells = 1;
+   status = disabled;
+   };
+
+   miphy2: miphy@eb808000 {
+   compatible = st,miphy, st,spear1310-miphy;
+   reg = 0xeb808000 0x4000;
+   misc = misc;
+   phy-id = 2;
+   #phy-cells = 1;
+   status = disabled;
+   };
+
+   ahci0: ahci@b100 {
compatible = snps,spear-ahci;
reg = 0xb100 0x1;
interrupts = 0 68 0x4;
+   phys = miphy0 0;
+   phy-names = sata-phy;
status = disabled;
};
 
-   ahci@b180 {
+   ahci1: ahci@b180 {
compatible = snps,spear-ahci;
reg = 0xb180 0x1;
interrupts = 0 69 0x4;
+   phys = miphy1 0;
+   phy-names = sata-phy;
status = disabled;
};
 
-   ahci@b400 {
+   ahci2: ahci@b400 {
compatible = snps,spear-ahci;
reg = 0xb400 0x1;
interrupts = 0 70 0x4;
+   phys = miphy2 0;
+   phy-names = sata-phy;
status = disabled;
};
 
diff --git a/arch/arm/boot/dts/spear1340-evb.dts 
b/arch/arm/boot/dts/spear1340-evb.dts
index d6c30ae..b23e05e 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ 

Re: [Update][PATCH 2/2] clocksource: Make clocksource register functions void

2014-02-10 Thread Preeti Murthy
Hi Yijing,

For the powerpc part:
 Acked-by: Preeti U Murthy pre...@linux.vnet.ibm.com

On Mon, Feb 10, 2014 at 7:28 AM, Yijing Wang wangyij...@huawei.com wrote:
 Currently, clocksource_register() and __clocksource_register_scale()
 functions always return 0, it's pointless, make functions void.
 And remove the dead code that check the clocksource_register_hz()
 return value.

 Acked-by: Hans-Christian Egtvedt egtv...@samfundet.no
 Acked-by: Tony Prisk li...@prisktech.co.nz
 Signed-off-by: Yijing Wang wangyij...@huawei.com
 ---
  arch/arm/mach-davinci/time.c|5 ++---
  arch/arm/mach-msm/timer.c   |4 +---
  arch/arm/mach-omap2/timer.c |8 +++-
  arch/avr32/kernel/time.c|4 +---
  arch/blackfin/kernel/time-ts.c  |6 ++
  arch/microblaze/kernel/timer.c  |3 +--
  arch/mips/jz4740/time.c |6 +-
  arch/mips/loongson/common/cs5536/cs5536_mfgpt.c |3 ++-
  arch/openrisc/kernel/time.c |3 +--
  arch/powerpc/kernel/time.c  |6 +-
  arch/um/kernel/time.c   |6 +-
  arch/x86/platform/uv/uv_time.c  |   14 ++
  drivers/clocksource/acpi_pm.c   |3 ++-
  drivers/clocksource/cadence_ttc_timer.c |6 +-
  drivers/clocksource/exynos_mct.c|4 +---
  drivers/clocksource/i8253.c |3 ++-
  drivers/clocksource/mmio.c  |3 ++-
  drivers/clocksource/samsung_pwm_timer.c |5 +
  drivers/clocksource/scx200_hrt.c|3 ++-
  drivers/clocksource/tcb_clksrc.c|8 +---
  drivers/clocksource/timer-marco.c   |2 +-
  drivers/clocksource/timer-prima2.c  |2 +-
  drivers/clocksource/vt8500_timer.c  |4 +---
  include/linux/clocksource.h |8 
  kernel/time/clocksource.c   |6 ++
  kernel/time/jiffies.c   |3 ++-
  26 files changed, 45 insertions(+), 83 deletions(-)

 diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
 index 24ad30f..92b772f 100644
 --- a/arch/arm/mach-davinci/time.c
 +++ b/arch/arm/mach-davinci/time.c
 @@ -387,9 +387,8 @@ void __init davinci_timer_init(void)

 /* setup clocksource */
 clocksource_davinci.name = id_to_name[clocksource_id];
 -   if (clocksource_register_hz(clocksource_davinci,
 -   davinci_clock_tick_rate))
 -   printk(err, clocksource_davinci.name);
 +   clocksource_register_hz(clocksource_davinci,
 +   davinci_clock_tick_rate);

 sched_clock_register(davinci_read_sched_clock, 32,
   davinci_clock_tick_rate);
 diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
 index fd16449..ab485bc 100644
 --- a/arch/arm/mach-msm/timer.c
 +++ b/arch/arm/mach-msm/timer.c
 @@ -226,9 +226,7 @@ static void __init msm_timer_init(u32 dgt_hz, int 
 sched_bits, int irq,

  err:
 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
 -   res = clocksource_register_hz(cs, dgt_hz);
 -   if (res)
 -   pr_err(clocksource_register failed\n);
 +   clocksource_register_hz(cs, dgt_hz);
 sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
  }

 diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
 index 74044aa..032e1da 100644
 --- a/arch/arm/mach-omap2/timer.c
 +++ b/arch/arm/mach-omap2/timer.c
 @@ -473,11 +473,9 @@ static void __init omap2_gptimer_clocksource_init(int 
 gptimer_id,
OMAP_TIMER_NONPOSTED);
 sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate);

 -   if (clocksource_register_hz(clocksource_gpt, clksrc.rate))
 -   pr_err(Could not register clocksource %s\n,
 -   clocksource_gpt.name);
 -   else
 -   pr_info(OMAP clocksource: %s at %lu Hz\n,
 +   clocksource_register_hz(clocksource_gpt, clksrc.rate);
 +
 +   pr_info(OMAP clocksource: %s at %lu Hz\n,
 clocksource_gpt.name, clksrc.rate);
  }

 diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
 index d0f771b..51b4a66 100644
 --- a/arch/avr32/kernel/time.c
 +++ b/arch/avr32/kernel/time.c
 @@ -134,9 +134,7 @@ void __init time_init(void)

 /* figure rate for counter */
 counter_hz = clk_get_rate(boot_cpu_data.clk);
 -   ret = clocksource_register_hz(counter, counter_hz);
 -   if (ret)
 -   pr_debug(timer: could not register clocksource: %d\n, ret);
 +   clocksource_register_hz(counter, counter_hz);

 /* setup COMPARE clockevent */
 comparator.mult = div_sc(counter_hz, 

Re: [PATCH] [trivial] alsa: Fix typos in alsa-driver-api.xml

2014-02-10 Thread Takashi Iwai
At Sun,  9 Feb 2014 00:47:36 +0900,
Masanari Iida wrote:
 
 This patch fixed 2 typos in DocBook/alsa-driver-api.xml.
 It is because this file is generated by make xmldocs,
 I have to fix typos within source files.
 
 Signed-off-by: Masanari Iida standby2...@gmail.com

Thanks, applied.


Takashi

 ---
  sound/core/pcm_native.c | 2 +-
  sound/core/rawmidi.c| 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
 index 01a5e05..10b5d1a 100644
 --- a/sound/core/pcm_native.c
 +++ b/sound/core/pcm_native.c
 @@ -954,7 +954,7 @@ static struct action_ops snd_pcm_action_stop = {
   *
   * The state of each stream is then changed to the given state 
 unconditionally.
   *
 - * Return: Zero if succesful, or a negative error code.
 + * Return: Zero if successful, or a negative error code.
   */
  int snd_pcm_stop(struct snd_pcm_substream *substream, snd_pcm_state_t state)
  {
 diff --git a/sound/core/rawmidi.c b/sound/core/rawmidi.c
 index 7b596b5..f016be7 100644
 --- a/sound/core/rawmidi.c
 +++ b/sound/core/rawmidi.c
 @@ -1101,7 +1101,7 @@ int snd_rawmidi_transmit_peek(struct 
 snd_rawmidi_substream *substream,
  /**
   * snd_rawmidi_transmit_ack - acknowledge the transmission
   * @substream: the rawmidi substream
 - * @count: the tranferred count
 + * @count: the transferred count
   *
   * Advances the hardware pointer for the internal output buffer with
   * the given size and updates the condition.
 -- 
 1.9.rc1
 
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xfrm: is pmtu broken with ESP tunneling?

2014-02-10 Thread Ortwin Glück

Hi,

I am using Openswan to configure an IPSec VPN (using the xfrm/netkey 
backend). Large HTTP POST requests from the client seem to get stuck, 
because the outgoing packets are 1530 bytes (before being wrapped into 
ESP packets). The problem goes away by setting sysctl 
net.ipv4.ip_no_pmtu_disc=1.


May have something to do with it:
The tunneled network is 10.6.6.6/32 and I am SNAT'ing some destinations 
to that IP, so they get routed through the tunnel. Any other networks 
are not to go through the tunnel.


iptables -t nat -A POSTROUTING -d ${R} -j SNAT --to-source 10.6.6.6

It seems quite clear to me that xfrm is doing something wrong here.

Ortwin
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Re: [PATCH] ieee80211: Print human-readable disassoc/deauth reason codes

2014-02-10 Thread Jouni Malinen
On Wed, Feb 05, 2014 at 07:44:48PM -0600, Calvin Owens wrote:
 Create a function to return a descriptive string for each reason code,
 and print that instead of the numeric value in the kernel log. These
 codes are easily found on popular search engines, but one is generally
 not able to access the internet when dealing with wireless connectivity
 issues.

I don't personally see need for this, but if others find it helpful, I'm
not that strongly against either (even though this would really belong
to user space), as long as it does not do this:

 + * ieee80211_get_reason_code_string - Get human readable reason code
 + *
 + * This function returns a string describing the @reason_code.
 + *
 + * @reason_code: Reason code we want a human readable string for
 + *
 + * Return: Human readable reason string, or (INVALID)

That (INVALID) is not helpful. It is just hiding the unknown value.
Printing out the actual reason code is much more valuable than making
this human readable in this way.

 +const char *ieee80211_get_reason_code_string(u16 reason_code)
 +{
 + if (reason_code = 24)
 + return reason_code_strings[reason_code];
 + else if (reason_code = 32  reason_code = 39)
 + return reason_code_strings[reason_code - 7];
 + else if (reason_code == 45)
 + return reason_code_strings[33];
 + else if (reason_code = 52  reason_code = 66)
 + return reason_code_strings[reason_code - 18];
 + else
 + return (INVALID);
 +}

This is hiding a large number of recently added reason codes.. For most
of the human readable strings in the reason_code_strings array, I
would end up having to find the full explanation from the standard
anyway, so I would like to be able to find this easily (and seeing the
real value of the reason code field would be the easiest way).

 diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
 @@ -2231,8 +2231,8 @@ static void ieee80211_rx_mgmt_deauth(struct 
 ieee80211_sub_if_data *sdata,
 - sdata_info(sdata, deauthenticated from %pM (Reason: %u)\n,
 -bssid, reason_code);
 + sdata_info(sdata, deauthenticated from %pM (reason: %s)\n,
 +bssid, ieee80211_get_reason_code_string(reason_code));

Please don't do this unless ieee80211_get_reason_code_string() includes
the actual reason code number for every possible case, i.e., just leave
%u print of reason_code here even if the string is added.

-- 
Jouni MalinenPGP id EFC895FA
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Re: [PATCH 1/2] genirq: Fix the possible synchronize_irq() wait-forever

2014-02-10 Thread Thomas Gleixner
On Mon, 10 Feb 2014, Chuansheng Liu wrote:
 There is below race between irq handler and irq thread:
 irq handler irq thread
 
 irq_wake_thread()   irq_thread()
   set bit RUNTHREAD
   ...clear bit RUNTHREAD
  thread_fn()
  [A]test_and_decrease
thread_active
   [B]increase thread_active
 
 If action A is before action B, after that the thread_active
 will be always  0, and for synchronize_irq() calling, which
 will be waiting there forever.

No. thread_active is 0, simply because after the atomic_dec_and_test()
it is -1 and the atomic_inc on the other side will bring it back to 0.

Thanks,

tglx
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Re: [PATCH] net: rfkill-regulator: Add devicetree support.

2014-02-10 Thread Dr. H. Nikolaus Schaller
Am 10.02.2014 um 09:27 schrieb Johannes Berg:

 On Fri, 2014-02-07 at 20:48 +0100, Marek Belisko wrote:
 
 +#define RFKILL_TYPE_ALL (0)
 +#define RFKILL_TYPE_WLAN(1)
 +#define RFKILL_TYPE_BLUETOOTH   (2)
 +#define RFKILL_TYPE_UWB (3)
 +#define RFKILL_TYPE_WIMAX   (4)
 +#define RFKILL_TYPE_WWAN(5)
 +#define RFKILL_TYPE_GPS (6)
 +#define RFKILL_TYPE_FM  (7)
 +#define RFKILL_TYPE_NFC (8)
 
 This seems like a bad idea since there's an enum elsewhere in userspace
 API already.

Yes,
you are right. It is defined in include/uapi/linux/rfkill.h

Tnx,
Nikolaus

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Re: [RFC PATCH] ARM: Add imprecise abort enable/disable macro

2014-02-10 Thread Ben Dooks

On 10/02/14 08:50, Fabrice Gasnier wrote:

On 02/07/2014 06:09 PM, Will Deacon wrote:

On Fri, Feb 07, 2014 at 04:19:15PM +, Fabrice GASNIER wrote:

This patch adds imprecise abort enable/disable macros.
It also enables imprecise aborts when starting kernel.

Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com
---
  arch/arm/include/asm/irqflags.h |   33
+
  arch/arm/kernel/smp.c   |1 +
  arch/arm/kernel/traps.c |4 
  3 files changed, 38 insertions(+)

diff --git a/arch/arm/include/asm/irqflags.h
b/arch/arm/include/asm/irqflags.h
index 3b763d6..82e3834 100644
--- a/arch/arm/include/asm/irqflags.h
+++ b/arch/arm/include/asm/irqflags.h
@@ -51,6 +51,9 @@ static inline void arch_local_irq_disable(void)
  #define local_fiq_enable()  __asm__(cpsie f@ __stf : : :
memory, cc)
  #define local_fiq_disable() __asm__(cpsid f@ __clf : : :
memory, cc)
+
+#define local_abt_enable()  __asm__(cpsie a@ __sta : : :
memory, cc)
+#define local_abt_disable() __asm__(cpsid a@ __cla : : :
memory, cc)
  #else
  /*
@@ -130,6 +133,36 @@ static inline void arch_local_irq_disable(void)
  : memory, cc);\
  })
+/*
+ * Enable Aborts
+ */
+#define local_abt_enable()\
+({\
+unsigned long temp;\
+__asm__ __volatile__(\
+mrs%0, cpsr@ sta\n\
+bic%0, %0, %1\n\
+msrcpsr_c, %0\
+: =r (temp)\
+: r (PSR_A_BIT)\

Can you use i instead of a register for this constant?

Hi,

Sure, I will change it in a future patch.



+: memory, cc);\

You don't need the cc clobber.

That surprises me: I think orr and bic instruction might change N
and Z bits, depending on the result.
So shouldn't cc be placed here ?
I also see that it is used in local_fiq_enable/disable macros just
above, that are similar:


No, only if they have the S flag set on the instruction (ORRS,BICS)


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Senior Engineer Codethink - Providing Genius
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Re: [PATCH v2] ARM: at91: add Atmel's SAMA5D3 Xplained board

2014-02-10 Thread Nicolas Ferre
On 07/02/2014 18:19, Jean-Christophe PLAGNIOL-VILLARD :
 On 15:37 Fri 07 Feb , Nicolas Ferre wrote:
 On 07/02/2014 09:01, Jean-Christophe PLAGNIOL-VILLARD :
 On 09:35 Wed 05 Feb , Nicolas Ferre wrote:
 Add DT file for new SAMA5D3 Xpained board.
 This board is based on Atmel's SAMA5D36 Cortex-A5 SoC.

 Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
 ---
  arch/arm/boot/dts/Makefile  |   1 +
  arch/arm/boot/dts/at91-sama5d3_xplained.dts | 233 
 
  2 files changed, 234 insertions(+)
  create mode 100644 arch/arm/boot/dts/at91-sama5d3_xplained.dts

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index b9d6a8b485e0..6d1e43d46187 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
  dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
  dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
  # sama5d3
 +dtb-$(CONFIG_ARCH_AT91)   += at91-sama5d3_xplained.dtb
  dtb-$(CONFIG_ARCH_AT91)   += sama5d31ek.dtb
  dtb-$(CONFIG_ARCH_AT91)   += sama5d33ek.dtb
  dtb-$(CONFIG_ARCH_AT91)   += sama5d34ek.dtb
 diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts 
 b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
 new file mode 100644
 index ..fb1349ca60a4
 --- /dev/null
 +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
 @@ -0,0 +1,233 @@
 +/*
 + * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained 
 board
 + *
 + *  Copyright (C) 2014 Atmel,
 + *  2014 Nicolas Ferre nicolas.fe...@atmel.com
 + *
 + * Licensed under GPLv2 or later.
 + */
 +/dts-v1/;
 +#include sama5d36.dtsi
 +
 +/ {
 +  model = SAMA5D3 Xplained;
 +  compatible = atmel,sama5d3-xplained, atmel,sama5d3, atmel,sama5;
 +
 +  chosen {
 +  bootargs = console=ttyS0,115200;
 can you describe it via linux,stdout

 Well I would have liked, but the code in the serial driver is not there yet.
 So, I keep it like this for the moment.

 +  };
 +
 +  memory {
 +  reg = 0x2000 0x1000;
 +  };
 +
 +  ahb {
 +  apb {
 +  mmc0: mmc@f000 {
 +  pinc§trl-names = default;
 ?? this is SoC should never been seen here
 this need to move to dtsi not here

Yes. It is done already.

 +  pinctrl-0 = pinctrl_mmc0_clk_cmd_dat0 
 pinctrl_mmc0_dat1_3 pinctrl_mmc0_dat4_7 pinctrl_mmc0_cd;
 +  status = okay;
 +  slot@0 {
 +  reg = 0;
 +  bus-width = 8;
 +  cd-gpios = pioE 0 GPIO_ACTIVE_LOW;
 +  };
 +  };
 +
 +  spi0: spi@f0004000 {
 +  cs-gpios = pioD 13 0, 0, 0, 0;
 if you use only one CS no need to specified all

 we need to add macro per SoC for the hw CS used as GPIO so it's more clear

 No, I do not think so.
 
 yes as you dopy pioD 13 0 everywhere instead of doing
 
 #define SAMA5D3_SPI_CS0_GPIO  pioD 13 GPIO_ACTIVE_LOW
 
 and then
 
   cs-gpios = SAMA5D3_SPI_CS0_GPIO;

I do not see any benefit in doing this.


 and drop the
   , 0, 0, 0;

Already done.

 
 +  status = okay;
 +  };
 +
 +  can0: can@f000c000 {
 +  status = okay;
 +  };
 +
 +  i2c0: i2c@f0014000 {
 +  status = okay;
 +  };
 +
 +  i2c1: i2c@f0018000 {
 +  status = okay;
 +  };
 +
 +  macb0: ethernet@f0028000 {
 +  phy-mode = rgmii;
 +  status = okay;
 +  };
 +
 +  usart0: serial@f001c000 {
 +  status = okay;
 +  };
 +
 +  usart1: serial@f002 {
 +  pinctrl-names = default;
 same as mmc
 +  pinctrl-0 = pinctrl_usart1 
 pinctrl_usart1_rts_cts;
 +  status = okay;
 +  };
 +
 +  uart0: serial@f0024000 {
 +  status = okay;
 +  };
 +
 +  mmc1: mmc@f800 {
 +  pinctrl-names = default;
 ditto
 +  pinctrl-0 = pinctrl_mmc1_clk_cmd_dat0 
 pinctrl_mmc1_dat1_3 pinctrl_mmc1_cd;
 +  status = okay;
 +  slot@0 {
 +  reg = 0;
 +  bus-width = 4;
 +  cd-gpios = pioE 1 GPIO_ACTIVE_HIGH;
 +  };
 +  };
 +
 +  spi1: spi@f8008000 {
 +  cs-gpios = pioC 25 0, 0, 0, pioD 16 0;
 +  status = okay;
 +

Re: [PATCH] RFC: MFD: driver for Atmel Microcontroller on iPaq h3xxx

2014-02-10 Thread Linus Walleij
On Fri, Jan 31, 2014 at 2:34 PM, Linus Walleij linus.wall...@linaro.org wrote:

 This adds a driver for the Atmel Microcontroller found on the
 iPAQ h3xxx series. This device handles some keys, the
 touchscreen, and the battery monitoring.

Any opinions on this driver or should we queue it in MFD as-is?

Yours,
Linus Walleij
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Re: [PATCH net] hyperv: Fix the carrier status setting

2014-02-10 Thread Dan Carpenter
On Sun, Feb 09, 2014 at 05:07:58PM -0800, Haiyang Zhang wrote:
 Signed-off-by: Haiyang Zhang haiya...@microsoft.com
 Reviewed-by: K. Y. Srinivasan k...@microsoft.com

Changelog sucks.  What are the user visible effects of this bug?

regards,
dan carpenter

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[PATCH 0/3 V2] sched: Collect the bits about priority into a new header file, include/linux/sched/prio.h.

2014-02-10 Thread Dongsheng Yang
Hi Peter,
This patchset is version 2 about priority of sched. Please help to review. 

Sorry for the late update about it, coming back from vacation.

v2:
* leave the task_prio() in kernel/sched/core.c
* remove macro TASK_NICE and implement it as static inline
  function in include/linux/sched.h.
* remove #ifndef when include prio.h.

Dongsheng Yang (3):
  sched: Move the priority specific bits into a new header file.
  sched: Expose some macros related with priority.
  sched: Implement task_nice as static inline function.

 include/linux/sched.h  | 12 +++-
 include/linux/sched/prio.h | 40 
 include/linux/sched/rt.h   | 19 +--
 kernel/sched/core.c| 26 +++---
 kernel/sched/cputime.c |  4 ++--
 kernel/sched/sched.h   | 18 --
 6 files changed, 61 insertions(+), 58 deletions(-)
 create mode 100644 include/linux/sched/prio.h

-- 
1.8.2.1

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[PATCH 2/3] sched: Expose some macros related with priority.

2014-02-10 Thread Dongsheng Yang
Some macros in kernel/sched/sched.h about priority are
private to kernel/sched. But they are useful to other
parts of the core kernel.

This patch move these macros from kernel/sched/sched.h to
include/linux/sched/prio.h so that they are available to
other subsystems.

Signed-off-by: Dongsheng Yang yangds.f...@cn.fujitsu.com
---
 include/linux/sched/prio.h | 18 ++
 kernel/sched/sched.h   | 18 --
 2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/include/linux/sched/prio.h b/include/linux/sched/prio.h
index 9382ba8..13216f1 100644
--- a/include/linux/sched/prio.h
+++ b/include/linux/sched/prio.h
@@ -20,4 +20,22 @@
 #define MAX_PRIO   (MAX_RT_PRIO + 40)
 #define DEFAULT_PRIO   (MAX_RT_PRIO + 20)
 
+/*
+ * Convert user-nice values [ -20 ... 0 ... 19 ]
+ * to static priority [ MAX_RT_PRIO..MAX_PRIO-1 ],
+ * and back.
+ */
+#define NICE_TO_PRIO(nice) (MAX_RT_PRIO + (nice) + 20)
+#define PRIO_TO_NICE(prio) ((prio) - MAX_RT_PRIO - 20)
+#define TASK_NICE(p)   PRIO_TO_NICE((p)-static_prio)
+
+/*
+ * 'User priority' is the nice value converted to something we
+ * can work with better when scaling various scheduler parameters,
+ * it's a [ 0 ... 39 ] range.
+ */
+#define USER_PRIO(p)   ((p)-MAX_RT_PRIO)
+#define TASK_USER_PRIO(p)  USER_PRIO((p)-static_prio)
+#define MAX_USER_PRIO  (USER_PRIO(MAX_PRIO))
+
 #endif /* _SCHED_PRIO_H */
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index c2119fd..b44720d 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -24,24 +24,6 @@ extern long calc_load_fold_active(struct rq *this_rq);
 extern void update_cpu_load_active(struct rq *this_rq);
 
 /*
- * Convert user-nice values [ -20 ... 0 ... 19 ]
- * to static priority [ MAX_RT_PRIO..MAX_PRIO-1 ],
- * and back.
- */
-#define NICE_TO_PRIO(nice) (MAX_RT_PRIO + (nice) + 20)
-#define PRIO_TO_NICE(prio) ((prio) - MAX_RT_PRIO - 20)
-#define TASK_NICE(p)   PRIO_TO_NICE((p)-static_prio)
-
-/*
- * 'User priority' is the nice value converted to something we
- * can work with better when scaling various scheduler parameters,
- * it's a [ 0 ... 39 ] range.
- */
-#define USER_PRIO(p)   ((p)-MAX_RT_PRIO)
-#define TASK_USER_PRIO(p)  USER_PRIO((p)-static_prio)
-#define MAX_USER_PRIO  (USER_PRIO(MAX_PRIO))
-
-/*
  * Helpers for converting nanosecond timing to jiffy resolution
  */
 #define NS_TO_JIFFIES(TIME)((unsigned long)(TIME) / (NSEC_PER_SEC / HZ))
-- 
1.8.2.1

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[PATCH 1/3] sched: Move the priority specific bits into a new header file.

2014-02-10 Thread Dongsheng Yang
Some bits about priority are defined in linux/sched/rt.h, but
some of them are not only for rt scheduler, such as MAX_PRIO.

This patch move them all into a new header file, linux/sched/prio.h.

Signed-off-by: Dongsheng Yang yangds.f...@cn.fujitsu.com
---
 include/linux/sched.h  |  1 +
 include/linux/sched/prio.h | 23 +++
 include/linux/sched/rt.h   | 19 +--
 3 files changed, 25 insertions(+), 18 deletions(-)
 create mode 100644 include/linux/sched/prio.h

diff --git a/include/linux/sched.h b/include/linux/sched.h
index a781dec..5aa0329 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -54,6 +54,7 @@ struct sched_param {
 #include linux/llist.h
 #include linux/uidgid.h
 #include linux/gfp.h
+#include linux/sched/prio.h
 
 #include asm/processor.h
 
diff --git a/include/linux/sched/prio.h b/include/linux/sched/prio.h
new file mode 100644
index 000..9382ba8
--- /dev/null
+++ b/include/linux/sched/prio.h
@@ -0,0 +1,23 @@
+#ifndef _SCHED_PRIO_H
+#define _SCHED_PRIO_H
+
+/*
+ * Priority of a process goes from 0..MAX_PRIO-1, valid RT
+ * priority is 0..MAX_RT_PRIO-1, and SCHED_NORMAL/SCHED_BATCH
+ * tasks are in the range MAX_RT_PRIO..MAX_PRIO-1. Priority
+ * values are inverted: lower p-prio value means higher priority.
+ *
+ * The MAX_USER_RT_PRIO value allows the actual maximum
+ * RT priority to be separate from the value exported to
+ * user-space.  This allows kernel threads to set their
+ * priority to a value higher than any user task. Note:
+ * MAX_RT_PRIO must not be smaller than MAX_USER_RT_PRIO.
+ */
+
+#define MAX_USER_RT_PRIO   100
+#define MAX_RT_PRIOMAX_USER_RT_PRIO
+
+#define MAX_PRIO   (MAX_RT_PRIO + 40)
+#define DEFAULT_PRIO   (MAX_RT_PRIO + 20)
+
+#endif /* _SCHED_PRIO_H */
diff --git a/include/linux/sched/rt.h b/include/linux/sched/rt.h
index 34e4ebe..f7453d4 100644
--- a/include/linux/sched/rt.h
+++ b/include/linux/sched/rt.h
@@ -1,24 +1,7 @@
 #ifndef _SCHED_RT_H
 #define _SCHED_RT_H
 
-/*
- * Priority of a process goes from 0..MAX_PRIO-1, valid RT
- * priority is 0..MAX_RT_PRIO-1, and SCHED_NORMAL/SCHED_BATCH
- * tasks are in the range MAX_RT_PRIO..MAX_PRIO-1. Priority
- * values are inverted: lower p-prio value means higher priority.
- *
- * The MAX_USER_RT_PRIO value allows the actual maximum
- * RT priority to be separate from the value exported to
- * user-space.  This allows kernel threads to set their
- * priority to a value higher than any user task. Note:
- * MAX_RT_PRIO must not be smaller than MAX_USER_RT_PRIO.
- */
-
-#define MAX_USER_RT_PRIO   100
-#define MAX_RT_PRIOMAX_USER_RT_PRIO
-
-#define MAX_PRIO   (MAX_RT_PRIO + 40)
-#define DEFAULT_PRIO   (MAX_RT_PRIO + 20)
+#include linux/sched/prio.h
 
 static inline int rt_prio(int prio)
 {
-- 
1.8.2.1

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[PATCH 3/3] sched: Implement task_nice as static inline function.

2014-02-10 Thread Dongsheng Yang
As commit 0e0c0797 expose the priority related macros in linux/sched/prio.h,
we don't have to implement task_nice in kernel/sched/core.c any more.

This patch implement it in linux/sched/sched.h as static inline function,
saving the kernel stack and enhancing the performance.

Signed-off-by: Dongsheng Yang yangds.f...@cn.fujitsu.com
---
 include/linux/sched.h  | 11 ++-
 include/linux/sched/prio.h |  1 -
 kernel/sched/core.c| 26 +++---
 kernel/sched/cputime.c |  4 ++--
 4 files changed, 19 insertions(+), 23 deletions(-)

diff --git a/include/linux/sched.h b/include/linux/sched.h
index 5aa0329..65fcbae 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -2081,7 +2081,16 @@ static inline void sched_autogroup_exit(struct 
signal_struct *sig) { }
 extern bool yield_to(struct task_struct *p, bool preempt);
 extern void set_user_nice(struct task_struct *p, long nice);
 extern int task_prio(const struct task_struct *p);
-extern int task_nice(const struct task_struct *p);
+/**
+ * task_nice - return the nice value of a given task.
+ * @p: the task in question.
+ *
+ * Return: The nice value [ -20 ... 0 ... 19 ].
+ */
+static inline int task_nice(const struct task_struct *p)
+{
+   return PRIO_TO_NICE((p)-static_prio);
+}
 extern int can_nice(const struct task_struct *p, const int nice);
 extern int task_curr(const struct task_struct *p);
 extern int idle_cpu(int cpu);
diff --git a/include/linux/sched/prio.h b/include/linux/sched/prio.h
index 13216f1..410ccb7 100644
--- a/include/linux/sched/prio.h
+++ b/include/linux/sched/prio.h
@@ -27,7 +27,6 @@
  */
 #define NICE_TO_PRIO(nice) (MAX_RT_PRIO + (nice) + 20)
 #define PRIO_TO_NICE(prio) ((prio) - MAX_RT_PRIO - 20)
-#define TASK_NICE(p)   PRIO_TO_NICE((p)-static_prio)
 
 /*
  * 'User priority' is the nice value converted to something we
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index b46131e..8d45a47 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2998,7 +2998,7 @@ void set_user_nice(struct task_struct *p, long nice)
unsigned long flags;
struct rq *rq;
 
-   if (TASK_NICE(p) == nice || nice  -20 || nice  19)
+   if (task_nice(p) == nice || nice  -20 || nice  19)
return;
/*
 * We have to be careful, if called from sys_setpriority(),
@@ -3076,7 +3076,7 @@ SYSCALL_DEFINE1(nice, int, increment)
if (increment  40)
increment = 40;
 
-   nice = TASK_NICE(current) + increment;
+   nice = task_nice(current) + increment;
if (nice  -20)
nice = -20;
if (nice  19)
@@ -3109,18 +3109,6 @@ int task_prio(const struct task_struct *p)
 }
 
 /**
- * task_nice - return the nice value of a given task.
- * @p: the task in question.
- *
- * Return: The nice value [ -20 ... 0 ... 19 ].
- */
-int task_nice(const struct task_struct *p)
-{
-   return TASK_NICE(p);
-}
-EXPORT_SYMBOL(task_nice);
-
-/**
  * idle_cpu - is a given cpu idle currently?
  * @cpu: the processor in question.
  *
@@ -3319,7 +3307,7 @@ recheck:
 */
if (user  !capable(CAP_SYS_NICE)) {
if (fair_policy(policy)) {
-   if (attr-sched_nice  TASK_NICE(p) 
+   if (attr-sched_nice  task_nice(p) 
!can_nice(p, attr-sched_nice))
return -EPERM;
}
@@ -3343,7 +3331,7 @@ recheck:
 * SCHED_NORMAL if the RLIMIT_NICE would normally permit it.
 */
if (p-policy == SCHED_IDLE  policy != SCHED_IDLE) {
-   if (!can_nice(p, TASK_NICE(p)))
+   if (!can_nice(p, task_nice(p)))
return -EPERM;
}
 
@@ -3383,7 +3371,7 @@ recheck:
 * If not changing anything there's no need to proceed further:
 */
if (unlikely(policy == p-policy)) {
-   if (fair_policy(policy)  attr-sched_nice != TASK_NICE(p))
+   if (fair_policy(policy)  attr-sched_nice != task_nice(p))
goto change;
if (rt_policy(policy)  attr-sched_priority != p-rt_priority)
goto change;
@@ -3835,7 +3823,7 @@ SYSCALL_DEFINE3(sched_getattr, pid_t, pid, struct 
sched_attr __user *, uattr,
else if (task_has_rt_policy(p))
attr.sched_priority = p-rt_priority;
else
-   attr.sched_nice = TASK_NICE(p);
+   attr.sched_nice = task_nice(p);
 
rcu_read_unlock();
 
@@ -7008,7 +6996,7 @@ void normalize_rt_tasks(void)
 * Renice negative nice level userspace
 * tasks back to 0:
 */
-   if (TASK_NICE(p)  0  p-mm)
+   if (task_nice(p)  0  p-mm)
set_user_nice(p, 0);
continue;
 

Re: [PATCH] staging : android : fix checkpatch issues

2014-02-10 Thread Dan Carpenter
On Mon, Feb 10, 2014 at 10:59:14AM +0900, Daeseok Youn wrote:
 @@ -1376,14 +1376,14 @@ static int ion_debug_heap_show(struct seq_file *s, 
 void *unused)
   }
   }
   mutex_unlock(dev-buffer_lock);
 - seq_printf(s, \n);
 + seq_puts(s, \n);
   seq_printf(s, %16.s %16zu\n, total orphaned,
  total_orphaned_size);

This kind of thing where you put a seq_puts() in the middle of a string
of seq_printf() calls is not good.  We only make checkpatch.pl warn
about it to see if patch submitters are paying attention and to test the
patience of reviewers.

regards,
dan carpenter

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Re: [btrfs] BUG: unable to handle kernel NULL pointer dereference at 0000000000000038

2014-02-10 Thread Fengguang Wu
Hi Filipe,

 If you disable CONFIG_BTRFS_FS_RUN_SANITY_TESTS, does it still crash?

I tried disabling CONFIG_BTRFS_FS_RUN_SANITY_TESTS in the reported 3
randconfigs and they all boot fine.

Thanks,
Fengguang
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Re: [PATCH 1/2] pinctrl-msm: Add SPI8 pin definitions

2014-02-10 Thread Linus Walleij
On Thu, Feb 6, 2014 at 4:28 PM, Ivan T. Ivanov iiva...@mm-sol.com wrote:

 From: Ivan T. Ivanov iiva...@mm-sol.com

 Add pin, group and function definitions for SPI#8
 controller.

 Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com

Björn can I have your ACK on this patch?

Yours,
Linus Walleij
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Re: [PATCH 01/51] CPU hotplug: Provide lockless versions of callback registration functions

2014-02-10 Thread Srivatsa S. Bhat
Hi Gautham,

On 02/08/2014 12:41 AM, Gautham R Shenoy wrote:
 On Thu, Feb 06, 2014 at 07:41:03PM +0100, Oleg Nesterov wrote:
 On 02/06, Srivatsa S. Bhat wrote:

 The following method of CPU hotplug callback registration is not safe
 due to the possibility of an ABBA deadlock involving the cpu_add_remove_lock
 and the cpu_hotplug.lock.

 Off-topic, but perhaps it also makes sense to add the lockdep annotations
 later, to catch other similar problems. Currently get_online_cpus() acquires
 nothing from lockdep pov.
 
 Well, both get/put_online_cpus() as well as cpu_hotplug_begin/end()
 take the cpu_hotplug.lock mutex. So ideally the lockdep annotations of
 mutex_lock/unlock() should have worked.

The reason lockdep doesn't catch the lock-inversion (ABBA) deadlock between
cpu_hotplug.lock (from get_online_cpus) and cpu_add_remove_lock (from
cpu_maps_update_begin) is because, in the following path, the
cpu_add_remove_lock is acquired after *releasing* the cpu_hotplug.lock mutex.

get_online_cpus();  // acquire mutex; update counter; release mutex

register_cpu_notifier(); // acquire cpu_add_remove_lock ...

put_online_cpus();

 If it hasn't, then the
 following lockdep annotations to cpu-hotplug locking should do the
 trick.
 

This patch looks good to me. I have a couple of suggestions though..

 Signed-off-by: Gautham R. Shenoy e...@linux.vnet.ibm.com
 ---
  kernel/cpu.c | 18 ++
  1 file changed, 18 insertions(+)
 
 diff --git a/kernel/cpu.c b/kernel/cpu.c
 index deff2e6..3d2dd1c 100644
 --- a/kernel/cpu.c
 +++ b/kernel/cpu.c
 @@ -19,6 +19,7 @@
  #include linux/mutex.h
  #include linux/gfp.h
  #include linux/suspend.h
 +#include linux/lockdep.h
 
  #include smpboot.h
 
 @@ -57,21 +58,34 @@ static struct {
* an ongoing cpu hotplug operation.
*/
   int refcount;
 +
 +#ifdef CONFIG_DEBUG_LOCK_ALLOC
 + struct lockdep_map dep_map;
 +#endif
  } cpu_hotplug = {
   .active_writer = NULL,
   .lock = __MUTEX_INITIALIZER(cpu_hotplug.lock),
   .refcount = 0,
 +#ifdef CONFIG_DEBUG_LOCK_ALLOC
 + .dep_map = {.name = cpu_hotplug.lock },
 +#endif
  };
 
 +#define cphp_lock_acquire_read(l, s, t, i) lock_acquire_shared_recursive(l, 
 s, t, NULL, i)
 +#define cphp_lock_acquire(l, s, t, i)  lock_acquire_exclusive(l, s, t, 
 NULL, i)
 +#define cphp_lock_release(l, n, i)  lock_release(l, n, i)
 +

Can you make them cpuhp_* instead of cphp_*? That way it would suit better as
a short-form of cpu hotplug.

Also, perhaps we could use the lock_map_acquire(), lock_map_acquire_read()
and lock_map_release() macros to make the call-sites look neater.

Regards,
Srivatsa S. Bhat


  void get_online_cpus(void)
  {
   might_sleep();
   if (cpu_hotplug.active_writer == current)
   return;
 + cphp_lock_acquire_read(cpu_hotplug.dep_map, 0, 0, _RET_IP_);
   mutex_lock(cpu_hotplug.lock);
   cpu_hotplug.refcount++;
   mutex_unlock(cpu_hotplug.lock);
 
 +
  }
  EXPORT_SYMBOL_GPL(get_online_cpus);
 
 @@ -79,6 +93,7 @@ void put_online_cpus(void)
  {
   if (cpu_hotplug.active_writer == current)
   return;
 +
   mutex_lock(cpu_hotplug.lock);
 
   if (WARN_ON(!cpu_hotplug.refcount))
 @@ -87,6 +102,7 @@ void put_online_cpus(void)
   if (!--cpu_hotplug.refcount  unlikely(cpu_hotplug.active_writer))
   wake_up_process(cpu_hotplug.active_writer);
   mutex_unlock(cpu_hotplug.lock);
 + cphp_lock_release(cpu_hotplug.dep_map, 1, _RET_IP_);
 
  }
  EXPORT_SYMBOL_GPL(put_online_cpus);
 @@ -117,6 +133,7 @@ void cpu_hotplug_begin(void)
  {
   cpu_hotplug.active_writer = current;
 
 + cphp_lock_acquire(cpu_hotplug.dep_map, 0, 0, _RET_IP_);
   for (;;) {
   mutex_lock(cpu_hotplug.lock);
   if (likely(!cpu_hotplug.refcount))
 @@ -131,6 +148,7 @@ void cpu_hotplug_done(void)
  {
   cpu_hotplug.active_writer = NULL;
   mutex_unlock(cpu_hotplug.lock);
 + cphp_lock_release(cpu_hotplug.dep_map, 1, _RET_IP_);
  }
 
  /*
 

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Re: [PATCH v3 2/2] Binding: atmel-ssc: add option to choose clock

2014-02-10 Thread Nicolas Ferre
On 10/02/2014 07:09, Bo Shen :
 Add the option to choose clock on which pin input to SSC (as slave).
 Default is on TK pin to SSC, add atmel,clk-from-rk-pin option to
 specify the clock is on RK pin to SSC.
 
 Signed-off-by: Bo Shen voice.s...@atmel.com

Acked-by: Nicolas Ferre nicolas.fe...@atmel.com

 ---
 Changes in v3:
   - None
 Series-changes: 2
   - using - replace _ in binding document
 
  Documentation/devicetree/bindings/misc/atmel-ssc.txt | 8 
  1 file changed, 8 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt 
 b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
 index a45ae08..5c1e14e 100644
 --- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
 +++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
 @@ -14,6 +14,14 @@ Required properties for devices compatible with 
 atmel,at91sam9g45-ssc:
See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
  - dma-names: Must be tx, rx.
  
 +Optional properties:
 +  - atmel,clk-from-rk-pin: bool property.
 + - When SSC works in slave mode, according to the hardware design, the
 +   clock can get from TK pin, and also can get from RK pin. So, add
 +   this parameter to choose where the clock from.
 + - By default the clock is from TK pin, if the clock from RK pin, this
 +   property is needed.
 +
  Examples:
  - PDC transfer:
  ssc0: ssc@fffbc000 {
 


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Re: [PATCH v3 1/2] ASoC: atmel_ssc_dai: make option to choose clock

2014-02-10 Thread Nicolas Ferre
On 10/02/2014 07:09, Bo Shen :
 When SSC works in slave mode, according to the hardware design, the
 clock can get from TK pin, also can get from RK pin. So, add one
 parameter to choose where the clock from.
 
 Signed-off-by: Bo Shen voice.s...@atmel.com

Acked-by: Nicolas Ferre nicolas.fe...@atmel.com

 ---
 Changes in v3:
   - New, move clk-from-rk-pin property from card to ssc device
 
  drivers/misc/atmel-ssc.c|  6 ++
  include/linux/atmel-ssc.h   |  1 +
  sound/soc/atmel/atmel_ssc_dai.c | 13 +
  3 files changed, 16 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
 index 5be80840..22de137 100644
 --- a/drivers/misc/atmel-ssc.c
 +++ b/drivers/misc/atmel-ssc.c
 @@ -150,6 +150,12 @@ static int ssc_probe(struct platform_device *pdev)
   return -ENODEV;
   ssc-pdata = (struct atmel_ssc_platform_data *)plat_dat;
  
 + if (pdev-dev.of_node) {
 + struct device_node *np = pdev-dev.of_node;
 + ssc-clk_from_rk_pin =
 + of_property_read_bool(np, atmel,clk-from-rk-pin);
 + }
 +
   regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
   ssc-regs = devm_ioremap_resource(pdev-dev, regs);
   if (IS_ERR(ssc-regs))
 diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
 index 66a0e53..571a12e 100644
 --- a/include/linux/atmel-ssc.h
 +++ b/include/linux/atmel-ssc.h
 @@ -18,6 +18,7 @@ struct ssc_device {
   struct clk  *clk;
   int user;
   int irq;
 + boolclk_from_rk_pin;
  };
  
  struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
 diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
 index 8697ced..ca1d8a3 100644
 --- a/sound/soc/atmel/atmel_ssc_dai.c
 +++ b/sound/soc/atmel/atmel_ssc_dai.c
 @@ -341,6 +341,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
 *substream,
  {
   int id = dai-id;
   struct atmel_ssc_info *ssc_p = ssc_info[id];
 + struct ssc_device *ssc = ssc_p-ssc;
   struct atmel_pcm_dma_params *dma_params;
   int dir, channels, bits;
   u32 tfmr, rfmr, tcmr, rcmr;
 @@ -466,7 +467,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
 *substream,
   | SSC_BF(RCMR_START, start_event)
   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
   | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 - | SSC_BF(RCMR_CKS, SSC_CKS_CLOCK);
 + | SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
 +SSC_CKS_PIN : SSC_CKS_CLOCK);
  
   rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
   | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
 @@ -481,7 +483,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
 *substream,
   | SSC_BF(TCMR_START, start_event)
   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
   | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
 - | SSC_BF(TCMR_CKS, SSC_CKS_PIN);
 + | SSC_BF(TCMR_CKS, ssc-clk_from_rk_pin ?
 +SSC_CKS_CLOCK : SSC_CKS_PIN);
  
   tfmr =SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
   | SSC_BF(TFMR_FSDEN, 0)
 @@ -550,7 +553,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
 *substream,
   | SSC_BF(RCMR_START, SSC_START_RISING_RF)
   | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
   | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 - | SSC_BF(RCMR_CKS, SSC_CKS_PIN);
 + | SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
 +SSC_CKS_PIN : SSC_CKS_CLOCK);
  
   rfmr =SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
   | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
 @@ -565,7 +569,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream 
 *substream,
   | SSC_BF(TCMR_START, SSC_START_RISING_RF)
   | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
   | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
 - | SSC_BF(TCMR_CKS, SSC_CKS_PIN);
 + | SSC_BF(RCMR_CKS, ssc-clk_from_rk_pin ?
 +SSC_CKS_CLOCK : SSC_CKS_PIN);
  
   tfmr =SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
   | SSC_BF(TFMR_FSDEN, 0)
 


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Re: [PATCH V2 2/3] sched: Fix race in idle_balance()

2014-02-10 Thread Preeti Murthy
HI Daniel,

Isn't the only scenario where another cpu can put an idle task on
our runqueue, in nohz_idle_balance() where only the cpus in
the nohz.idle_cpus_mask are iterated through. But for the case
that this patch is addressing, the cpu in question is not yet a part
of the nohz.idle_cpus_mask right?

Any other case would trigger load balancing on the same cpu, but
we are preempt_disabled and interrupt disabled at this point.

Thanks

Regards
Preeti U Murthy

On Fri, Feb 7, 2014 at 4:40 AM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
 The scheduler main function 'schedule()' checks if there are no more tasks
 on the runqueue. Then it checks if a task should be pulled in the current
 runqueue in idle_balance() assuming it will go to idle otherwise.

 But the idle_balance() releases the rq-lock in order to lookup in the sched
 domains and takes the lock again right after. That opens a window where
 another cpu may put a task in our runqueue, so we won't go to idle but
 we have filled the idle_stamp, thinking we will.

 This patch closes the window by checking if the runqueue has been modified
 but without pulling a task after taking the lock again, so we won't go to idle
 right after in the __schedule() function.

 Cc: alex@linaro.org
 Cc: pet...@infradead.org
 Cc: mi...@kernel.org
 Signed-off-by: Daniel Lezcano daniel.lezc...@linaro.org
 Signed-off-by: Peter Zijlstra pet...@infradead.org
 ---
  kernel/sched/fair.c |7 +++
  1 file changed, 7 insertions(+)

 diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
 index 428bc9d..5ebc681 100644
 --- a/kernel/sched/fair.c
 +++ b/kernel/sched/fair.c
 @@ -6589,6 +6589,13 @@ void idle_balance(struct rq *this_rq)

 raw_spin_lock(this_rq-lock);

 +   /*
 +* While browsing the domains, we released the rq lock.
 +* A task could have be enqueued in the meantime
 +*/
 +   if (this_rq-nr_running  !pulled_task)
 +   return;
 +
 if (pulled_task || time_after(jiffies, this_rq-next_balance)) {
 /*
  * We are going idle. next_balance may be set based on
 --
 1.7.9.5

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Re: [btrfs] BUG: unable to handle kernel NULL pointer dereference at 0000000000000038

2014-02-10 Thread Fengguang Wu
On Sat, Feb 08, 2014 at 03:10:37PM -0500, Tejun Heo wrote:
 Hello, David, Fengguang, Chris.
 
 On Fri, Feb 07, 2014 at 01:13:06PM -0800, David Rientjes wrote:
  On Fri, 7 Feb 2014, Fengguang Wu wrote:
  
   On Fri, Feb 07, 2014 at 02:13:59AM -0800, David Rientjes wrote:
On Fri, 7 Feb 2014, Fengguang Wu wrote:

 [1.625020] BTRFS: selftest: Running btrfs_split_item tests
 [1.627004] BTRFS: selftest: Running find delalloc tests
 [2.289182] tsc: Refined TSC clocksource calibration: 2299.967 MHz
 [  292.084537] kthreadd invoked oom-killer: gfp_mask=0x3000d0, 
 order=1, oom_score_adj=0
 [  292.086439] kthreadd cpuset=
 [  292.087072] BUG: unable to handle kernel NULL pointer dereference 
 at 0038
 [  292.087372] IP: [812119de] pr_cont_kernfs_name+0x1b/0x6c

This looks like a problem with the cpuset cgroup name, are you sure 
this 
isn't related to the removal of cgroup-name?
   
   It looks not related to patch cgroup: remove cgroup-name, because
   that patch lies in the cgroup tree and not contained in output of git 
   log BAD_COMMIT.

Sorry I was wrong here. I find that the above dmesg is for commit
4830363 which is a merge HEAD that contains the cgroup code.

The dmesg for commit 878a876b2e1 (Merge branch 'for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs)
looks different, which hangs after the tsc line:

[2.428110] Btrfs loaded, assert=on, integrity-checker=on
[2.429469] BTRFS: selftest: Running btrfs free space cache tests
[2.430874] BTRFS: selftest: Running extent only tests
[2.432135] BTRFS: selftest: Running bitmap only tests
[2.433359] BTRFS: selftest: Running bitmap and extent tests
[2.434675] BTRFS: selftest: Free space cache tests finished
[2.435959] BTRFS: selftest: Running extent buffer operation tests
[2.437350] BTRFS: selftest: Running btrfs_split_item tests
[2.438843] BTRFS: selftest: Running find delalloc tests
[3.158351] tsc: Refined TSC clocksource calibration: 2666.596 MHz


  It's dying on pr_cont_kernfs_name which is some tree that has kernfs: 
  implement kernfs_get_parent(), kernfs_name/path() and friends, which is 
  not in linux-next, and is obviously printing the cpuset cgroup name.
  
  It doesn't look like it has anything at all to do with btrfs or why they 
  would care about this failure.
 
 Yeah, this is from a patch in cgroup/review-post-kernfs-conversion
 branch which updates cgroup to use pr_cont_kernfs_name().  I forget
 that cgrp-kn is NULL for the dummy_root's top cgroup and thus it ends
 up calling the kernfs functions with NULL kn and thus the oops.  I
 posted an updated patch and the git branch has been updated.
 
  http://lkml.kernel.org/g/20140208200640.gb10...@htj.dyndns.org
 
 So, nothing to do with btrfs and it looks like somehow the test
 appratus is mixing up branches?

Yes - I may do random merges and boot test the resulted kernels.

Thanks,
Fengguang
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[PATCH V5 0/8]PCI:Add SPEAr13xx PCie support

2014-02-10 Thread Mohit Kumar
From: Pratyush Anand pratyush.an...@st.com

First three patches are improvement and fixes for SPEAr13xx support.
Patches 4-6 add miphy40lp skelten driver and support for spear1310/40 miphy
wrapper. Patch 7 add support for SPEAr13xx PCIe.

These pathes are tested with linux-3.14-rc1 with following patch on the top of
it:
Author: Balaji T K balaj...@ti.com
Date:   Mon Jan 20 16:41:27 2014 +0200

ata: ahci_platform: Manage SATA PHY

Tested with SPEAr1310 evaluation board:
- INTEL PRO 100/100 EP card
- USB xhci gen2 card
- Above cards connected through LeCROY PTC switch

Modifications for SATA are tested with SPEAr1340-evb board

Changes since v4:
- Uses per device function pointers passed from .data field to
  the of_device_id instead of of_device_is_compatible.
- Incorporated other minor comments from v4

Changes since v3:
- Phy driver renamed to phy-miphy40lp
- ahci phy hook patch used as suggested by Arnd
- Incorporated other minor comments from v3

Changes since v2:
- Incorporated comments to move SPEAr13xx PCIe and SATA phy specific routines to
  the phy framework
- Modify ahci driver to include phy hooks
- phy-core driver modifications for subsys_initcall() 
 
Changes since v1:
- Few patches of the series are already accepted and applied to mainline e.g.
 pcie designware driver improvements,fixes for IO translation bug, PCIe dw
 driver maintainer. So dropped these from v2.
- Incorporated comment to move the common/reset PCIe code to the seperate driver
- PCIe and SATA share common PHY configuration registers, so move SATA
 platform code to the system config driver
Fourth patch is improves pcie designware driver and fixes the IO
translation bug. IO translation bug fix leads to the working of PCIe EP devices
connected to RC through switch.

PCIe driver support for SPEAr1310/40 platform board is added.

These patches are tested with SPEAr1310 evaluation board:
- INTEL PRO 100/100 EP card
- USB xhci gen2 card
- Above cards connected through LeCROY PTC switch

Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: spear-de...@list.st.com
Cc: linux-kernel@vger.kernel.org
Cc: linux...@vger.kernel.org


Mohit Kumar (2):
  SPEAr13xx: defconfig: Update
  MAINTAINERS: Add ST SPEAr13xx PCIe driver maintainer

Pratyush Anand (6):
  clk: SPEAr13xx: Fix pcie clock name
  SPEAr13xx: Fix static mapping table
  phy: st-miphy-40lp: Add skeleton driver
  SPEAr13xx: Fixup: Move SPEAr1340 SATA platform code to phy driver
  phy: st-miphy-40lp: Add SPEAr1310 and SPEAr1340 PCIe phy support
  pcie: SPEAr13xx: Add designware pcie support

 .../devicetree/bindings/arm/spear-misc.txt |   4 +
 .../devicetree/bindings/pci/spear13xx-pcie.txt |   7 +
 .../devicetree/bindings/phy/st-miphy40lp.txt   |  12 +
 MAINTAINERS|   6 +
 arch/arm/boot/dts/spear1310-evb.dts|   4 +
 arch/arm/boot/dts/spear1310.dtsi   |  96 +++-
 arch/arm/boot/dts/spear1340-evb.dts|   4 +
 arch/arm/boot/dts/spear1340.dtsi   |  32 +-
 arch/arm/boot/dts/spear13xx.dtsi   |  10 +-
 arch/arm/configs/spear13xx_defconfig   |  15 +
 arch/arm/mach-spear/Kconfig|   3 +
 arch/arm/mach-spear/include/mach/spear.h   |   4 +-
 arch/arm/mach-spear/spear1340.c| 127 +
 arch/arm/mach-spear/spear13xx.c|   2 +-
 drivers/clk/spear/spear1310_clock.c|   6 +-
 drivers/clk/spear/spear1340_clock.c|   2 +-
 drivers/pci/host/Kconfig   |   5 +
 drivers/pci/host/Makefile  |   1 +
 drivers/pci/host/pcie-spear13xx.c  | 414 
 drivers/phy/Kconfig|   6 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-miphy40lp.c| 538 +
 22 files changed, 1160 insertions(+), 139 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/spear-misc.txt
 create mode 100644 Documentation/devicetree/bindings/pci/spear13xx-pcie.txt
 create mode 100644 Documentation/devicetree/bindings/phy/st-miphy40lp.txt
 create mode 100644 drivers/pci/host/pcie-spear13xx.c
 create mode 100644 drivers/phy/phy-miphy40lp.c

-- 
1.8.1.2

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Re: [rtc-linux] [PATCH 1/4] rtc: rtc-coh901331: Use devm_ioremap_resource()

2014-02-10 Thread Linus Walleij
On Fri, Feb 7, 2014 at 8:55 AM, Jingoo Han jg1@samsung.com wrote:

 Use devm_ioremap_resource() in order to make the code simpler,
 and remove redundant return value check of platform_get_resource()
 because the value is checked by devm_ioremap_resource().

 Signed-off-by: Jingoo Han jg1@samsung.com

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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WARNING: Unnecessary parentheses - maybe == should be = ?

2014-02-10 Thread Dan Carpenter
These messages are terrifying...  We do not want to encourage a million
first patch submitters to start introducing = vs == bugs.

Did you look through the warning messages this generates?  Was it ever
appropriate to change the == to =?

Please remove the second part of that message.

Also there needs to be a mailing list for checkpatch.pl.  LKML is a
write only archive, but it's not a discussion list.

Also the seq_puts() warning messages should be put under --strict
because we have to fight against people submitting those patches.

regards,
dan carpenter
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Re: [PATCH-v2 1/3] percpu_ida: Make percpu_ida_alloc + callers accept task state bitmask

2014-02-10 Thread Alexander Gordeev
On Thu, Jan 23, 2014 at 05:22:54PM +0100, Peter Zijlstra wrote:
 On Thu, Jan 23, 2014 at 05:28:29AM -0800, Kent Overstreet wrote:
  pool-lock is also going to be fairly badly contended in the worst case,
  and that can get real bad real fast... now that I think about it we
  probably want to avoid the __alloc_global_tag() double call just because
  of that, pool-lock is going to be quite a bit more contended than the
  waitlist lock just because fo the amount of work done under it.
 
 On top of the two previous; I think we can reduce pool-lock contention
 by not holding it while doing steal_tags().
 
 By dropping pool-lock around steal_tags() we loose serialization over:
 
   pool-cpus_have_tags is an atomic bitmask, and
   pool-cpu_last_stolem, that's a heuristic anyway, so sod it.
 
 We further loose the guarantee relied upon by percpu_ida_free(), so have
 it also acquire the tags-lock, which should be a far less contended
 resource.
 
 Now everything modifying percpu_ida_cpu state holds
 percpu_ida_cpu::lock, everything that modifies the actual percpu_ida
 freelists holds percpu_ida::lock, and percpu_ida_cpu::lock nests inside
 percpu_ida::lock.
 
 
 The only annoying thing is that we're still holding IRQs over
 steal_tags(), we should be able to make that a preempt_disable() without
 too much effort, or very much cheat and drop even that and rely on the
 percpu_ida_cpu::lock to serialize everything and just hope that we don't
 migrate too often.
 
 But that's for another patch.
 
 ---
 --- a/lib/percpu_ida.c
 +++ b/lib/percpu_ida.c
 @@ -68,8 +68,6 @@ static inline void steal_tags(struct per
   unsigned cpus_have_tags, cpu = pool-cpu_last_stolen;
   struct percpu_ida_cpu *remote;
  
 - lockdep_assert_held(pool-lock);
 -
   for (cpus_have_tags = cpumask_weight(pool-cpus_have_tags);
cpus_have_tags * pool-percpu_max_size  pool-nr_tags / 2;
cpus_have_tags--) {

Two concurrent threads find and unset the very same bit few lines below

cpu = cpumask_next(cpu, pool-cpus_have_tags);

[...]

cpumask_clear_cpu(cpu, pool-cpus_have_tags);

The second's thread unset races with cpumask_set_cpu() in percpu_ida_free()
or alloc_global_tag()

if (nr_free == 1) {
cpumask_set_cpu(smp_processor_id(),
pool-cpus_have_tags);
wake_up(pool-wait);
}

Which results in the woken thread does not find the (illegitimately) unset
bit while looping over the mask in steal_tags(). I suspect this or another
thread might enter an unwakable sleep as the number of bits in the mask
and number of threads in the waitqueue became unbalanced.

Hope, I am wrong here.

 @@ -141,18 +139,24 @@ static inline int alloc_global_tag(struc
 min(pool-nr_free, pool-percpu_batch_size));
   }
  
 + spin_unlock(pool-lock);
 +
   if (!tags-nr_free)
   steal_tags(pool, tags);
  
   if (tags-nr_free) {
 - tag = tags-freelist[--tags-nr_free];
 + spin_lock(tags-lock);
   if (tags-nr_free) {
 - cpumask_set_cpu(smp_processor_id(),
 - pool-cpus_have_tags);
 + tag = tags-freelist[--tags-nr_free];
 + if (tags-nr_free) {
 + cpumask_set_cpu(smp_processor_id(),
 + pool-cpus_have_tags);
 + }
   }
 + spin_unlock(tags-lock);
   }
  
 - spin_unlock_irqrestore(pool-lock, flags);
 + local_irq_restore(flags);
  
   return tag;
  }
 @@ -238,12 +242,8 @@ void percpu_ida_free(struct percpu_ida *
  
   if (nr_free == pool-percpu_max_size) {
   spin_lock(pool-lock);
 + spin_lock(tags-lock);
  
 - /*
 -  * Global lock held and irqs disabled, don't need percpu lock
 -  * because everybody accessing remote @tags will hold
 -  * pool-lock -- steal_tags().
 -  */
   if (tags-nr_free == pool-percpu_max_size) {
   move_tags(pool-freelist, pool-nr_free,
 tags-freelist, tags-nr_free,
 @@ -251,6 +251,8 @@ void percpu_ida_free(struct percpu_ida *
  
   wake_up(pool-wait);
   }
 +
 + spin_unlock(tags-lock);
   spin_unlock(pool-lock);
   }
  
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Regards,
Alexander Gordeev
agord...@redhat.com
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Re: [PATCH RFC/RFT v2 3/8] s390: move cacheinfo sysfs to generic cacheinfo infrastructure

2014-02-10 Thread Heiko Carstens
On Fri, Feb 07, 2014 at 04:49:18PM +, Sudeep Holla wrote:
 From: Sudeep Holla sudeep.ho...@arm.com
 
 This patch removes the redundant sysfs cacheinfo code by making use of
 the newly introduced generic cacheinfo infrastructure.
 
 Signed-off-by: Sudeep Holla sudeep.ho...@arm.com
 Cc: Martin Schwidefsky schwidef...@de.ibm.com
 Cc: Heiko Carstens heiko.carst...@de.ibm.com
 Cc: linux...@de.ibm.com
 Cc: linux-s...@vger.kernel.org
 ---

[...]

 diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
 index 2461202..1f875db 100644
 --- a/arch/s390/kernel/processor.c
 +++ b/arch/s390/kernel/processor.c
 @@ -58,7 +58,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
   if (hwcap_str[i]  (elf_hwcap  (1UL  i)))
   seq_printf(m, %s , hwcap_str[i]);
   seq_puts(m, \n);
 - show_cacheinfo(m);
   }
   get_online_cpus();
   if (cpu_online(n)) {

You can't remove that. It's a user space visible change.

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Re: make oldfonfig broken.

2014-02-10 Thread Gene Heskett
On Monday 10 February 2014, Randy Dunlap wrote:
[...]
 Gene, I want to make sure where you are saying the problem is.
 Is it going directly from 3.019 to 3.8.2, with no intervening kernel
 versions?
 
 No, one intermediate step in this case.
 
 I started with 3.0.19, which was fine, took that one to 3.2.40, and
 that one to 3.8.2 because I don't have anything between those here.
 Not exactly a step by step.
 
 and when you go from one kernel version to the next, do you use
 
 $ make oldconfig
 and answer all of its questions, or do you use
 
 I generally answer all its questions, or take the default by hitting
 enter, but I do read all its questions.
 
 $ yes '' | make oldconfig
 
 Never done that in all these years.
 
 or some other variant?  (I guess in your super build script.)
 
 This is long before my super script gets fired off.
 
 And that part is actually working well, run it as root, do a
 grub-update and reboot.
 
 Cheers, Gene

You need to have a Kconfig symbol named DVB_CORE enabled.

In 3.8.2 (and likely previously, but not in 3.2.40),
DVB_CORE depends on having both MEDIA_SUPPORT and
MEDIA_DIGITAL_TV_SUPPORT enabled.  Your .confile file  has MEDIA_SUPPORT
enabled but not
MEDIA_DIGITAL_TV_SUPPORT.

In your 3.2.40 kernel source tree, just edit your .config file and delete
the line that says:
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set

then run [1]
$ make oldconfig
and it will ask you how to set the Kconfig symbol.  Tell it 'y'.

and if you can find this line in your .config file:
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y

delete it. Run 'make oldconfig' again if you did so at [1] above.
For this Kconfig question:
  Autoselect tuners and i2c modules to build (MEDIA_SUBDRV_AUTOSELECT),
answer N.
Then you can select all of the tuners and frontends that you want.
There are LOTS of them to choose from.

IIRC, this all happened because someone decided that they could make the
AUTOSELECT driver feature Better!  ugh.

Good luck. Let me know if you need more guidance.

Printed. That sounds as if I ought to be able to do it, which I will take a 
shot at tomorrow.

Cheers, Gene
-- 
There are four boxes to be used in defense of liberty:
 soap, ballot, jury, and ammo. Please use in that order.
-Ed Howdershelt (Author)
Genes Web page http://geneslinuxbox.net:6309/gene

NOTICE: Will pay 100 USD for an HP-4815A defective but
complete probe assembly.

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[PATCH] MAINTAINERS: Update email address for bhalevy

2014-02-10 Thread Benny Halevy
Tonian is now Primary Data.

Signed-off-by: Benny Halevy bhal...@primarydata.com
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6a6e4ac..b42174d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6336,7 +6336,7 @@ F:drivers/net/wireless/orinoco/
 
 OSD LIBRARY and FILESYSTEM
 M: Boaz Harrosh bharr...@panasas.com
-M: Benny Halevy bhal...@tonian.com
+M: Benny Halevy bhal...@primarydata.com
 L: osd-...@open-osd.org
 W: http://open-osd.org
 T: git git://git.open-osd.org/open-osd.git
-- 
1.8.3.1

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Re: [PATCH 2/2] gpiolib: ACPI: remove gpio_to_desc() usage

2014-02-10 Thread Mika Westerberg
On Sun, Feb 09, 2014 at 05:43:55PM +0900, Alexandre Courbot wrote:
 gpio_to_desc() must die. Replace one of its usage by the
 newly-introduced gpiochip_get_desc() function.
 
 Signed-off-by: Alexandre Courbot acour...@nvidia.com
 ---
 Mika, can we have your review on this?

Sure, looks good.

Reviewed-by: Mika Westerberg mika.westerb...@linux.intel.com
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Re: [PATCH 1/2] gpiolib: add gpiochip_get_desc() driver function

2014-02-10 Thread Mika Westerberg
On Sun, Feb 09, 2014 at 05:43:54PM +0900, Alexandre Courbot wrote:
 Some drivers dealing with a gpio_chip might need to act on its
 descriptors directly; one example is pinctrl drivers that need to lock a
 GPIO for being used as IRQ using gpiod_lock_as_irq().
 
 This patch exports a gpiochip_get_desc() function that returns the
 GPIO descriptor at the requested index. It also sweeps the
 gpio_to_chip() function out of the consumer interface since any holder
 of a gpio_chip reference can manipulate its GPIOs way beyond what a
 consumer should be allowed to do.
 
 As a result, gpio_chip is not visible anymore to simple GPIO consumers.
 
 Signed-off-by: Alexandre Courbot acour...@nvidia.com
 ---
 Jean-Jacques, I think you will want to use this function for locking GPIOs
 in the AT91 pinctrl driver. Mika, we talked about this a while ago already,
 but here it is finally. Next patch uses it in the GPIO ACPI driver.

This seems to be useful for ACPI GPIO operation region implementation as
well.

Reviewed-by: Mika Westerberg mika.westerb...@linux.intel.com
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Re: [PATCH 2/7] ARM: lpc32xx: don't select HAVE_PWM

2014-02-10 Thread Roland Stigge
On 10/02/14 02:09, Jingoo Han wrote:
 The HAVE_PWM symbol is only for legacy platforms that provide
 the PWM API without using the generic framework. The lpc32xx
 platforms use the generic PWM framework, after the commit 2132fa8
 pwm: add lpc32xx PWM support.
 
 Signed-off-by: Jingoo Han jg1@samsung.com
 ---
  arch/arm/Kconfig |1 -
  1 file changed, 1 deletion(-)
 
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index e254198..897fa15 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -632,7 +632,6 @@ config ARCH_LPC32XX
   select CPU_ARM926T
   select GENERIC_CLOCKEVENTS
   select HAVE_IDE
 - select HAVE_PWM
   select USB_ARCH_HAS_OHCI
   select USE_OF
   help
 

Acked-by: Roland Stigge sti...@antcom.de
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[PATCH 09/17] i2c: i2c-mv64xxx: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-mv64xxx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 8be7e42..05801c6 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -851,7 +851,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
drv_data-adapter.dev.parent = pd-dev;
drv_data-adapter.algo = mv64xxx_i2c_algo;
drv_data-adapter.owner = THIS_MODULE;
-   drv_data-adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+   drv_data-adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED;
drv_data-adapter.nr = pd-id;
drv_data-adapter.dev.of_node = pd-dev.of_node;
platform_set_drvdata(pd, drv_data);
-- 
1.8.5.1

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[PATCH 03/17] i2c: i2c-omap: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Jean Delvare kh...@linux-fr.org
---

 drivers/i2c/busses/i2c-omap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 90dcc2e..8e29004 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1238,7 +1238,7 @@ omap_i2c_probe(struct platform_device *pdev)
adap = dev-adapter;
i2c_set_adapdata(adap, dev);
adap-owner = THIS_MODULE;
-   adap-class = I2C_CLASS_HWMON;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
strlcpy(adap-name, OMAP I2C adapter, sizeof(adap-name));
adap-algo = omap_i2c_algo;
adap-dev.parent = pdev-dev;
-- 
1.8.5.1

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Re: [RFC PATCH V5] mm readahead: Fix readahead fail for no local memory and limit readahead pages

2014-02-10 Thread David Rientjes
On Mon, 10 Feb 2014, Raghavendra K T wrote:

 As you rightly pointed , I 'll drop remote memory term and use
 something like  :
 
 * Ensure readahead success on a memoryless node cpu. But we limit
  * the readahead to 4k pages to avoid trashing page cache. ..
 

I don't know how to proceed here after pointing it out twice, I'm afraid.

numa_mem_id() is local memory for a memoryless node.  node_present_pages() 
has no place in your patch.

 Regarding ACCESS_ONCE, since we will have to add
 inside the function and still there is nothing that could prevent us
 getting run on different cpu with a different node (as Andrew ponted), I have
 not included in current patch that I am posting.
 Moreover this case is hopefully not fatal since it is just a hint for
 readahead we can do.
 

I have no idea why you think the ACCESS_ONCE() is a problem.  It's relying 
on gcc's implementation to ensure that the equation is done only for one 
node.  It has absolutely nothing to do with the fact that the process may 
be moved to another cpu upon returning or even immediately after the 
calculation is done.  Is it possible that node0 has 80% of memory free and 
node1 has 80% of memory inactive?  Well, then your equation doesn't work 
quite so well if the process moves.

There is no downside whatsoever to using it, I have no idea why you think 
it's better without it.

 So there are many possible implementation:
 (1) use numa_mem_id(), apply freepage limit  and use 4k page limit for all
 case
 (Jan had reservation about this case)
 
 (2)for normal case:use free memory calculation and do not apply 4k
 limit (no change).
for memoryless cpu case:  use numa_mem_id for more accurate
 calculation of limit and also apply 4k limit.
 
 (3) for normal case:   use free memory calculation and do not apply 4k
 limit (no change).
 for memoryless case: apply 4k page limit
 
 (4) use numa_mem_id() and apply only free page limit..
 
 So, I ll be resending the patch with changelog and comment changes
 based on your and Andrew's feedback (type (3) implementation).
 

It's frustrating to have to say something three times.  Ask yourself what 
happens if ALL NODES WITH CPUS DO NOT HAVE MEMORY?
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[PATCH 16/17] i2c: i2c-tegra: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Laxman Dewangan ldewan...@nvidia.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Thierry Reding thierry.red...@gmail.com
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index e661ede..a9adbbe 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -787,7 +787,7 @@ static int tegra_i2c_probe(struct platform_device *pdev)
 
i2c_set_adapdata(i2c_dev-adapter, i2c_dev);
i2c_dev-adapter.owner = THIS_MODULE;
-   i2c_dev-adapter.class = I2C_CLASS_HWMON;
+   i2c_dev-adapter.class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
strlcpy(i2c_dev-adapter.name, Tegra I2C adapter,
sizeof(i2c_dev-adapter.name));
i2c_dev-adapter.algo = tegra_i2c_algo;
-- 
1.8.5.1

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[PATCH 17/17] i2c: i2c-xiic: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-xiic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index fc2716a..6bda167 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -682,7 +682,7 @@ static const struct i2c_algorithm xiic_algorithm = {
 static struct i2c_adapter xiic_adapter = {
.owner  = THIS_MODULE,
.name   = DRIVER_NAME,
-   .class  = I2C_CLASS_HWMON | I2C_CLASS_SPD,
+   .class  = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED,
.algo   = xiic_algorithm,
 };
 
-- 
1.8.5.1

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[PATCH 14/17] i2c: i2c-sirf: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Barry Song bao...@kernel.org
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-sirf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-sirf.c b/drivers/i2c/busses/i2c-sirf.c
index 6784f7f..8e3be7e 100644
--- a/drivers/i2c/busses/i2c-sirf.c
+++ b/drivers/i2c/busses/i2c-sirf.c
@@ -312,7 +312,7 @@ static int i2c_sirfsoc_probe(struct platform_device *pdev)
goto out;
}
adap = siic-adapter;
-   adap-class = I2C_CLASS_HWMON;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
 
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
siic-base = devm_ioremap_resource(pdev-dev, mem_res);
-- 
1.8.5.1

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[PATCH 15/17] i2c: i2c-stu300: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Linus Walleij linus.wall...@linaro.org
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-stu300.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 04a17b9..d381af9 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -911,7 +911,7 @@ static int stu300_probe(struct platform_device *pdev)
adap = dev-adapter;
adap-owner = THIS_MODULE;
/* DDC class but actually often used for more generic I2C */
-   adap-class = I2C_CLASS_DDC;
+   adap-class = I2C_CLASS_DDC | I2C_CLASS_DEPRECATED;
strlcpy(adap-name, ST Microelectronics DDC I2C adapter,
sizeof(adap-name));
adap-nr = bus_nr;
-- 
1.8.5.1

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Re: [RFC PATCH] rcu: move SRCU grace period work to power efficient workqueue

2014-02-10 Thread Lai Jiangshan
Acked-by: Lai Jiangshan la...@cn.fujitsu.com

On 02/01/2014 03:53 AM, Zoran Markovic wrote:
 From: Shaibal Dutta shaibal.du...@broadcom.com
 
 For better use of CPU idle time, allow the scheduler to select the CPU
 on which the SRCU grace period work would be scheduled. This improves
 idle residency time and conserves power.
 
 This functionality is enabled when CONFIG_WQ_POWER_EFFICIENT is selected.
 
 Cc: Lai Jiangshan la...@cn.fujitsu.com
 Cc: Paul E. McKenney paul...@linux.vnet.ibm.com
 Cc: Dipankar Sarma dipan...@in.ibm.com
 Signed-off-by: Shaibal Dutta shaibal.du...@broadcom.com
 [zoran.marko...@linaro.org: Rebased to latest kernel version. Added commit
 message. Fixed code alignment.]
 ---
  kernel/rcu/srcu.c |5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)
 
 diff --git a/kernel/rcu/srcu.c b/kernel/rcu/srcu.c
 index 3318d82..a1ebe6d 100644
 --- a/kernel/rcu/srcu.c
 +++ b/kernel/rcu/srcu.c
 @@ -398,7 +398,7 @@ void call_srcu(struct srcu_struct *sp, struct rcu_head 
 *head,
   rcu_batch_queue(sp-batch_queue, head);
   if (!sp-running) {
   sp-running = true;
 - schedule_delayed_work(sp-work, 0);
 + queue_delayed_work(system_power_efficient_wq, sp-work, 0);
   }
   spin_unlock_irqrestore(sp-queue_lock, flags);
  }
 @@ -674,7 +674,8 @@ static void srcu_reschedule(struct srcu_struct *sp)
   }
  
   if (pending)
 - schedule_delayed_work(sp-work, SRCU_INTERVAL);
 + queue_delayed_work(system_power_efficient_wq,
 +sp-work, SRCU_INTERVAL);
  }
  
  /*

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Re: WARNING: CPU: 1 PID: 0 at kernel/time/tick-broadcast.c:668 tick_broadcast_oneshot_control+0x17d/0x190()

2014-02-10 Thread Thomas Gleixner
On Mon, 10 Feb 2014, poma wrote:

 [   83.558551]  [81025b17] amd_e400_idle+0x87/0x130

So this seems to happen only on AMD machines which use that e400 idle
mode. I have no idea at the moment whats wrong there. I'll find one of
those machines and try to reproduce.

Thanks,

tglx




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[PATCH 13/17] i2c: i2c-s3c2410: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-s3c2410.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index bf8fb94..4a623e0 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -1062,7 +1062,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
i2c-adap.owner   = THIS_MODULE;
i2c-adap.algo= s3c24xx_i2c_algorithm;
i2c-adap.retries = 2;
-   i2c-adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+   i2c-adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED;
i2c-tx_setup = 50;
 
init_waitqueue_head(i2c-wait);
-- 
1.8.5.1

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[PATCH 07/17] i2c: i2c-davinci: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Sekhar Nori nsek...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-davinci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index af0b583..389bc68 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -712,7 +712,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
adap = dev-adapter;
i2c_set_adapdata(adap, dev);
adap-owner = THIS_MODULE;
-   adap-class = I2C_CLASS_HWMON;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
strlcpy(adap-name, DaVinci I2C adapter, sizeof(adap-name));
adap-algo = i2c_davinci_algo;
adap-dev.parent = pdev-dev;
-- 
1.8.5.1

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Re: [PATCH part1 v5 5/7] PCI: Add pci_dummy_ops to isolate pci device temporarily

2014-02-10 Thread Oliver Neukum
On Mon, 2014-02-10 at 15:59 +0800, Yijing Wang wrote:
 Hi Oliver,
Thanks for your review and comments!
 
  +static DEFINE_SPINLOCK(pci_freeze_lock);
  
  The lock is used only here.
 
 Also be used in pci_bus_unfreeze_device();

Sorry, I meant only in this patch.

 
  
  +/**
  + * pci_bus_freeze_device - freeze pci bus to access pci device
  + * @bus: the pci bus to freeze
  + *
  + * Replace pci bus ops by pci_dummy_ops, protect system from
  + * accessing pci devices.
  + */
  +void pci_bus_freeze_device(struct pci_bus *bus)
  +{
  +  struct pci_ops *ops;
  +  unsigned long flags;
  +
  +  spin_lock_irqsave(pci_freeze_lock, flags);
  +  ops = pci_bus_set_ops(bus, pci_dummy_ops);
  +  bus-save_ops = ops;
  +  spin_unlock_irqrestore(pci_freeze_lock, flags);
  
  Against what exactly are you locking here?
 
 I want to use this spin lock to serialize freeze device and unfreeze device.

Yes, but against what? I am sorry I should have been more explicit.
You are using these functions only in pci_scan_single_device()


CPU A   CPU B
pci_bus_freeze_device() wait
bus-save_ops = ops {valid} wait
... pci_bus_freeze_device()
waitbus-save_ops = ops
{pci_dummy_ops !}
pci_bus_unfreeze_device()   wait
pci_bus_set_ops(bus, bus-save_ops)

You see the problem?

If this function ever races with itself, the locking is useless.
If it doesn't race with itself, the locking is not needed.
If this function can really race with itself, you need a refcount
for freezing.

Regards
Oliver


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[PATCH 12/17] i2c: i2c-rcar: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-rcar.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 2c2fd7c..a4951de 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -691,7 +691,7 @@ static int rcar_i2c_probe(struct platform_device *pdev)
adap= priv-adap;
adap-nr= pdev-id;
adap-algo  = rcar_i2c_algo;
-   adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED;
adap-retries   = 3;
adap-dev.parent= dev;
adap-dev.of_node   = dev-of_node;
-- 
1.8.5.1

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[PATCH 01/17] Documentation: i2c: describe devicetree method for instantiating devices

2014-02-10 Thread Wolfram Sang
Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
---

 Documentation/i2c/instantiating-devices | 34 +++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/Documentation/i2c/instantiating-devices 
b/Documentation/i2c/instantiating-devices
index c70e7a7..6df095a 100644
--- a/Documentation/i2c/instantiating-devices
+++ b/Documentation/i2c/instantiating-devices
@@ -8,8 +8,8 @@ reason, the kernel code must instantiate I2C devices 
explicitly. There are
 several ways to achieve this, depending on the context and requirements.
 
 
-Method 1: Declare the I2C devices by bus number

+Method 1a: Declare the I2C devices by bus number
+
 
 This method is appropriate when the I2C bus is a system bus as is the case
 for many embedded systems. On such systems, each I2C bus has a number
@@ -51,6 +51,36 @@ The devices will be automatically unbound and destroyed when 
the I2C bus
 they sit on goes away (if ever.)
 
 
+Method 1b: Declare the I2C devices via devicetree
+-
+
+This method has the same implications as method 1a. The declaration of I2C
+devices is here done via devicetree as subnodes of the master controller.
+
+Example:
+
+   i2c1: i2c@400a {
+   /* ... master properties skipped ... */
+   clock-frequency = 10;
+
+   flash@50 {
+   compatible = atmel,24c256;
+   reg = 0x50;
+   };
+
+   pca9532: gpio@60 {
+   compatible = nxp,pca9532;
+   gpio-controller;
+   #gpio-cells = 2;
+   reg = 0x60;
+   };
+   };
+
+Here, two devices are attached to the bus using a speed of 100kHz. For
+additional properties which might be needed to set up the device, please refer
+to its devicetree documentation in Documentation/devicetree/bindings/.
+
+
 Method 2: Instantiate the devices explicitly
 
 
-- 
1.8.5.1

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[PATCH 10/17] i2c: i2c-nomadik: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Alessandro Rubini rub...@unipv.it
Cc: Linus Walleij linus.wall...@linaro.org
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-nomadik.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index 8bf9ac0..e3777ac 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -1019,7 +1019,7 @@ static int nmk_i2c_probe(struct amba_device *adev, const 
struct amba_id *id)
adap-dev.of_node = np;
adap-dev.parent = adev-dev;
adap-owner = THIS_MODULE;
-   adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED;
adap-algo  = nmk_i2c_algo;
adap-timeout   = msecs_to_jiffies(pdata-timeout);
snprintf(adap-name, sizeof(adap-name),
-- 
1.8.5.1

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[PATCH 08/17] i2c: i2c-designware-platdrv: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-designware-platdrv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c 
b/drivers/i2c/busses/i2c-designware-platdrv.c
index d0bdac0..d348940 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -195,7 +195,7 @@ static int dw_i2c_probe(struct platform_device *pdev)
adap = dev-adapter;
i2c_set_adapdata(adap, dev);
adap-owner = THIS_MODULE;
-   adap-class = I2C_CLASS_HWMON;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
strlcpy(adap-name, Synopsys DesignWare I2C adapter,
sizeof(adap-name));
adap-algo = i2c_dw_algo;
-- 
1.8.5.1

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[PATCH 11/17] i2c: i2c-ocores: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Peter Korsgaard jac...@sunsite.dk
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-ocores.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index c61f37a..f49fe26 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -247,7 +247,7 @@ static const struct i2c_algorithm ocores_algorithm = {
 static struct i2c_adapter ocores_adapter = {
.owner  = THIS_MODULE,
.name   = i2c-ocores,
-   .class  = I2C_CLASS_HWMON | I2C_CLASS_SPD,
+   .class  = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
I2C_CLASS_DEPRECATED,
.algo   = ocores_algorithm,
 };
 
-- 
1.8.5.1

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[PATCH 06/17] i2c: i2c-bfin-twi: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Sonic Zhang sonic.zh...@analog.com
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-bfin-twi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-bfin-twi.c 
b/drivers/i2c/busses/i2c-bfin-twi.c
index 3b9bd9a..c75f0e9 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -669,7 +669,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
strlcpy(p_adap-name, pdev-name, sizeof(p_adap-name));
p_adap-algo = bfin_twi_algorithm;
p_adap-algo_data = iface;
-   p_adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+   p_adap-class = I2C_CLASS_HWMON | I2C_CLASS_SPD | I2C_CLASS_DEPRECATED;
p_adap-dev.parent = pdev-dev;
p_adap-timeout = 5 * HZ;
p_adap-retries = 3;
-- 
1.8.5.1

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Re: [PATCH V2 3/3] sched: Move idle_stamp up to the core

2014-02-10 Thread Preeti Murthy
Hi Daniel,

On Fri, Feb 7, 2014 at 4:40 AM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
 The idle_balance modifies the idle_stamp field of the rq, making this
 information to be shared across core.c and fair.c. As we can know if the
 cpu is going to idle or not with the previous patch, let's encapsulate the
 idle_stamp information in core.c by moving it up to the caller. The
 idle_balance function returns true in case a balancing occured and the cpu
 won't be idle, false if no balance happened and the cpu is going idle.

 Cc: mi...@kernel.org
 Cc: alex@linaro.org
 Cc: pet...@infradead.org
 Signed-off-by: Daniel Lezcano daniel.lezc...@linaro.org
 Signed-off-by: Peter Zijlstra pet...@infradead.org
 ---
  kernel/sched/core.c  |   13 +++--
  kernel/sched/fair.c  |   14 ++
  kernel/sched/sched.h |8 +---
  3 files changed, 18 insertions(+), 17 deletions(-)

 diff --git a/kernel/sched/core.c b/kernel/sched/core.c
 index 16b97dd..428ee4c 100644
 --- a/kernel/sched/core.c
 +++ b/kernel/sched/core.c
 @@ -2704,8 +2704,17 @@ need_resched:

 pre_schedule(rq, prev);

 -   if (unlikely(!rq-nr_running))
 -   idle_balance(rq);
 +#ifdef CONFIG_SMP
 +   if (unlikely(!rq-nr_running)) {
 +   /*
 +* We must set idle_stamp _before_ calling idle_balance(), 
 such
 +* that we measure the duration of idle_balance() as idle 
 time.

Should not this be such that we *do not* measure the duration of idle_balance()
as idle time?

Thanks

Regards
Preeti U Murthy
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[PATCH 05/17] i2c: i2c-bcm2835: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
---

This patch is a suggestion. Looking for an ack by someone who actually uses
the driver.

 drivers/i2c/busses/i2c-bcm2835.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 77df97b..6722808 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -295,7 +295,7 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
adap = i2c_dev-adapter;
i2c_set_adapdata(adap, i2c_dev);
adap-owner = THIS_MODULE;
-   adap-class = I2C_CLASS_HWMON;
+   adap-class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
strlcpy(adap-name, bcm2835 I2C adapter, sizeof(adap-name));
adap-algo = bcm2835_i2c_algo;
adap-dev.parent = pdev-dev;
-- 
1.8.5.1

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[PATCH 02/17] i2c: add deprecation warning for class based instantiation

2014-02-10 Thread Wolfram Sang
Class based instantiation can cause noticeable delays when booting. This
mechanism is used when it is not possible to describe slaves on I2C
busses. As we do have other mechanisms, most embedded I2C will not need
classes and for embedded it is explicitly not recommended to use them. Add
a deprecation warning for drivers which want to disable class based
instantiation in the near future to gain boot-up time, so users relying
on this technique can switch to something better. They really should.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Jean Delvare kh...@linux-fr.org
Cc: linux-arm-ker...@lists.infradead.org
---

 drivers/i2c/i2c-core.c | 7 +++
 include/linux/i2c.h| 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index d74c0b3..42fcc59 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -1935,6 +1935,13 @@ static int i2c_detect_address(struct i2c_client 
*temp_client,
struct i2c_client *client;
 
/* Detection succeeded, instantiate the device */
+   if (adapter-class  I2C_CLASS_DEPRECATED)
+   dev_warn(adapter-dev,
+   This adapter will soon drop class based 
instantiation of devices. 
+   Please make sure client 0x%02x gets 
instantiated by other means. 
+   Check 
'Documentation/i2c/instantiating-devices' for details.\n,
+   info.addr);
+
dev_dbg(adapter-dev, Creating %s at 0x%02x\n,
info.type, info.addr);
client = i2c_new_device(adapter, info);
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index d9c8dbd3..b9e1707 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -473,6 +473,7 @@ void i2c_unlock_adapter(struct i2c_adapter *);
 #define I2C_CLASS_HWMON(10)  /* lm_sensors, ... */
 #define I2C_CLASS_DDC  (13)  /* DDC bus on graphics adapters */
 #define I2C_CLASS_SPD  (17)  /* Memory modules */
+#define I2C_CLASS_DEPRECATED   (18)  /* Warn users that adapter will stop 
using classes */
 
 /* Internal numbers to terminate lists */
 #define I2C_CLIENT_END 0xfffeU
-- 
1.8.5.1

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[PATCH v6 1/3] ARM: EXYNOS: Add support for EXYNOS5410 SoC

2014-02-10 Thread Tarek Dakhran
EXYNOS5410 is SoC in Samsung's Exynos5 SoC series.
Add initial support for this SoC.

Signed-off-by: Tarek Dakhran t.dakh...@samsung.com
Signed-off-by: Vyacheslav Tyrtov v.tyr...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |   10 ++
 arch/arm/mach-exynos/common.c|   18 ++
 arch/arm/mach-exynos/include/mach/map.h  |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c   |1 +
 arch/arm/mach-exynos/platsmp.c   |2 ++
 arch/arm/plat-samsung/include/plat/cpu.h |8 
 arch/arm/plat-samsung/include/plat/map-s5p.h |3 +++
 7 files changed, 43 insertions(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 4c414af..97a06c3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -91,6 +91,16 @@ config SOC_EXYNOS5250
help
  Enable EXYNOS5250 SoC support
 
+config SOC_EXYNOS5410
+   bool SAMSUNG EXYNOS5410
+   default y
+   depends on ARCH_EXYNOS5
+   select PM_GENERIC_DOMAINS if PM
+   select S5P_PM if PM_SLEEP
+   select S5P_SLEEP if PM_SLEEP
+   help
+ Enable EXYNOS5410 SoC support
+
 config SOC_EXYNOS5420
bool SAMSUNG EXYNOS5420
default y
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f18be40..f1483bd 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -52,6 +52,7 @@ static const char name_exynos4210[] = EXYNOS4210;
 static const char name_exynos4212[] = EXYNOS4212;
 static const char name_exynos4412[] = EXYNOS4412;
 static const char name_exynos5250[] = EXYNOS5250;
+static const char name_exynos5410[] = EXYNOS5410;
 static const char name_exynos5420[] = EXYNOS5420;
 static const char name_exynos5440[] = EXYNOS5440;
 
@@ -85,6 +86,12 @@ static struct cpu_table cpu_ids[] __initdata = {
.init   = exynos_init,
.name   = name_exynos5250,
}, {
+   .idcode = EXYNOS5410_SOC_ID,
+   .idmask = EXYNOS5_SOC_MASK,
+   .map_io = exynos5_map_io,
+   .init   = exynos_init,
+   .name   = name_exynos5410,
+   }, {
.idcode = EXYNOS5420_SOC_ID,
.idmask = EXYNOS5_SOC_MASK,
.map_io = exynos5_map_io,
@@ -215,6 +222,15 @@ static struct map_desc exynos4x12_iodesc[] __initdata = {
},
 };
 
+static struct map_desc exynos5410_iodesc[] __initdata = {
+   {
+   .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+   .pfn= __phys_to_pfn(EXYNOS5410_PA_SYSRAM_NS),
+   .length = SZ_4K,
+   .type   = MT_DEVICE,
+   },
+};
+
 static struct map_desc exynos5250_iodesc[] __initdata = {
{
.virtual= (unsigned long)S5P_VA_SYSRAM_NS,
@@ -379,6 +395,8 @@ static void __init exynos5_map_io(void)
 
if (soc_is_exynos5250())
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+   if (soc_is_exynos5410())
+   iotable_init(exynos5410_iodesc, ARRAY_SIZE(exynos5410_iodesc));
 }
 
 struct bus_type exynos_subsys = {
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..894f431 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -29,6 +29,7 @@
 #define EXYNOS4210_PA_SYSRAM_NS0x0203F000
 #define EXYNOS4x12_PA_SYSRAM_NS0x0204F000
 #define EXYNOS5250_PA_SYSRAM_NS0x0204F000
+#define EXYNOS5410_PA_SYSRAM_NS0x02073000
 
 #define EXYNOS_PA_CHIPID   0x1000
 
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 37ea261..22245b2 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -51,6 +51,7 @@ static void __init exynos5_dt_machine_init(void)
 
 static char const *exynos5_dt_compat[] __initdata = {
samsung,exynos5250,
+   samsung,exynos5410,
samsung,exynos5420,
samsung,exynos5440,
NULL
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 8ea02f6..b681f89 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -39,6 +39,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
 {
if (soc_is_exynos4210()  samsung_rev() == EXYNOS4210_REV_1_1)
return S5P_INFORM5;
+   if (soc_is_exynos5410())
+   return EXYNOS5410_BOOT_REG;
return S5P_VA_SYSRAM;
 }
 
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h 
b/arch/arm/plat-samsung/include/plat/cpu.h
index 335beb3..8f09488 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ 

[PATCH v6 0/3] Exynos 5410 support

2014-02-10 Thread Tarek Dakhran
The series of patches represent support of Exynos 5410 SoC

The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture

Patches add new platform description, support of clock controller and device 
tree for Exynos 5410.

Dual cluster support for Exynos 5410 (EDCS) has been removed from this series 
This patches is activating only the big cluster (2xA15 cores)

EDCS patch, which allows all 8 CPU cores (4 x A7 and 4 x A15) 
to run at the same time, will be released separately

Has been build on v3.14-rc1
Has been tested on Exynos 5410 reference board (exynos_defconfig)

Thanks for all your comments to Tomasz Figa, Dave Martin and Nicolas Pitre.
I hope, this is enough clean and hasn't any dependencies to go through 
Samsung tree.

Tarek.


Changelog:

v6:
small changes in Makefiles for resolving conflicts related to changes 
in 
Samsung tree.

Tarek Dakhran (3):
  ARM: EXYNOS: Add support for EXYNOS5410 SoC
  clk: exynos5410: register clocks using common clock framework
  ARM: dts: Add initial device tree support for EXYNOS5410

 .../devicetree/bindings/clock/exynos5410-clock.txt |   54 +
 arch/arm/boot/dts/Makefile |1 +
 arch/arm/boot/dts/exynos5410-smdk5410.dts  |   72 ++
 arch/arm/boot/dts/exynos5410.dtsi  |  140 
 arch/arm/mach-exynos/Kconfig   |   10 +
 arch/arm/mach-exynos/common.c  |   18 ++
 arch/arm/mach-exynos/include/mach/map.h|1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c |1 +
 arch/arm/mach-exynos/platsmp.c |2 +
 arch/arm/plat-samsung/include/plat/cpu.h   |8 +
 arch/arm/plat-samsung/include/plat/map-s5p.h   |3 +
 drivers/clk/samsung/Makefile   |1 +
 drivers/clk/samsung/clk-exynos5410.c   |  239 
 include/dt-bindings/clock/exynos5410.h |   32 +++
 14 files changed, 582 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/exynos5410-clock.txt
 create mode 100644 arch/arm/boot/dts/exynos5410-smdk5410.dts
 create mode 100644 arch/arm/boot/dts/exynos5410.dtsi
 create mode 100644 drivers/clk/samsung/clk-exynos5410.c
 create mode 100644 include/dt-bindings/clock/exynos5410.h

-- 
1.7.10.4

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[PATCH v6 2/3] clk: exynos5410: register clocks using common clock framework

2014-02-10 Thread Tarek Dakhran
The EXYNOS5410 clocks are statically listed and registered
using the Samsung specific common clock helper functions.

Signed-off-by: Tarek Dakhran t.dakh...@samsung.com
Signed-off-by: Vyacheslav Tyrtov v.tyr...@samsung.com
Acked-by: Tomasz Figa t.f...@samsung.com
---
 .../devicetree/bindings/clock/exynos5410-clock.txt |   54 +
 drivers/clk/samsung/Makefile   |1 +
 drivers/clk/samsung/clk-exynos5410.c   |  239 
 include/dt-bindings/clock/exynos5410.h |   32 +++
 4 files changed, 326 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/exynos5410-clock.txt
 create mode 100644 drivers/clk/samsung/clk-exynos5410.c
 create mode 100644 include/dt-bindings/clock/exynos5410.h

diff --git a/Documentation/devicetree/bindings/clock/exynos5410-clock.txt 
b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt
new file mode 100644
index 000..604a75c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt
@@ -0,0 +1,54 @@
+* Samsung Exynos5410 Clock Controller
+
+The Exynos5410 clock controller generates and supplies clock to various
+controllers within the Exynos5410 SoC.
+
+Required Properties:
+
+- compatible: should be samsung,exynos5410-clock
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/exynos5410.h header and can be used in device
+tree sources.
+
+External clock:
+
+There is clock that is generated outside the SoC. It is expected
+that it is defined using standard clock bindings with following
+clock-output-name:
+ - fin_pll - PLL input clock - required.
+
+Example 1: An example of a clock controller node is listed below.
+
+   clock: clock-controller@0x1001 {
+   compatible = samsung,exynos5410-clock;
+   reg = 0x1001 0x3;
+   #clock-cells = 1;
+   };
+
+Example 2: Required external clock.
+
+   fin_pll: clock-fin-pll {
+   compatible = fixed-clock;
+   reg = 0;
+   #clock-cells = 0;
+   clock-frequency = 2400;
+   clock-output-names = fin_pll;
+   };
+
+Example 3: UART controller node that consumes the clock generated by the clock
+  controller. Refer to the standard clock bindings for information
+  about 'clocks' and 'clock-names' property.
+
+   serial@12C2 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x12C0 0x100;
+   interrupts = 0 51 0;
+   clocks = clock CLK_UART0, clock CLK_SCLK_UART0;
+   clock-names = uart, clk_uart_baud0;
+   };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 8eb4799..b572dd7 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -5,6 +5,7 @@
 obj-$(CONFIG_COMMON_CLK)   += clk.o clk-pll.o
 obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
 obj-$(CONFIG_SOC_EXYNOS5250)   += clk-exynos5250.o
+obj-$(CONFIG_SOC_EXYNOS5410)   += clk-exynos5410.o
 obj-$(CONFIG_SOC_EXYNOS5420)   += clk-exynos5420.o
 obj-$(CONFIG_SOC_EXYNOS5440)   += clk-exynos5440.o
 obj-$(CONFIG_ARCH_EXYNOS)  += clk-exynos-audss.o
diff --git a/drivers/clk/samsung/clk-exynos5410.c 
b/drivers/clk/samsung/clk-exynos5410.c
new file mode 100644
index 000..33d8c8c
--- /dev/null
+++ b/drivers/clk/samsung/clk-exynos5410.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Tarek Dakhran t.dakh...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common Clock Framework support for Exynos5410 SoC.
+*/
+
+#include dt-bindings/clock/exynos5410.h
+
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/clk-provider.h
+#include linux/of.h
+#include linux/of_address.h
+
+#include clk.h
+
+#define APLL_LOCK   0x0
+#define APLL_CON0   0x100
+#define CPLL_LOCK   0x10020
+#define CPLL_CON0   0x10120
+#define MPLL_LOCK   0x4000
+#define MPLL_CON0   0x4100
+#define BPLL_LOCK   0x20010
+#define BPLL_CON0   0x20110
+#define KPLL_LOCK   0x28000
+#define KPLL_CON0   0x28100
+
+#define SRC_CPU0x200
+#define DIV_CPU0   0x500
+#define SRC_CPERI1 0x4204
+#define DIV_TOP0   0x10510
+#define DIV_TOP1   0x10514
+#define DIV_FSYS1  0x1054c
+#define DIV_FSYS2  0x10550
+#define DIV_PERIC0 0x10558
+#define SRC_TOP0   0x10210
+#define SRC_TOP1   0x10214
+#define SRC_TOP2   0x10218
+#define SRC_FSYS   0x10244

[PATCH 00/17] i2c: deprecate class based instantiation for embedded I2C drivers

2014-02-10 Thread Wolfram Sang
With I2C, class based instantiation means if a master driver has e.g.
I2C_CLASS_HWMON set, all slave drivers with this class will try to probe a
device using an array of possible addresses and some heuristics. That creates
traffic and needs time, even when nothing is connected. This mechanism is
needed when you do not have another method to describe the slaves. Embedded I2C
drivers do not need class based instantiation, since there is i2c_board_info or
devicetree description. Some drivers have the class flags set, though, and it
has spread further over the years. We can't remove the flags directly, because
there might be users out there relying on this feature. So, we add a
deprecation warning if a device is instantiated via class attributes. After
giving some time to switch over, we can then finally remove the class flags and
gain boot time.

Patch 1 adds some missing documentation. Patch 2 adds the deprecation feature.
Patches 3+4 are tested on hardware I need. Patches 5-17 are suggestions for
drivers I think could benefit from that. For those, acks are needed before I
will apply them to my tree. If you use a different driver which can also
benefit from this, just send a patch adding the new DEPRECATED flag.

The series can also be found here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/deprecated_class

Thanks,

   Wolfram


Wolfram Sang (17):
  Documentation: i2c: describe devicetree method for instantiating
devices
  i2c: add deprecation warning for class based instantiation
  i2c: i2c-omap: deprecate class based instantiation
  i2c: i2c-at91: deprecate class based instantiation
  i2c: i2c-bcm2835: deprecate class based instantiation
  i2c: i2c-bfin-twi: deprecate class based instantiation
  i2c: i2c-davinci: deprecate class based instantiation
  i2c: i2c-designware-platdrv: deprecate class based instantiation
  i2c: i2c-mv64xxx: deprecate class based instantiation
  i2c: i2c-nomadik: deprecate class based instantiation
  i2c: i2c-ocores: deprecate class based instantiation
  i2c: i2c-rcar: deprecate class based instantiation
  i2c: i2c-s3c2410: deprecate class based instantiation
  i2c: i2c-sirf: deprecate class based instantiation
  i2c: i2c-stu300: deprecate class based instantiation
  i2c: i2c-tegra: deprecate class based instantiation
  i2c: i2c-xiic: deprecate class based instantiation

 Documentation/i2c/instantiating-devices | 34 +++--
 drivers/i2c/busses/i2c-at91.c   |  2 +-
 drivers/i2c/busses/i2c-bcm2835.c|  2 +-
 drivers/i2c/busses/i2c-bfin-twi.c   |  2 +-
 drivers/i2c/busses/i2c-davinci.c|  2 +-
 drivers/i2c/busses/i2c-designware-platdrv.c |  2 +-
 drivers/i2c/busses/i2c-mv64xxx.c|  2 +-
 drivers/i2c/busses/i2c-nomadik.c|  2 +-
 drivers/i2c/busses/i2c-ocores.c |  2 +-
 drivers/i2c/busses/i2c-omap.c   |  2 +-
 drivers/i2c/busses/i2c-rcar.c   |  2 +-
 drivers/i2c/busses/i2c-s3c2410.c|  2 +-
 drivers/i2c/busses/i2c-sirf.c   |  2 +-
 drivers/i2c/busses/i2c-stu300.c |  2 +-
 drivers/i2c/busses/i2c-tegra.c  |  2 +-
 drivers/i2c/busses/i2c-xiic.c   |  2 +-
 drivers/i2c/i2c-core.c  |  7 ++
 include/linux/i2c.h |  1 +
 18 files changed, 55 insertions(+), 17 deletions(-)

-- 
1.8.5.1

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[PATCH 04/17] i2c: i2c-at91: deprecate class based instantiation

2014-02-10 Thread Wolfram Sang
Warn users that class based instantiation is going away soon in favour
of more robust probing and faster bootup times.

Signed-off-by: Wolfram Sang w...@the-dreams.de
Cc: Ludovic Desroches ludovic.desroc...@atmel.com
---

 drivers/i2c/busses/i2c-at91.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 8edba9d..4babcdb 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -759,7 +759,7 @@ static int at91_twi_probe(struct platform_device *pdev)
snprintf(dev-adapter.name, sizeof(dev-adapter.name), AT91);
i2c_set_adapdata(dev-adapter, dev);
dev-adapter.owner = THIS_MODULE;
-   dev-adapter.class = I2C_CLASS_HWMON;
+   dev-adapter.class = I2C_CLASS_HWMON | I2C_CLASS_DEPRECATED;
dev-adapter.algo = at91_twi_algorithm;
dev-adapter.dev.parent = dev-dev;
dev-adapter.nr = pdev-id;
-- 
1.8.5.1

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[PATCH v6 3/3] ARM: dts: Add initial device tree support for EXYNOS5410

2014-02-10 Thread Tarek Dakhran
Add initial device tree nodes for EXYNOS5410 SoC and SMDK5410 board.

Signed-off-by: Tarek Dakhran t.dakh...@samsung.com
Signed-off-by: Vyacheslav Tyrtov v.tyr...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/boot/dts/Makefile|1 +
 arch/arm/boot/dts/exynos5410-smdk5410.dts |   72 +++
 arch/arm/boot/dts/exynos5410.dtsi |  140 +
 3 files changed, 213 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5410-smdk5410.dts
 create mode 100644 arch/arm/boot/dts/exynos5410.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..693dcdc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -73,6 +73,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
exynos5420-arndale-octa.dtb \
+   exynos5410-smdk5410.dtb \
exynos5420-smdk5420.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb
diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts 
b/arch/arm/boot/dts/exynos5410-smdk5410.dts
new file mode 100644
index 000..7ffd351
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
@@ -0,0 +1,72 @@
+/*
+ * SAMSUNG SMDK5410 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include exynos5410.dtsi
+/ {
+   model = Samsung SMDK5410 board based on EXYNOS5410;
+   compatible = samsung,smdk5410, samsung,exynos5410;
+
+   memory {
+   reg = 0x4000 0x8000;
+   };
+
+   chosen {
+   bootargs = console=ttySAC2,115200;
+   };
+
+   clocks {
+   compatible = simple-bus;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   fin_pll: clock-fin-pll {
+   compatible = fixed-clock;
+   reg = 0;
+   #clock-cells = 0;
+   clock-frequency = 2400;
+   clock-output-names = fin_pll;
+   };
+   };
+
+   mmc@1220 {
+   status = okay;
+   num-slots = 1;
+   supports-highspeed;
+   broken-cd;
+   card-detect-delay = 200;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 2 3;
+   samsung,dw-mshc-ddr-timing = 1 2;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 8;
+   };
+   };
+
+   mmc@1222 {
+   status = okay;
+   num-slots = 1;
+   supports-highspeed;
+   card-detect-delay = 200;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 2 3;
+   samsung,dw-mshc-ddr-timing = 1 2;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 4;
+   disable-wp;
+   };
+   };
+
+};
diff --git a/arch/arm/boot/dts/exynos5410.dtsi 
b/arch/arm/boot/dts/exynos5410.dtsi
new file mode 100644
index 000..56b44d1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -0,0 +1,140 @@
+/*
+ * SAMSUNG EXYNOS5410 SoC device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SAMSUNG EXYNOS5410 SoC device nodes are listed in this file.
+ * EXYNOS5410 based board files can include this file and provide
+ * values for board specfic bindings.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include dt-bindings/clock/exynos5410.h
+#include exynos5.dtsi
+/ {
+   compatible = samsung,exynos5410;
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   CPU0: cpu@0 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0;
+   clock-frequency = 16;
+   };
+
+   CPU1: cpu@1 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 1;
+   clock-frequency = 16;
+   };
+
+   CPU2: cpu@2 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 2;
+   clock-frequency = 16;
+   };
+
+   CPU3: cpu@3 {
+   device_type = 

[PATCH v6 0/3] Introduce clocksource driver for Keystone platform

2014-02-10 Thread Ivan Khoronzhuk
Add a broadcast timer64 based clockevent driver for keystone arch.
This driver uses timer in 64-bit general purpose mode as clock event
device.

Documentation:
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf

Based on
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
keystone/master

v5..v6:
added function to encapsulate __iowmb().

v4..v5:
used __iowmb() insted of wmb()

v3..v4:
rebased on latest of linux-keystone.git keystone/master

v2..v3:
- clocksource: timer-keystone: introduce clocksource driver for
changed u64 type to unsigned long for hz_period as more appropriate
hz_period rounded up by DIV_ROUND_UP(rate, HZ)
corrected comments

v1..v2:
- clocksource: timer-keystone: introduce clocksource driver for
renamed timer on timer-keystone
in keystone_timer_interrupt() evet pointer is passed via dev_id
used __relaxed variants of writel/readl and added explicit barriers
added keystone_timer_disable() for using in keystone_set_mode()
keystone_timer_config() is not used for disabling the timer any more
in case of an unsupported mode the keystone_timer_config() returns -1.
used request_irq() instead of setup_irq()
assigned irq for event_device in event_dev-irq
calculated timer.hz_period for CLOCK_EVT_MODE_PERIODIC at init
deleted spare call of keystone_timer_config() in keystone_timer_init()

Ivan Khoronzhuk (3):
  clocksource: timer-keystone: introduce clocksource driver for Keystone
  clocksource: keystone: add bindings for keystone timer
  arm: dts: keystone: add keystone timer entry

 .../bindings/timer/ti,keystone-timer.txt   |  29 +++
 arch/arm/boot/dts/keystone-clocks.dtsi |  10 +
 arch/arm/boot/dts/keystone.dtsi|   7 +
 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/timer-keystone.c   | 244 +
 5 files changed, 291 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
 create mode 100644 drivers/clocksource/timer-keystone.c

-- 
1.8.3.2

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[PATCH v6 2/3] clocksource: keystone: add bindings for keystone timer

2014-02-10 Thread Ivan Khoronzhuk
This patch provides bindings for the 64-bit timer in the KeyStone
architecture devices. The timer can be configured as a general-purpose 64-bit
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or independently
(unchained mode) of each other.

It is global timer is a free running up-counter and can generate interrupt
when the counter reaches preset counter values.

Documentation:
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf

Acked-by: Rob Herring r...@kernel.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 .../bindings/timer/ti,keystone-timer.txt   | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/timer/ti,keystone-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt 
b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
new file mode 100644
index 000..5fbe361
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
@@ -0,0 +1,29 @@
+* Device tree bindings for Texas instruments Keystone timer
+
+This document provides bindings for the 64-bit timer in the KeyStone
+architecture devices. The timer can be configured as a general-purpose 64-bit
+timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
+timers, each half can operate in conjunction (chain mode) or independently
+(unchained mode) of each other.
+
+It is global timer is a free running up-counter and can generate interrupt
+when the counter reaches preset counter values.
+
+Documentation:
+http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
+
+Required properties:
+
+- compatible : should be ti,keystone-timer.
+- reg : specifies base physical address and count of the registers.
+- interrupts : interrupt generated by the timer.
+- clocks : the clock feeding the timer clock.
+
+Example:
+
+timer@22f {
+   compatible = ti,keystone-timer;
+   reg = 0x022f 0x80;
+   interrupts = GIC_SPI 110 IRQ_TYPE_EDGE_RISING;
+   clocks = clktimer15;
+};
-- 
1.8.3.2

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[PATCH v6 1/3] clocksource: timer-keystone: introduce clocksource driver for Keystone

2014-02-10 Thread Ivan Khoronzhuk
Add broadcast clock-event device for the Keystone arch.

The timer can be configured as a general-purpose 64-bit timer,
dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or
independently (unchained mode) of each other.

Reviewed-by: Stephen Boyd sb...@codeaurora.org
Acked-by: Santosh shilimkar santosh.shilim...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 drivers/clocksource/Makefile |   1 +
 drivers/clocksource/timer-keystone.c | 244 +++
 2 files changed, 245 insertions(+)
 create mode 100644 drivers/clocksource/timer-keystone.c

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index c7ca50a..4abe5aa 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -37,3 +37,4 @@ obj-$(CONFIG_ARM_ARCH_TIMER)  += arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
 obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o
 obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST)  += dummy_timer.o
+obj-$(CONFIG_ARCH_KEYSTONE)+= timer-keystone.o
diff --git a/drivers/clocksource/timer-keystone.c 
b/drivers/clocksource/timer-keystone.c
new file mode 100644
index 000..86b08cd
--- /dev/null
+++ b/drivers/clocksource/timer-keystone.c
@@ -0,0 +1,244 @@
+/*
+ * Keystone broadcast clock-event
+ *
+ * Copyright 2013 Texas Instruments, Inc.
+ *
+ * Author: Ivan Khoronzhuk ivan.khoronz...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/clocksource.h
+#include linux/interrupt.h
+#include linux/of_address.h
+#include linux/of_irq.h
+
+#define TIMER_NAME timer-keystone
+
+/* Timer register offsets */
+#define TIM12  0x10
+#define TIM34  0x14
+#define PRD12  0x18
+#define PRD34  0x1c
+#define TCR0x20
+#define TGCR   0x24
+#define INTCTLSTAT 0x44
+
+/* Timer register bitfields */
+#define TCR_ENAMODE_MASK   0xC0
+#define TCR_ENAMODE_ONESHOT_MASK   0x40
+#define TCR_ENAMODE_PERIODIC_MASK  0x80
+
+#define TGCR_TIM_UNRESET_MASK  0x03
+#define INTCTLSTAT_ENINT_MASK  0x01
+
+/**
+ * struct keystone_timer: holds timer's data
+ * @base: timer memory base address
+ * @hz_period: cycles per HZ period
+ * @event_dev: event device based on timer
+ */
+static struct keystone_timer {
+   void __iomem *base;
+   unsigned long hz_period;
+   struct clock_event_device event_dev;
+} timer;
+
+static inline u32 keystone_timer_readl(unsigned long rg)
+{
+   return readl_relaxed(timer.base + rg);
+}
+
+static inline void keystone_timer_writel(u32 val, unsigned long rg)
+{
+   writel_relaxed(val, timer.base + rg);
+}
+
+/**
+ * keystone_timer_barrier: write memory barrier
+ * use explicit barrier to avoid using readl/writel non relaxed function
+ * variants, because in our case non relaxed variants hide the true places
+ * where barrier is needed.
+ */
+static inline void keystone_timer_barrier(void)
+{
+   __iowmb();
+}
+
+/**
+ * keystone_timer_config: configures timer to work in oneshot/periodic modes.
+ * @ mode: mode to configure
+ * @ period: cycles number to configure for
+ */
+static int keystone_timer_config(u64 period, enum clock_event_mode mode)
+{
+   u32 tcr;
+   u32 off;
+
+   tcr = keystone_timer_readl(TCR);
+   off = tcr  ~(TCR_ENAMODE_MASK);
+
+   /* set enable mode */
+   switch (mode) {
+   case CLOCK_EVT_MODE_ONESHOT:
+   tcr |= TCR_ENAMODE_ONESHOT_MASK;
+   break;
+   case CLOCK_EVT_MODE_PERIODIC:
+   tcr |= TCR_ENAMODE_PERIODIC_MASK;
+   break;
+   default:
+   return -1;
+   }
+
+   /* disable timer */
+   keystone_timer_writel(off, TCR);
+   /* here we have to be sure the timer has been disabled */
+   keystone_timer_barrier();
+
+   /* reset counter to zero, set new period */
+   keystone_timer_writel(0, TIM12);
+   keystone_timer_writel(0, TIM34);
+   keystone_timer_writel(period  0x, PRD12);
+   keystone_timer_writel(period  32, PRD34);
+
+   /*
+* enable timer
+* here we have to be sure that CNTLO, CNTHI, PRDLO, PRDHI registers
+* have been written.
+*/
+   keystone_timer_barrier();
+   keystone_timer_writel(tcr, TCR);
+   return 0;
+}
+
+static void keystone_timer_disable(void)
+{
+   u32 tcr;
+
+   tcr = keystone_timer_readl(TCR);
+
+   /* disable timer */
+   tcr = ~(TCR_ENAMODE_MASK);
+   keystone_timer_writel(tcr, TCR);
+}
+

[PATCH v6 3/3] arm: dts: keystone: add keystone timer entry

2014-02-10 Thread Ivan Khoronzhuk
Add keystone timer entry to keystone device tree.
This 64-bit timer is used as backup clock event device.

Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 arch/arm/boot/dts/keystone-clocks.dtsi | 10 ++
 arch/arm/boot/dts/keystone.dtsi|  7 +++
 2 files changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi 
b/arch/arm/boot/dts/keystone-clocks.dtsi
index 2363593..16d2aba 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -737,6 +737,16 @@ clocks {
domain-id = 0;
};
 
+   clktimer15: clktimer15 {
+   #clock-cells = 0;
+   compatible = ti,keystone,psc-clock;
+   clocks = clkmodrst0;
+   clock-output-names = timer15;
+   reg = 0x0235 0xb00, 0x0235 0x400;
+   reg-names = control, domain;
+   domain-id = 0;
+   };
+
clkuart0: clkuart0 {
#clock-cells = 0;
compatible = ti,keystone,psc-clock;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index b420290..cac9841 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -208,5 +208,12 @@
usb-phy = usb_phy, usb_phy;
};
};
+
+   clock_event: timer@22f {
+   compatible = ti,keystone-timer;
+   reg = 0x022f 0x80;
+   interrupts = GIC_SPI 110 IRQ_TYPE_EDGE_RISING;
+   clocks = clktimer15;
+   };
};
 };
-- 
1.8.3.2

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Re: [PATCHv2 2/2] arm: Get rid of meminfo

2014-02-10 Thread Catalin Marinas
On Mon, Feb 10, 2014 at 03:25:34AM +, Laura Abbott wrote:
 On 2/6/2014 6:09 PM, Courtney Cavin wrote:
  On Wed, Feb 05, 2014 at 01:02:31AM +0100, Laura Abbott wrote:
  memblock is now fully integrated into the kernel and is the prefered
  method for tracking memory. Rather than reinvent the wheel with
  meminfo, migrate to using memblock directly instead of meminfo as
  an intermediate.
 
  Signed-off-by: Laura Abbott lau...@codeaurora.org
  [...]
  diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
  index 0b11c1a..51d814e 100644
  --- a/arch/arm/mach-pxa/spitz.c
  +++ b/arch/arm/mach-pxa/spitz.c
  @@ -32,6 +32,7 @@
#include linux/io.h
#include linux/module.h
#include linux/reboot.h
  +#include linux/memblock.h
 
#include asm/setup.h
#include asm/mach-types.h
  @@ -971,13 +972,9 @@ static void __init spitz_init(void)
   spitz_i2c_init();
}
 
  -static void __init spitz_fixup(struct tag *tags, char **cmdline,
  -  struct meminfo *mi)
  +static void __init spitz_fixup(struct tag *tags, char **cmdline)
{
  -   sharpsl_save_param();
  -   mi-nr_banks = 1;
  -   mi-bank[0].start = 0xa000;
  -   mi-bank[0].size = (64*1024*1024);
  +   memblock_addr(0xa000, SZ_64M);
 
  memblock_add() ?
 Yes, that was a typo on my part. I'll send out a v3 with collected acks.

And better testing ;)

-- 
Catalin
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Re: WARNING: CPU: 0 PID: 2243 at mm/slub.c:1007 deactivate_slab+0x4e0/0x590()

2014-02-10 Thread David Rientjes
On Mon, 10 Feb 2014, poma wrote:

 [   83.530421] WARNING: CPU: 0 PID: 2243 at mm/slub.c:1007
 deactivate_slab+0x4e0/0x590()

Yeah, you'll need the patch from the http://marc.info/?t=13914579132 
thread.  It's in the -mm tree as
mm-slub-list_lock-may-not-be-held-in-some-circumstances.patch and I'm 
hoping it will go into 3.14-rc3, several people have been complaining 
about it.
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