In preparation for new functionality in mount_subvol(), give it
ownership of subvol_name and tidy up the error paths.
Signed-off-by: Omar Sandoval
---
fs/btrfs/super.c | 61 ++--
1 file changed, 33 insertions(+), 28 deletions(-)
diff --git
Currently, setup_root_args() substitutes 's/subvol=[^,]*/subvolid=0/'.
But, this means that if the user passes both a subvol and subvolid for
some reason, we won't actually mount the top-level when we recursively
mount. For example, consider:
mkfs.btrfs -f /dev/sdb
mount /dev/sdb /mnt
btrfs
There's nothing to stop a user from passing both subvol= and subvolid=
to mount, but if they don't refer to the same subvolume, someone is
going to be surprised at some point. Error out on this case, but allow
users to pass in both if they do match (which they could, for example,
get out of
Currently, mounting a subvolume with subvolid= takes a different code
path than mounting with subvol=. This isn't really a big deal except for
the fact that mounts done with subvolid= or the default subvolume don't
have a dentry that's connected to the dentry tree like in the subvol=
case. To
Now that we're guaranteed to have a meaningful root dentry, we can just
export seq_dentry() and use it in btrfs_show_options(). The subvolume ID
is easy to get and can also be useful, so put that in there, too.
Signed-off-by: Omar Sandoval
---
fs/btrfs/super.c | 4
fs/seq_file.c| 1 +
Here's version 2 of providing the subvolume name and ID in /proc/mounts.
It turns out that getting the name of a subvolume reliably is a bit
trickier than it would seem because of how mounting subvolumes by ID is
implemented. In particular, in that case, the dentry we get for the root
of the
Since commit 0723a0473fb4 ("btrfs: allow mounting btrfs subvolumes with
different ro/rw options"), when mounting a subvolume read/write when
another subvolume has previously been mounted read-only, we first do a
remount. However, this should be done with the superblock locked, as per
On 04/06/2015 06:39 PM, Mark Brown wrote:> On Mon, Apr 06, 2015 at
03:54:23AM +0200, Bert Vermeulen wrote:
>> +if (spi->chip_select == 1 && t->cs_change) {
>> +/* CPLD in bulk write mode gets two bits per clock */
>> +do_spi_byte_fast(rbspi,
What happened to 1/2? Whatever that was, I spotted a license mismatch in
this 2/2.
On Wed, 2015-04-08 at 11:57 +0300, Alexey Brodkin wrote:
> --- /dev/null
> +++ b/drivers/mtd/nand/axs_nand.c
> @@ -0,0 +1,412 @@
> +/*
> + * Copyright (C) 2014 Synopsys, Inc. (www.synopsys.com)
> + *
> + * Driver
Hi!
I did not yet figure out how to get sensor data from the controller,
but it works rather well as a RGB led.
And yes, this probably would need some more cleanup, but I'm out of
time now. Perhaps someone else can help...
BTW what happened to the __u8->u8 conversion patch? That should go in
On 04/09/2015 03:12 PM, Linus Torvalds wrote:
On Thu, Apr 9, 2015 at 11:24 AM, Jan Engelhardt wrote:
It's fairly consistent (reproducible?). Only 1 in 15 or so (have not kept track
really) attempts does it not die.
With frame pointers:
[] scsi_queue_rq+0x2e8/0x3d2
[]
On Wednesday, April 01, 2015 10:20:20 AM Suravee Suthikulpanit wrote:
> ACPI v5.1 introduced _CCA object for specifying cache coherency attribute
> for devices. This patch implements a logic, which traverses device namespace
> to parse the coherency information, and calling the corresponded
>
On Thu, 2015-04-09 at 10:01 -0600, Jason Gunthorpe wrote:
> On Thu, Apr 09, 2015 at 10:34:30AM -0400, Doug Ledford wrote:
>
> > These are exactly the tests I proposed Jason. I'm not sure I see your
> > point here. I guess my point is that although the scenario of all the
> > different items
On Thursday 09 April 2015 12:37:11 Kumar Gala wrote:
> From: Abhimanyu Kapur
>
> Add qcom cpu operations for arm-v8 cpus. Implement secondary cpu boot ops
> As a part of this change update device tree documentation for:
>
> 1. Arm cortex-a ACC device which provides percpu reg
> 2. Armv8
On Thursday 09 April 2015 12:37:10 Kumar Gala wrote:
> From: Abhimanyu Kapur
>
> Move the secondary_pen_release variable and the secondary_holding_pen
> entry function to asm/smp_plat.h so that the other cpu ops implementations
> can share them.
>
> Signed-off-by: Abhimanyu Kapur
>
On Thursday 09 April 2015 12:37:09 Kumar Gala wrote:
> @@ -67,4 +67,9 @@ extern const struct cpu_operations *cpu_ops[NR_CPUS];
> int __init cpu_read_ops(struct device_node *dn, int cpu);
> void __init cpu_read_bootcpu_ops(void);
>
> +#define CPU_METHOD_OF_DECLARE(name, __ops)
On Thursday 09 April 2015 12:31:05 David Rientjes wrote:
> On Thu, 9 Apr 2015, Arnd Bergmann wrote:
>
> > This is a fix^3 for the mempool poisoning patch, which introduces
> > a compile-time error on some ARM randconfig builds:
> >
> > mm/mempool.c: In function 'check_element':
> >
On Mon, Apr 06, 2015 at 01:47:35PM -0400, Tejun Heo wrote:
> Hello, Preeti.
>
> On Thu, Apr 02, 2015 at 12:26:32PM +0530, Preeti U Murthy wrote:
> > By ensuring that the user configured cpusets are untouched, I don't see
> > how we affect userspace adversely. The expectation usually is that the
>
On Thursday, April 09, 2015 10:50:02 AM Jiang Liu wrote:
> On 2015/4/9 7:44, Rafael J. Wysocki wrote:
> > On Wednesday, April 08, 2015 01:48:46 PM Jiang Liu wrote:
> >> On 2015/4/7 8:28, Rafael J. Wysocki wrote:
> >>> On Friday, April 03, 2015 10:04:11 PM Bjorn Helgaas wrote:
> Hi Jiang,
> >>
On Thu, Apr 9, 2015 at 11:24 AM, Jan Engelhardt wrote:
>
> It's fairly consistent (reproducible?). Only 1 in 15 or so (have not kept
> track
> really) attempts does it not die.
>
> With frame pointers:
> [] scsi_queue_rq+0x2e8/0x3d2
> [] __blk_mq_run_hw_queue+0x19b/0x2a2
> [] ?
On Thu, Apr 09, 2015 at 01:58:16PM -0700, Jason Low wrote:
> On Thu, Apr 9, 2015 at 12:58 PM, Paul E. McKenney
> wrote:
> > On Thu, Apr 09, 2015 at 12:43:38PM -0700, Jason Low wrote:
> >> On Thu, 2015-04-09 at 11:16 -0700, Linus Torvalds wrote:
> >> > On Thu, Apr 9, 2015 at 11:08 AM, Linus
A recent move of the header led trigger function declaration caused the
alternative wrappers to be entirely invisible if LEDS_TRIGGERS is
disabled, leading to a compile-time error:
drivers/leds/led-class.c: In function 'brightness_store':
drivers/leds/led-class.c:57:3: error: implicit declaration
> + for_each_set_bit(bit, (unsigned long *)_status, 64) {
> +
> + if (bit >= x86_pmu.max_pebs_events)
> + clear_bit(bit, (unsigned long *)_status);
> + else {
> + event = cpuc->events[bit];
> +
On Thu, 9 Apr 2015 08:50:25 +0900 Minchan Kim wrote:
> Bump.
I'm getting the feeling that MADV_FREE is out of control.
Below is the overall rollup of
mm-support-madvisemadv_free.patch
mm-support-madvisemadv_free-fix.patch
mm-support-madvisemadv_free-fix-2.patch
if()/BUG conversion to BUG_ON must be avoided when there's side effect
in condition. The reason being BUG_ON won't execute the condition when
CONFIG_BUG
is not defined.
Inspired-by: J. Bruce Fields
Suggested-by: Julia Lawall
Acked-by: Julia Lawall
Signed-off-by: Fabian Frederick
---
V2:
On Thu, Apr 9, 2015 at 12:58 PM, Paul E. McKenney
wrote:
> On Thu, Apr 09, 2015 at 12:43:38PM -0700, Jason Low wrote:
>> On Thu, 2015-04-09 at 11:16 -0700, Linus Torvalds wrote:
>> > On Thu, Apr 9, 2015 at 11:08 AM, Linus Torvalds
>> > wrote:
>> > >
>> > > The pointer is a known-safe kernel
On Thu, Mar 12, 2015 at 04:16:03PM -0700, Vikas Shivappa wrote:
> Add support for cache bit mask manipulation. The change adds a file to
> the RDT cgroup which represents the CBM(cache bit mask) for the cgroup.
>
> The RDT cgroup follows cgroup hierarchy ,mkdir and adding tasks to the
> cgroup
On Thursday, April 09, 2015 11:18:25 AM Tomeu Vizoso wrote:
> On 04/08/2015 01:55 PM, Lorenzo Pieralisi wrote:
> > On Wed, Apr 08, 2015 at 11:54:38AM +0100, Tomeu Vizoso wrote:
> >> This callback is expected to do the same as enter() only that all
> >> non-wakeup IRQs are expected to be disabled.
On Thu, 9 Apr 2015 22:44:07 +0200 Fabian Frederick wrote:
> slob_alloc_node() is only used in slob.c
> This patch removes EXPORT_SYMBOL and statify function
>
Call me old-fashioned, but I refuse to make "statify" a word ;)
: From: Fabian Frederick
: Subject: slob: make slob_alloc_node()
From: Rafael J. Wysocki
Currently, the ACPI modalias creation covers two mutually exclusive
cases: If the PRP0001 device ID is present in the device's list of
ACPI/PNP IDs and the "compatible" property is present in _DSD, the
created modalias will follow the OF rules of modalias creation.
On 04/09/2015 04:27 PM, Theodore Ts'o wrote:
> I tried manually running generic/019, and even though I have
> CONFIG_FAIL_MAKE_REQUEST defined, /sys/kernel/debug/fail_make_request
> isn't present, and so the test complains that I haven't compiled it
> into my kernel --- even though /proc/config.gz
On Thu, Apr 9, 2015 at 9:10 AM, Nicolas Dichtel
wrote:
> Le 09/04/2015 13:10, Paul Moore a écrit :
> [snip]
>>>
>>> --- a/security/selinux/nlmsgtab.c
>>> +++ b/security/selinux/nlmsgtab.c
>>> @@ -74,6 +74,7 @@ static struct nlmsg_perm nlmsg_route_perms[] =
>>> { RTM_DELMDB,
On Thu, 9 Apr 2015 10:19:10 +0800 Neil Zhang wrote:
> show detailed free pages per each migrate type in show_free_areas.
>
> After apply this patch, the log printed out will be changed from
>
> [ 558.212844@0] Normal: 218*4kB (UEMC) 207*8kB (UEMC) 126*16kB (UEMC)
> 21*32kB (UC) 5*64kB (C)
slob_alloc_node() is only used in slob.c
This patch removes EXPORT_SYMBOL and statify function
Signed-off-by: Fabian Frederick
---
mm/slob.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/mm/slob.c b/mm/slob.c
index 6d55710..495df8e 100644
--- a/mm/slob.c
+++ b/mm/slob.c
Atmel MXT devices use different i2c addresses, depending on the current
mode of operation (bootloader or application). The Atmel MXT driver
expects i2c client's address contain the application address of the
chip, and calculates the expected bootloader address form the
application address.
On Thu, Apr 09, 2015 at 01:30:25PM -0700, Chen-Yu Tsai wrote:
> On Thu, Apr 9, 2015 at 12:55 PM, Mark Brown wrote:
> > Someone would need to resend them to me as I've deleted them and it
> > appears that this is a part of a series - are you sure there are no
> > dependencies?
> The 2 patches
On 04/09/2015 02:23 PM, Peter Zijlstra wrote:
On Thu, Apr 09, 2015 at 08:13:27PM +0200, Peter Zijlstra wrote:
On Mon, Apr 06, 2015 at 10:55:44PM -0400, Waiman Long wrote:
+#define PV_HB_PER_LINE (SMP_CACHE_BYTES / sizeof(struct pv_hash_bucket))
+static struct qspinlock **pv_hash(struct
On Thu, 2015-04-09 at 11:16 -0700, Linus Torvalds wrote:
> On Thu, Apr 9, 2015 at 11:08 AM, Linus Torvalds
> wrote:
> >
> > The pointer is a known-safe kernel pointer - it's just that it was
> > "known safe" a few instructions ago, and might be rcu-free'd at any
> > time.
>
> Actually, we could
On Thu, Apr 9, 2015 at 12:55 PM, Mark Brown wrote:
> On Thu, Apr 09, 2015 at 10:23:41AM -0700, Chen-Yu Tsai wrote:
>
>> Are you OK with Lee taking the 2 regulator patches through his tree?
>> I realize I'm asking this way too late for this merge window.
>
> Someone would need to resend them to me
Fixed a coding style issue.
Signed-off-by: Andrei Maresu
---
drivers/staging/comedi/drivers/daqboard2000.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/comedi/drivers/daqboard2000.c
b/drivers/staging/comedi/drivers/daqboard2000.c
index 96697fb..e6746dc
This change allows some cores to be excluded from running the
smp_hotplug_thread tasks. The motivating example for this is
the watchdog threads, which by default we don't want to run
on any enabled nohz_full cores.
A new smp_hotplug_thread field is introduced, "valid_cpu", which
is an optional
On Thu, Apr 09, 2015 at 11:19:45AM -0400, Sasha Levin wrote:
>
> Nope, I just got new servers to play with and decided to try xfstests.
>
> I can try bisection if it doesn't sound familiar, but since it's metal
> servers it'll take a while.
It's in the "dangerous" group, which may very well
From: Matthew Garrett
The kernel supports having a command line built into it. Unfortunately this
doesn't work in all cases - the built-in command line is only appended
after we've jumped to the kernel proper, but various parts of the early
boot process also pay attention to the command line.
On Thu, Apr 9, 2015 at 3:44 PM, Valentin Rothberg
wrote:
> On Thu, Apr 09, 2015 at 02:54:29PM -0400, Rob Clark wrote:
>> On Thu, Apr 9, 2015 at 2:12 PM, Paul Bolle wrote:
>> > On Thu, 2015-04-09 at 19:07 +0200, Greg KH wrote:
>> >> I really don't understand. Why is this code in the kernel tree
On Tuesday 24 March 2015 17:49:04 Andrey Ryabinin wrote:
> arch/arm64/mm/kasan_init.c | 211
> +++
>
Just one very high-level question: as this code is clearly derived from
the x86 version and nontrivial, could we move most of it out of
arch/{x86,arm64}
On Thu, 9 Apr 2015, Fabian Frederick wrote:
> if()/BUG conversion to BUG_ON must be avoided when there's side effect
> in condition. The reason being BUG_ON won't execute condition when CONFIG_BUG
> is not defined.
>
> Inspired-by: J. Bruce Fields
> Suggested-by: Julia Lawall
> Signed-off-by:
Trying to analyze a big endian data file on little endian system
fails with the error:
0xa9b40 [0x70]: failed to process type: 9
The problem is that header parsing is not done correctly because
the file attributes are not swapped. Make it so. With this patch
able to analyze a sparc64 data file
if()/BUG conversion to BUG_ON must be avoided when there's side effect
in condition. The reason being BUG_ON won't execute condition when CONFIG_BUG
is not defined.
Inspired-by: J. Bruce Fields
Suggested-by: Julia Lawall
Signed-off-by: Fabian Frederick
---
scripts/coccinelle/misc/bugon.cocci
On Thu, Apr 09, 2015 at 04:07:55PM -0400, Waiman Long wrote:
> The qrwlock is fair in the process context, but becoming unfair when
> in the interrupt context to support use cases like the tasklist_lock.
> However, the unfair code in the interrupt context has problem that
> may cause deadlock.
>
On Thu, Apr 09, 2015 at 10:05:03AM -0700, Duc Dang wrote:
> X-Gene v1 SoC supports total 2688 MSI/MSIX vectors coalesced into
> 16 HW IRQ lines.
>
> Signed-off-by: Duc Dang
> Signed-off-by: Tanmay Inamdar
> ...
> --- /dev/null
> +++ b/drivers/pci/host/pci-xgene-msi.c
> @@ -0,0 +1,407 @@
> ...
On Thu, 2015-04-09 at 15:00 -0500, Bjorn Helgaas wrote:
> On Thu, Apr 09, 2015 at 02:58:46PM -0500, Bjorn Helgaas wrote:
> > On Thu, Apr 09, 2015 at 09:51:43AM -0600, Alex Williamson wrote:
> > > The equivalent bus and slot versions of this are already exported and
> > > vfio-pci would like a
Support the NVIC interrupt controller as node parent of the MSCM
interrupt router. On the dual-core variants of Vybird (VF6xx), the
NVIC interrupt controller is used by the Cortex-M4. To support
running Linux on this core too, MSCM needs NVIC parent support too.
Signed-off-by: Stefan Agner
---
Vybrids has 112 peripherial interrupts which can be routed to the
Cortex-M4's NVIC interrupt controller.
Signed-off-by: Stefan Agner
---
arch/arm/mm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 16d077e..8eebc0d 100644
---
Add support for hierarchy irq domains. This is required to stack
the MSCM interrupt router and the NVIC controller found in Vybrid
SoC.
Signed-off-by: Stefan Agner
---
drivers/irqchip/Kconfig| 1 +
drivers/irqchip/irq-nvic.c | 28 +++-
2 files changed, 28
The qrwlock is fair in the process context, but becoming unfair when
in the interrupt context to support use cases like the tasklist_lock.
However, the unfair code in the interrupt context has problem that
may cause deadlock.
The fast path increments the reader count. In the interrupt context,
This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores
This introduces a new top level config symbol ARM_SINGLE_ARMV7M
for non-MMU, ARMv7-M platforms. It also support multiple ARMv7-M
platforms in one kernel image since the cores share the same
basic memory layout and interrupt controller. However, this works
only if the combined platforms also have a
Use the new config symbol ARM_SINGLE_ARMV7M which groups config
symbols used by modern ARMv7-M platforms. It also support multiple
ARMv7-M platforms in one kernel image. However, this only works if
the combined platforms share the same (main) memory layout.
Signed-off-by: Stefan Agner
---
On Thu, Apr 09, 2015 at 09:57:21PM +0200, Peter Zijlstra wrote:
> On Mon, Apr 06, 2015 at 10:55:48PM -0400, Waiman Long wrote:
>
> > @@ -219,24 +236,30 @@ static void pv_wait_node(struct mcs_spinlock *node)
> > }
> >
> > /*
> > + * Called after setting next->locked = 1 & lock acquired.
> > +
Provide a libfdt-based equivalent for of_device_is_big_endian(), suitable
for use in the early_init_* functions.
Signed-off-by: Kevin Cernekee
---
drivers/of/fdt.c | 19 +++
include/linux/of_fdt.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/drivers/of/fdt.c
SoC peripherals can come in several different flavors:
- little-endian: registers always need to be accessed in LE mode (so the
kernel should perform a swap if the CPU is running BE)
- big-endian: registers always need to be accessed in BE mode (so the
kernel should perform a swap if the
These apply to newly converted drivers, like serial8250/libahci/...
The examples were adapted from the regmap bindings document.
Signed-off-by: Kevin Cernekee
---
.../devicetree/bindings/common-properties.txt | 60 ++
1 file changed, 60 insertions(+)
create mode 100644
Add defconfig for Linux on Vybrid (vf610) on the secondary Cortex-
M4 CPU. The use of a XIP image has been tested which needs to be
loaded (e.g. using the custom m4boot loader) to the end of the
available RAM at address 0x8f00. The Cortex-M4 has a code-alias
which makes sure that the
If the device node has a "big-endian" property and 32-bit registers, tell
the serial driver to use UPIO_MEM32BE instead of UPIO_MEM32.
Signed-off-by: Kevin Cernekee
---
drivers/tty/serial/of_serial.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
V3->V4:
Rebase on Linus' head of tree
Tweak documentation per Grant's request
Drop the of_earlycon patches in favor of Peter's series
Kevin Cernekee (5):
of: Add helper function to check MMIO register endianness
of/fdt: Add endianness helper function for early init code
of: Document
Add cases for UPIO_MEM32BE wherever there are currently cases handling
UPIO_MEM32.
Signed-off-by: Kevin Cernekee
---
drivers/tty/serial/8250/8250_core.c | 20
drivers/tty/serial/8250/8250_early.c | 5 +
2 files changed, 25 insertions(+)
diff --git
In this fifth revision the patchset moves away from the idea
including ARMv7-M platforms into ARCH_MULTIPLATFORM, but
instead adds a new top-level config symbol ARM_SINGLE_ARMV7M
Patch 7 adds this new config symbol while patch 8 alters the
existing ARMv7-M platform ARCH_EFM32 to use
Add the minimal dependencies required to use the Vybrid PIT
clocksource driver. Those are not part of the SoC dependencies.
Acked-by: Daniel Lezcano
Signed-off-by: Stefan Agner
---
drivers/clocksource/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clocksource/Kconfig
This adds an initial device tree to run Linux on the Cortex-M4 on
the Vybrid based Colibri VF61 module.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/vf610m4-colibri.dts | 99 +++
arch/arm/boot/dts/vf610m4.dtsi
Use the new helper function irq_domain_set_info to make sure the
function irq_domain_set_hwirq_and_chip is being called, which is
crucial to save irqdomain specific data to irq_data.
Signed-off-by: Stefan Agner
---
kernel/irq/generic-chip.c | 5 ++---
1 file changed, 2 insertions(+), 3
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.
Signed-off-by: Stefan Agner
---
arch/arm/include/debug/efm32.S | 2 +-
On Thu, 9 Apr 2015 18:26:14 +0300 Alexey Dobriyan wrote:
> kstrto*() and kstrto*_from_user() family of functions were added
> help with parsing one integer written as string to proc/sysfs/debugfs
> files and pass it elsewhere. But they have a limitation: string passed
> must end with \0 or \n\0.
Yo Jan!
On Thu, 09 Apr 2015 15:05:09 +0200
Jan Lübbe wrote:
> Hi Gary,
>
> On Do, 2015-04-02 at 12:21 -0700, Gary E. Miller wrote:
> > In the conversion from platform to device tree the capture-clear
> > option was lost.
> >
> > capture-clear is needed so that time_pps_fetch() will report
On Thu, Apr 09, 2015 at 02:58:46PM -0500, Bjorn Helgaas wrote:
> On Thu, Apr 09, 2015 at 09:51:43AM -0600, Alex Williamson wrote:
> > The equivalent bus and slot versions of this are already exported and
> > vfio-pci would like a function-probe available so we can expose
> > function-level reset
On Thu, 2015-04-09 at 12:43 -0700, Jason Low wrote:
> So that looks more similar to how the original code was where the
> rcu_read_lock() and rcu_read_unlock() was done inside the owner_running
> helper function (though without the CONFIG_DEBUG_PAGEALLOC), before
> commit 307bf9803f25 ("sched:
On Thu, Apr 09, 2015 at 09:51:43AM -0600, Alex Williamson wrote:
> The equivalent bus and slot versions of this are already exported and
> vfio-pci would like a function-probe available so we can expose
> function-level reset capabilities to the user without necessarily
> using it to perform a
On Thu, Apr 09, 2015 at 12:43:38PM -0700, Jason Low wrote:
> On Thu, 2015-04-09 at 11:16 -0700, Linus Torvalds wrote:
> > On Thu, Apr 9, 2015 at 11:08 AM, Linus Torvalds
> > wrote:
> > >
> > > The pointer is a known-safe kernel pointer - it's just that it was
> > > "known safe" a few instructions
On Mon, Apr 06, 2015 at 10:55:48PM -0400, Waiman Long wrote:
> @@ -219,24 +236,30 @@ static void pv_wait_node(struct mcs_spinlock *node)
> }
>
> /*
> + * Called after setting next->locked = 1 & lock acquired.
> + * Check if the the CPU has been halted. If so, set the _Q_SLOW_VAL flag
> + *
Hi He,
This commit should fix the problem:
commit a0d129162d2fdd1a99553a6cfbdf4e77ad3f7334
Author: Jérémie Galarneau
Date: Thu Apr 9 14:57:44 2015 -0400
Fix: Allow the addition of environment fields to a frozen trace
Commit 7f800dc7 introduced a behavior change which made it
On Thu, Apr 09, 2015 at 10:23:41AM -0700, Chen-Yu Tsai wrote:
> Are you OK with Lee taking the 2 regulator patches through his tree?
> I realize I'm asking this way too late for this merge window.
Someone would need to resend them to me as I've deleted them and it
appears that this is a part of
On Thursday 09 April 2015 14:34:26 Tomi Valkeinen wrote:
> On 09/04/15 14:21, Tomi Valkeinen wrote:
> > On 09/04/15 14:06, Pavel Machek wrote:
> >> On Tue 2015-04-07 14:19:33, Geert Uytterhoeven wrote:
> >>> Hi Pavel,
> >>>
> >>> On Tue, Apr 7, 2015 at 2:12 PM, Pavel Machek wrote:
> I have
On Sat, 4 Apr 2015, Jonathan Corbet wrote:
> On Thu, 2 Apr 2015 15:50:15 -0700 (PDT)
> David Rientjes wrote:
>
> > Don't only specify munmap(2) behavior with respect the hugetlb memory, all
> > other syscalls get naturally aligned to the native page size of the
> > processor. Rather, pick
On Thu, Apr 09, 2015 at 02:54:29PM -0400, Rob Clark wrote:
> On Thu, Apr 9, 2015 at 2:12 PM, Paul Bolle wrote:
> > On Thu, 2015-04-09 at 19:07 +0200, Greg KH wrote:
> >> I really don't understand. Why is this code in the kernel tree if it
> >> can't be built? How does anyone use this? By
On Thu, 2015-04-09 at 11:16 -0700, Linus Torvalds wrote:
> On Thu, Apr 9, 2015 at 11:08 AM, Linus Torvalds
> wrote:
> >
> > The pointer is a known-safe kernel pointer - it's just that it was
> > "known safe" a few instructions ago, and might be rcu-free'd at any
> > time.
>
> Actually, we could
On Thu, 9 Apr 2015, Gerald Schaefer wrote:
> commit 61f77eda "mm/hugetlb: reduce arch dependent code around follow_huge_*"
> broke follow_huge_pmd() on s390, where pmd and pte layout differ and using
> pte_page() on a huge pmd will return wrong results. Using pmd_page() instead
> fixes this.
>
>
On Thu, 2015-04-09 at 14:54 -0400, Rob Clark wrote:
> We are talking about a driver which does build and run on
> upstream kernel, and which has a few small #ifdef blocks to simplify
> backporting to downstream kernels (which we still do need to use for
> some generations and some devices)
This
Hi all,
I'm seeing the following warnings and NULL ptr deref when running xfstest
generic/040
on the latest -next kernel.
[ 7023.673973] run fstests generic/040 at 2015-04-09 10:31:57
[ 7025.777329] kobject: 'sdd' (8837b7c5e0a8): kobject_uevent_env
[ 7025.777344] kobject: 'sdd'
In comments and in the documentation, the units of properties marked with the
FE_SCALE_DECIBEL scale are specified in terms of 1/1000 dB or 0.0001 dB. This
is inconsistent, however, as 1/1000 is 0.001, not 0.0001.
Note that the v4l-utils divide the value by 1000 for the signal strength
On Fri, Apr 03, 2015 at 09:17:05PM +0800, Jisheng Zhang wrote:
> devm_ioremap_resource does sanity checks on the given resource. No need
> to duplicate this in the driver. And we should check whether
> devm_ioremap_resource() succeeds or not.
>
> This patch fixes all of these two trival issues.
>
On Thu, 9 Apr 2015, Arnd Bergmann wrote:
> This is a fix^3 for the mempool poisoning patch, which introduces
> a compile-time error on some ARM randconfig builds:
>
> mm/mempool.c: In function 'check_element':
> mm/mempool.c:65:16: error: implicit declaration of function 'kmap_atomic'
>
On Tue, Apr 07, 2015 at 11:07:00AM -0700, Matthew Garrett wrote:
> Communications with a hardware vendor confirm that the expected behaviour on
> systems that set the FADT ASPM disable bit but which still grant full PCIe
> control is for the OS to leave any BIOS configuration intact and refuse to
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* Peter Ujfalusi [150409 12:07]:
> On 04/09/2015 10:01 PM, Tony Lindgren wrote:
> > * Peter Ujfalusi [150409 11:55]:
> >> On 04/09/2015 06:18 PM, Tony Lindgren wrote:
> >>> * Peter Ujfalusi [150409 02:37]:
> The sDMA requests are routed through the DMA crossbar and without the
>
On Mon, Mar 30, 2015 at 10:32:34AM +0200, Michael S. Tsirkin wrote:
> Top of include/linux/pci_ids.h says:
> Do not add new entries to this file unless the definitions
> are shared between multiple drivers.
> on the other hand, Documentation/PCI/pci.txt seems to imply that all
> vendor
On Thu, Apr 09, 2015 at 06:22:02PM +, Luck, Tony wrote:
> > Why? Those CPUs are offlined and num_online_cpus() in mce_start() should
> > account for that, no?
> >
> > And if those are offlined, they're very very unlikely to trigger an MCE
> > as they're idle and not executing code.
>
> Let's
On 04/09/2015 10:01 PM, Tony Lindgren wrote:
> * Peter Ujfalusi [150409 11:55]:
>> On 04/09/2015 06:18 PM, Tony Lindgren wrote:
>>> * Peter Ujfalusi [150409 02:37]:
The sDMA requests are routed through the DMA crossbar and without the
crossbar only peripherals using DMA request 0-127
* Peter Ujfalusi [150409 11:55]:
> On 04/09/2015 06:18 PM, Tony Lindgren wrote:
> > * Peter Ujfalusi [150409 02:37]:
> >> The sDMA requests are routed through the DMA crossbar and without the
> >> crossbar only peripherals using DMA request 0-127 can be used.
> >
> > I assume this can be merged
On Thu, Apr 09, 2015 at 06:28:48PM +0200, David Sterba wrote:
> On Tue, Apr 07, 2015 at 10:34:01PM -0700, Omar Sandoval wrote:
> > Currently, mounting a subvolume with subvolid= takes a different code
> > path than mounting with subvol=. This isn't really a big deal except for
> > the fact that
On Thu, Apr 9, 2015 at 2:12 PM, Paul Bolle wrote:
> On Thu, 2015-04-09 at 19:07 +0200, Greg KH wrote:
>> I really don't understand. Why is this code in the kernel tree if it
>> can't be built? How does anyone use this? By taking it and copying it
>> where? If it can't be built, and no one can
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