Re: [PATCH 3/3] scsi:ufs:add hi3660 ufs driver code

[Guodong Xu]

On Sat, Jun 10, 2017 at 9:21 AM, butao  wrote:
> add hi3660 ufs driver code
>
> Signed-off-by: Geng Jianfeng 
> Signed-off-by: Bu Tao 
> Signed-off-by: Zang Leigang 
> Signed-off-by: Yu Jianfeng 
> ---
>  drivers/scsi/ufs/Kconfig  |   8 +
>  drivers/scsi/ufs/Makefile |   1 +
>  drivers/scsi/ufs/ufs-hi3660.c | 715 
> ++
>  drivers/scsi/ufs/ufs-hi3660.h | 170 ++
>  4 files changed, 894 insertions(+)
>  mode change 100644 => 100755 drivers/scsi/ufs/Kconfig
>  mode change 100644 => 100755 drivers/scsi/ufs/Makefile
>  create mode 100755 drivers/scsi/ufs/ufs-hi3660.c
>  create mode 100755 drivers/scsi/ufs/ufs-hi3660.h

mode 755? Err.

>
> diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
> old mode 100644
> new mode 100755
> index e27b4d4e6ae2..119604ea0aae
> --- a/drivers/scsi/ufs/Kconfig
> +++ b/drivers/scsi/ufs/Kconfig
> @@ -80,6 +80,14 @@ config SCSI_UFSHCD_PLATFORM
>
>   If unsure, say N.
>
> +config SCSI_UFS_HI3660
> +   tristate "Hisilicon Hi3660 UFS controller platform driver"
> +   depends on (ARCH_HISI || COMPILE_TEST) && SCSI_UFSHCD_PLATFORM
> +   help
> + This selects the Hisilicon HI3660 additions to UFSHCD platform 
> driver.
> +
> + If unsure, say N.
> +

Please also add "SCSI_UFS_HI3660=y" into arch/arm64/configs/defconfig,
and submit as a separate patch.

-Guodong


>  config SCSI_UFS_DWC_TC_PLATFORM
> tristate "DesignWare platform support using a G210 Test Chip"
> depends on SCSI_UFSHCD_PLATFORM
> diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
> old mode 100644
> new mode 100755
> index 6e77cb0bfee9..ae880189f018
> --- a/drivers/scsi/ufs/Makefile
> +++ b/drivers/scsi/ufs/Makefile
> @@ -2,6 +2,7 @@
>  obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o ufshcd-dwc.o 
> tc-dwc-g210.o
>  obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o ufshcd-dwc.o 
> tc-dwc-g210.o
>  obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
> +obj-$(CONFIG_SCSI_UFS_HI3660) += ufs-hi3660.o
>  obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
>  obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
>  obj-$(CONFIG_SCSI_UFSHCD_PLATFORM) += ufshcd-pltfrm.o
> diff --git a/drivers/scsi/ufs/ufs-hi3660.c b/drivers/scsi/ufs/ufs-hi3660.c
> new file mode 100755
> index ..ccbcb01f6863
> --- /dev/null
> +++ b/drivers/scsi/ufs/ufs-hi3660.c
> @@ -0,0 +1,715 @@
> +/*
> + * Copyright (c) 2016-2017 Linaro Ltd.
> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "ufshcd.h"
> +#include "ufshcd-pltfrm.h"
> +#include "unipro.h"
> +#include "ufs-hi3660.h"
> +#include "ufshci.h"
> +
> +static int ufs_hi3660_check_hibern8(struct ufs_hba *hba)
> +{
> +   int err;
> +   u32 tx_fsm_val_0;
> +   u32 tx_fsm_val_1;
> +   unsigned long timeout = jiffies + 
> msecs_to_jiffies(HBRN8_POLL_TOUT_MS);
> +
> +   do {
> +   err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 0),
> + _fsm_val_0);
> +   err |= ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 1),
> + _fsm_val_1);
> +   if (err || (tx_fsm_val_0 == TX_FSM_HIBERN8 && tx_fsm_val_1 == 
> TX_FSM_HIBERN8))
> +   break;
> +
> +   /* sleep for max. 200us */
> +   usleep_range(100, 200);
> +   } while (time_before(jiffies, timeout));
> +
> +   /*
> +* we might have scheduled out for long during polling so
> +* check the state again.
> +*/
> +   if (time_after(jiffies, timeout)) {
> +   err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 0),
> +_fsm_val_0);
> +   err |= ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 1),
> +_fsm_val_1);
> +   }
> +
> +   if (err) {
> +   dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n",
> +   __func__, err);
> +   } else if (tx_fsm_val_0 != TX_FSM_HIBERN8 || tx_fsm_val_1 != 
> TX_FSM_HIBERN8) {
> +   err = -1;
> +   dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, 
> lane1 = %d\n",
> +   __func__, tx_fsm_val_0, tx_fsm_val_1);
> +   }
> +
> +   return err;
> +}
> +
> +static void ufs_hi3660_clk_init(struct ufs_hba *hba)
> +{
> +   struct 

Re: [PATCH 3/3] scsi:ufs:add hi3660 ufs driver code

[Guodong Xu]

On Sat, Jun 10, 2017 at 9:21 AM, butao  wrote:
> add hi3660 ufs driver code
>
> Signed-off-by: Geng Jianfeng 
> Signed-off-by: Bu Tao 
> Signed-off-by: Zang Leigang 
> Signed-off-by: Yu Jianfeng 
> ---
>  drivers/scsi/ufs/Kconfig  |   8 +
>  drivers/scsi/ufs/Makefile |   1 +
>  drivers/scsi/ufs/ufs-hi3660.c | 715 
> ++
>  drivers/scsi/ufs/ufs-hi3660.h | 170 ++
>  4 files changed, 894 insertions(+)
>  mode change 100644 => 100755 drivers/scsi/ufs/Kconfig
>  mode change 100644 => 100755 drivers/scsi/ufs/Makefile
>  create mode 100755 drivers/scsi/ufs/ufs-hi3660.c
>  create mode 100755 drivers/scsi/ufs/ufs-hi3660.h

mode 755? Err.

>
> diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
> old mode 100644
> new mode 100755
> index e27b4d4e6ae2..119604ea0aae
> --- a/drivers/scsi/ufs/Kconfig
> +++ b/drivers/scsi/ufs/Kconfig
> @@ -80,6 +80,14 @@ config SCSI_UFSHCD_PLATFORM
>
>   If unsure, say N.
>
> +config SCSI_UFS_HI3660
> +   tristate "Hisilicon Hi3660 UFS controller platform driver"
> +   depends on (ARCH_HISI || COMPILE_TEST) && SCSI_UFSHCD_PLATFORM
> +   help
> + This selects the Hisilicon HI3660 additions to UFSHCD platform 
> driver.
> +
> + If unsure, say N.
> +

Please also add "SCSI_UFS_HI3660=y" into arch/arm64/configs/defconfig,
and submit as a separate patch.

-Guodong


>  config SCSI_UFS_DWC_TC_PLATFORM
> tristate "DesignWare platform support using a G210 Test Chip"
> depends on SCSI_UFSHCD_PLATFORM
> diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
> old mode 100644
> new mode 100755
> index 6e77cb0bfee9..ae880189f018
> --- a/drivers/scsi/ufs/Makefile
> +++ b/drivers/scsi/ufs/Makefile
> @@ -2,6 +2,7 @@
>  obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o ufshcd-dwc.o 
> tc-dwc-g210.o
>  obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o ufshcd-dwc.o 
> tc-dwc-g210.o
>  obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
> +obj-$(CONFIG_SCSI_UFS_HI3660) += ufs-hi3660.o
>  obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
>  obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
>  obj-$(CONFIG_SCSI_UFSHCD_PLATFORM) += ufshcd-pltfrm.o
> diff --git a/drivers/scsi/ufs/ufs-hi3660.c b/drivers/scsi/ufs/ufs-hi3660.c
> new file mode 100755
> index ..ccbcb01f6863
> --- /dev/null
> +++ b/drivers/scsi/ufs/ufs-hi3660.c
> @@ -0,0 +1,715 @@
> +/*
> + * Copyright (c) 2016-2017 Linaro Ltd.
> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "ufshcd.h"
> +#include "ufshcd-pltfrm.h"
> +#include "unipro.h"
> +#include "ufs-hi3660.h"
> +#include "ufshci.h"
> +
> +static int ufs_hi3660_check_hibern8(struct ufs_hba *hba)
> +{
> +   int err;
> +   u32 tx_fsm_val_0;
> +   u32 tx_fsm_val_1;
> +   unsigned long timeout = jiffies + 
> msecs_to_jiffies(HBRN8_POLL_TOUT_MS);
> +
> +   do {
> +   err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 0),
> + _fsm_val_0);
> +   err |= ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 1),
> + _fsm_val_1);
> +   if (err || (tx_fsm_val_0 == TX_FSM_HIBERN8 && tx_fsm_val_1 == 
> TX_FSM_HIBERN8))
> +   break;
> +
> +   /* sleep for max. 200us */
> +   usleep_range(100, 200);
> +   } while (time_before(jiffies, timeout));
> +
> +   /*
> +* we might have scheduled out for long during polling so
> +* check the state again.
> +*/
> +   if (time_after(jiffies, timeout)) {
> +   err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 0),
> +_fsm_val_0);
> +   err |= ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 
> 1),
> +_fsm_val_1);
> +   }
> +
> +   if (err) {
> +   dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n",
> +   __func__, err);
> +   } else if (tx_fsm_val_0 != TX_FSM_HIBERN8 || tx_fsm_val_1 != 
> TX_FSM_HIBERN8) {
> +   err = -1;
> +   dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, 
> lane1 = %d\n",
> +   __func__, tx_fsm_val_0, tx_fsm_val_1);
> +   }
> +
> +   return err;
> +}
> +
> +static void ufs_hi3660_clk_init(struct ufs_hba *hba)
> +{
> +   struct ufs_hi3660_host *host = ufshcd_get_variant(hba);
> +
> +   ufs_sys_ctrl_clr_bits(host, BIT_SYSCTRL_REF_CLOCK_EN, PHY_CLK_CTRL);
> +  

[PATCH v5 4/4] of: detect invalid phandle in overlay

[frowand . list]

From: Frank Rowand 

Overlays are not allowed to modify phandle values of previously existing
nodes because there is no information available to allow fixup of
properties that use the previously existing phandle.

Signed-off-by: Frank Rowand 
---
 drivers/of/overlay.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index ca0b85f5deb1..20ab49d2f7a4 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -130,6 +130,10 @@ static int of_overlay_apply_single_device_node(struct 
of_overlay *ov,
/* NOTE: Multiple mods of created nodes not supported */
tchild = of_get_child_by_name(target, cname);
if (tchild != NULL) {
+   /* new overlay phandle value conflicts with existing value */
+   if (child->phandle)
+   return -EINVAL;
+
/* apply overlay recursively */
ret = of_overlay_apply_one(ov, tchild, child);
of_node_put(tchild);
-- 
Frank Rowand 

[PATCH v5 4/4] of: detect invalid phandle in overlay

[frowand . list]

From: Frank Rowand 

Overlays are not allowed to modify phandle values of previously existing
nodes because there is no information available to allow fixup of
properties that use the previously existing phandle.

Signed-off-by: Frank Rowand 
---
 drivers/of/overlay.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index ca0b85f5deb1..20ab49d2f7a4 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -130,6 +130,10 @@ static int of_overlay_apply_single_device_node(struct 
of_overlay *ov,
/* NOTE: Multiple mods of created nodes not supported */
tchild = of_get_child_by_name(target, cname);
if (tchild != NULL) {
+   /* new overlay phandle value conflicts with existing value */
+   if (child->phandle)
+   return -EINVAL;
+
/* apply overlay recursively */
ret = of_overlay_apply_one(ov, tchild, child);
of_node_put(tchild);
-- 
Frank Rowand 

[PATCH v5 2/4] of: make __of_attach_node() static

[frowand . list]

From: Frank Rowand 

__of_attach_node() is not used outside of drivers/of/dynamic.c.  Make
it static and remove it from drivers/of/of_private.h.

Signed-off-by: Frank Rowand 
---
 drivers/of/dynamic.c| 2 +-
 drivers/of/of_private.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
index be320082178f..3367ed2da9ad 100644
--- a/drivers/of/dynamic.c
+++ b/drivers/of/dynamic.c
@@ -216,7 +216,7 @@ int of_property_notify(int action, struct device_node *np,
return of_reconfig_notify(action, );
 }
 
-void __of_attach_node(struct device_node *np)
+static void __of_attach_node(struct device_node *np)
 {
np->child = NULL;
np->sibling = np->parent->child;
diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h
index 1a041411b219..73da291a51cd 100644
--- a/drivers/of/of_private.h
+++ b/drivers/of/of_private.h
@@ -91,7 +91,6 @@ extern int __of_update_property(struct device_node *np,
 extern void __of_update_property_sysfs(struct device_node *np,
struct property *newprop, struct property *oldprop);
 
-extern void __of_attach_node(struct device_node *np);
 extern int __of_attach_node_sysfs(struct device_node *np);
 extern void __of_detach_node(struct device_node *np);
 extern void __of_detach_node_sysfs(struct device_node *np);
-- 
Frank Rowand 

[PATCH v5 2/4] of: make __of_attach_node() static

[frowand . list]

From: Frank Rowand 

__of_attach_node() is not used outside of drivers/of/dynamic.c.  Make
it static and remove it from drivers/of/of_private.h.

Signed-off-by: Frank Rowand 
---
 drivers/of/dynamic.c| 2 +-
 drivers/of/of_private.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
index be320082178f..3367ed2da9ad 100644
--- a/drivers/of/dynamic.c
+++ b/drivers/of/dynamic.c
@@ -216,7 +216,7 @@ int of_property_notify(int action, struct device_node *np,
return of_reconfig_notify(action, );
 }
 
-void __of_attach_node(struct device_node *np)
+static void __of_attach_node(struct device_node *np)
 {
np->child = NULL;
np->sibling = np->parent->child;
diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h
index 1a041411b219..73da291a51cd 100644
--- a/drivers/of/of_private.h
+++ b/drivers/of/of_private.h
@@ -91,7 +91,6 @@ extern int __of_update_property(struct device_node *np,
 extern void __of_update_property_sysfs(struct device_node *np,
struct property *newprop, struct property *oldprop);
 
-extern void __of_attach_node(struct device_node *np);
 extern int __of_attach_node_sysfs(struct device_node *np);
 extern void __of_detach_node(struct device_node *np);
 extern void __of_detach_node_sysfs(struct device_node *np);
-- 
Frank Rowand 

[PATCH v5 1/4] of: remove *phandle properties from expanded device tree

[frowand . list]

From: Frank Rowand 

Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
the internal device tree.  The phandle will still be in the struct
device_node phandle field.

This is to resolve the issue found by Stephen Boyd [1] when he changed
the type of struct property.value from void * to const void *.  As
a result of the type change, the overlay code had compile errors
where the resolver updates phandle values.

  [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html

- Add sysfs infrastructure to report np->phandle, as if it was a property.
- Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
  in the expanded device tree.
- Remove phandle properties in of_attach_node(), for nodes dynamically
  attached to the live tree.  Add the phandle sysfs entry for these nodes.
- When creating an overlay changeset, duplicate the node phandle in
  __of_node_dup().
- Remove no longer needed checks to exclude "phandle" and "linux,phandle"
  properties in several locations.
- A side effect of these changes is that the obsolete "linux,phandle" and
  "ibm,phandle" properties will no longer appear in /proc/device-tree (they
  will appear as "phandle").
- A side effect is that the value of property "ibm,phandle" will no longer
  override the value of properties "phandle" and "linux,phandle".

Signed-off-by: Frank Rowand 
---
 drivers/of/base.c   | 48 +++---
 drivers/of/dynamic.c| 55 +
 drivers/of/fdt.c| 43 +++---
 drivers/of/of_private.h |  1 +
 drivers/of/overlay.c|  4 +---
 drivers/of/resolver.c   | 23 +
 include/linux/of.h  |  1 +
 7 files changed, 112 insertions(+), 63 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 28d5f53bc631..941c9a03471d 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file *filp, 
struct kobject *kobj,
return memory_read_from_buffer(buf, count, , pp->value, 
pp->length);
 }
 
+static ssize_t of_node_phandle_read(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *bin_attr, char *buf,
+   loff_t offset, size_t count)
+{
+   phandle phandle;
+   struct device_node *np;
+
+   np = container_of(bin_attr, struct device_node, attr_phandle);
+   phandle = cpu_to_be32(np->phandle);
+   return memory_read_from_buffer(buf, count, , ,
+  sizeof(phandle));
+}
+
 /* always return newly allocated name, caller must free after use */
 static const char *safe_name(struct kobject *kobj, const char *orig_name)
 {
@@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, struct 
property *pp)
return rc;
 }
 
+/*
+ * In the imported device tree (fdt), phandle is a property.  In the
+ * internal data structure it is instead stored in the struct device_node.
+ * Make phandle visible in sysfs as if it was a property.
+ */
+int __of_add_phandle_sysfs(struct device_node *np)
+{
+   int rc;
+
+   if (!IS_ENABLED(CONFIG_SYSFS))
+   return 0;
+
+   if (!of_kset || !of_node_is_attached(np))
+   return 0;
+
+   if (!np->phandle || np->phandle == 0x)
+   return 0;
+
+   sysfs_bin_attr_init(>attr_phandle);
+   np->attr_phandle.attr.name = "phandle";
+   np->attr_phandle.attr.mode = 0444;
+   np->attr_phandle.size = sizeof(np->phandle);
+   np->attr_phandle.read = of_node_phandle_read;
+
+   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
+   WARN(rc, "error adding attribute phandle to node %s\n", np->full_name);
+   return rc;
+}
+
 int __of_attach_node_sysfs(struct device_node *np)
 {
const char *name;
@@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
if (rc)
return rc;
 
+   __of_add_phandle_sysfs(np);
+
for_each_property_of_node(np, pp)
__of_add_property_sysfs(np, pp);
 
@@ -2128,9 +2172,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
align))
int id, len;
 
/* Skip those we do not want to proceed */
-   if (!strcmp(pp->name, "name") ||
-   !strcmp(pp->name, "phandle") ||
-   !strcmp(pp->name, "linux,phandle"))
+   if (!strcmp(pp->name, "name"))
continue;
 
np = of_find_node_by_path(pp->value);
diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
index 888fdbc09992..be320082178f 100644
--- a/drivers/of/dynamic.c
+++ b/drivers/of/dynamic.c
@@ -218,19 +218,6 @@ int of_property_notify(int action, struct device_node *np,
 
 void __of_attach_node(struct device_node *np)
 {
-   const __be32 *phandle;
-   int sz;
-
-   

[PATCH v5 1/4] of: remove *phandle properties from expanded device tree

[frowand . list]

From: Frank Rowand 

Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
the internal device tree.  The phandle will still be in the struct
device_node phandle field.

This is to resolve the issue found by Stephen Boyd [1] when he changed
the type of struct property.value from void * to const void *.  As
a result of the type change, the overlay code had compile errors
where the resolver updates phandle values.

  [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html

- Add sysfs infrastructure to report np->phandle, as if it was a property.
- Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
  in the expanded device tree.
- Remove phandle properties in of_attach_node(), for nodes dynamically
  attached to the live tree.  Add the phandle sysfs entry for these nodes.
- When creating an overlay changeset, duplicate the node phandle in
  __of_node_dup().
- Remove no longer needed checks to exclude "phandle" and "linux,phandle"
  properties in several locations.
- A side effect of these changes is that the obsolete "linux,phandle" and
  "ibm,phandle" properties will no longer appear in /proc/device-tree (they
  will appear as "phandle").
- A side effect is that the value of property "ibm,phandle" will no longer
  override the value of properties "phandle" and "linux,phandle".

Signed-off-by: Frank Rowand 
---
 drivers/of/base.c   | 48 +++---
 drivers/of/dynamic.c| 55 +
 drivers/of/fdt.c| 43 +++---
 drivers/of/of_private.h |  1 +
 drivers/of/overlay.c|  4 +---
 drivers/of/resolver.c   | 23 +
 include/linux/of.h  |  1 +
 7 files changed, 112 insertions(+), 63 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 28d5f53bc631..941c9a03471d 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file *filp, 
struct kobject *kobj,
return memory_read_from_buffer(buf, count, , pp->value, 
pp->length);
 }
 
+static ssize_t of_node_phandle_read(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *bin_attr, char *buf,
+   loff_t offset, size_t count)
+{
+   phandle phandle;
+   struct device_node *np;
+
+   np = container_of(bin_attr, struct device_node, attr_phandle);
+   phandle = cpu_to_be32(np->phandle);
+   return memory_read_from_buffer(buf, count, , ,
+  sizeof(phandle));
+}
+
 /* always return newly allocated name, caller must free after use */
 static const char *safe_name(struct kobject *kobj, const char *orig_name)
 {
@@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, struct 
property *pp)
return rc;
 }
 
+/*
+ * In the imported device tree (fdt), phandle is a property.  In the
+ * internal data structure it is instead stored in the struct device_node.
+ * Make phandle visible in sysfs as if it was a property.
+ */
+int __of_add_phandle_sysfs(struct device_node *np)
+{
+   int rc;
+
+   if (!IS_ENABLED(CONFIG_SYSFS))
+   return 0;
+
+   if (!of_kset || !of_node_is_attached(np))
+   return 0;
+
+   if (!np->phandle || np->phandle == 0x)
+   return 0;
+
+   sysfs_bin_attr_init(>attr_phandle);
+   np->attr_phandle.attr.name = "phandle";
+   np->attr_phandle.attr.mode = 0444;
+   np->attr_phandle.size = sizeof(np->phandle);
+   np->attr_phandle.read = of_node_phandle_read;
+
+   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
+   WARN(rc, "error adding attribute phandle to node %s\n", np->full_name);
+   return rc;
+}
+
 int __of_attach_node_sysfs(struct device_node *np)
 {
const char *name;
@@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
if (rc)
return rc;
 
+   __of_add_phandle_sysfs(np);
+
for_each_property_of_node(np, pp)
__of_add_property_sysfs(np, pp);
 
@@ -2128,9 +2172,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
align))
int id, len;
 
/* Skip those we do not want to proceed */
-   if (!strcmp(pp->name, "name") ||
-   !strcmp(pp->name, "phandle") ||
-   !strcmp(pp->name, "linux,phandle"))
+   if (!strcmp(pp->name, "name"))
continue;
 
np = of_find_node_by_path(pp->value);
diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
index 888fdbc09992..be320082178f 100644
--- a/drivers/of/dynamic.c
+++ b/drivers/of/dynamic.c
@@ -218,19 +218,6 @@ int of_property_notify(int action, struct device_node *np,
 
 void __of_attach_node(struct device_node *np)
 {
-   const __be32 *phandle;
-   int sz;
-
-   np->name = __of_get_property(np, "name", 

[PATCH v5 0/4] of: remove *phandle properties from expanded device tree

[frowand . list]

From: Frank Rowand 

Remove "phandle" and "linux,phandle" properties from the internal
device tree.  The phandle will still be in the struct device_node
phandle field.

This is to resolve the issue found by Stephen Boyd [1] when he changed
the type of struct property.value from void * to const void *.  As
a result of the type change, the overlay code had compile errors
where the resolver updates phandle values.

  [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html

Patch 1 is the phandle related changes.

Patches 2 - 4 are minor fixups for issues that became visible
while implementing patch 1.

Changes from v4:
   - rebase on 4.12-rc1
   - Add reason for "" in of_attach_node()
   - Simplify and consolidate phandle detection logic in
 populate_properties().  This results in a change of behaviour,
 the value of property "ibm,phandle" will no longer override the
 value of properties "phandle" and "linux,phandle".

Changes from v3:
   - patch 1: fix incorrect variable name in __of_add_phandle_sysfs().
 Problem was reported by the kbuild test robot

Changes from v2:
   - patch 1: Remove check in __of_add_phandle_sysfs() that would not
 add a sysfs entry if IS_ENABLED(CONFIG_PPC_PSERIES)

Changes from v1:
   - Remove phandle properties in of_attach_node(), before attaching
 the node to the live tree.
   - Add the phandle sysfs entry for the node in of_attach_node().
   - When creating an overlay changeset, duplicate the node phandle in
 __of_node_dup().

Frank Rowand (4):
  of: remove *phandle properties from expanded device tree
  of: make __of_attach_node() static
  of: be consistent in form of file mode
  of: detect invalid phandle in overlay

 drivers/of/base.c   | 50 +++
 drivers/of/dynamic.c| 57 +
 drivers/of/fdt.c| 43 ++---
 drivers/of/of_private.h |  2 +-
 drivers/of/overlay.c|  8 ---
 drivers/of/resolver.c   | 23 +---
 include/linux/of.h  |  1 +
 7 files changed, 118 insertions(+), 66 deletions(-)

-- 
Frank Rowand 

[PATCH v5 3/4] of: be consistent in form of file mode

[frowand . list]

From: Frank Rowand 

checkpatch whined about using S_IRUGO instead of octal equivalent
when adding phandle sysfs code, so used octal in that patch.
Change other instances of the S_* constants in the same file to
the octal form.

Signed-off-by: Frank Rowand 
---
 drivers/of/base.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 941c9a03471d..a4e2159c8671 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -168,7 +168,7 @@ int __of_add_property_sysfs(struct device_node *np, struct 
property *pp)
 
sysfs_bin_attr_init(>attr);
pp->attr.attr.name = safe_name(>kobj, pp->name);
-   pp->attr.attr.mode = secure ? S_IRUSR : S_IRUGO;
+   pp->attr.attr.mode = secure ? 0400 : 0444;
pp->attr.size = secure ? 0 : pp->length;
pp->attr.read = of_node_property_read;
 
-- 
Frank Rowand 

[PATCH v5 0/4] of: remove *phandle properties from expanded device tree

[frowand . list]

From: Frank Rowand 

Remove "phandle" and "linux,phandle" properties from the internal
device tree.  The phandle will still be in the struct device_node
phandle field.

This is to resolve the issue found by Stephen Boyd [1] when he changed
the type of struct property.value from void * to const void *.  As
a result of the type change, the overlay code had compile errors
where the resolver updates phandle values.

  [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html

Patch 1 is the phandle related changes.

Patches 2 - 4 are minor fixups for issues that became visible
while implementing patch 1.

Changes from v4:
   - rebase on 4.12-rc1
   - Add reason for "" in of_attach_node()
   - Simplify and consolidate phandle detection logic in
 populate_properties().  This results in a change of behaviour,
 the value of property "ibm,phandle" will no longer override the
 value of properties "phandle" and "linux,phandle".

Changes from v3:
   - patch 1: fix incorrect variable name in __of_add_phandle_sysfs().
 Problem was reported by the kbuild test robot

Changes from v2:
   - patch 1: Remove check in __of_add_phandle_sysfs() that would not
 add a sysfs entry if IS_ENABLED(CONFIG_PPC_PSERIES)

Changes from v1:
   - Remove phandle properties in of_attach_node(), before attaching
 the node to the live tree.
   - Add the phandle sysfs entry for the node in of_attach_node().
   - When creating an overlay changeset, duplicate the node phandle in
 __of_node_dup().

Frank Rowand (4):
  of: remove *phandle properties from expanded device tree
  of: make __of_attach_node() static
  of: be consistent in form of file mode
  of: detect invalid phandle in overlay

 drivers/of/base.c   | 50 +++
 drivers/of/dynamic.c| 57 +
 drivers/of/fdt.c| 43 ++---
 drivers/of/of_private.h |  2 +-
 drivers/of/overlay.c|  8 ---
 drivers/of/resolver.c   | 23 +---
 include/linux/of.h  |  1 +
 7 files changed, 118 insertions(+), 66 deletions(-)

-- 
Frank Rowand 

[PATCH v5 3/4] of: be consistent in form of file mode

[frowand . list]

From: Frank Rowand 

checkpatch whined about using S_IRUGO instead of octal equivalent
when adding phandle sysfs code, so used octal in that patch.
Change other instances of the S_* constants in the same file to
the octal form.

Signed-off-by: Frank Rowand 
---
 drivers/of/base.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 941c9a03471d..a4e2159c8671 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -168,7 +168,7 @@ int __of_add_property_sysfs(struct device_node *np, struct 
property *pp)
 
sysfs_bin_attr_init(>attr);
pp->attr.attr.name = safe_name(>kobj, pp->name);
-   pp->attr.attr.mode = secure ? S_IRUSR : S_IRUGO;
+   pp->attr.attr.mode = secure ? 0400 : 0444;
pp->attr.size = secure ? 0 : pp->length;
pp->attr.read = of_node_property_read;
 
-- 
Frank Rowand 

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

Bu Tao,

One other issue: the 'sender' of your patchset is "butao". For
upstreaming purpose, it is recommended to use your full name, in
"first name" + "Surname" format. In your case, you need to specify it
in your commit message:

$ git commit --amend --author="Bu Tao "

You may also want to add that to your .gitconfig to save your future effort.
[user]
name = Bu Tao
email = bu...@hisilicon.com

-Guodong


On Sat, Jun 10, 2017 at 10:44 AM, Guodong Xu  wrote:
> Bu Tao,
>
> 1. Subject line of this patch goes something like "arm64: dts: hi3660:
> add ufs support xxx"
>
> 2. Have you run "./scripts/get_maintainer.pl *.patch" to get the
> correct maintainers to include into your patch review?
> I don't think so. Because this is a dts change, however in your
> email's to/ cc/, there is no DTS reviewers being included. Please fix
> that and resend.
>
> 3. I suppose before sending your patchset, you already tested it
> against tip kernel. For example, where your dts change can be applied?
> If they apply to my dts patchset [1], please mention it in your commit
> message. If they don't, then please tell us where.
>
> [1].  http://www.spinics.net/lists/devicetree/msg178303.html
>
> 4. Re-send, send them as "git format-patch -v2".
>
> -Guodong
>
> On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
>> add ufs node for hi3660
>>
>> Signed-off-by: Bu Tao 
>> ---
>>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>>  1 file changed, 20 insertions(+)
>>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
>> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> old mode 100644
>> new mode 100755
>> index 3983086bd67b..4ba9cec43d94
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> @@ -141,6 +141,26 @@
>> #size-cells = <2>;
>> ranges;
>>
>> +ufs: ufs@ff3b {
>> +compatible = "jedec,ufs-1.1", 
>> "hisilicon,hi3660-ufs";
>> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
>> standard */
>> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
>> SYS CTRL */
>> +interrupt-parent = <>;
>> +interrupts = <0 278 4>;
>> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
>> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
>> +clock-names = "clk_ref", "clk_phy";
>> +freq-table-hz = <0 0>, <0 0>;
>> +resets = <_rst 0x84 12>,   /* offset: 
>> 0x84; bit: 12 */
>> + <_rst 0x84 7>;/* offset: 
>> 0x84; bit: 7  */
>> +reset-names = "rst", "assert";
>> +ufs-hi3660-use-rate-B;
>> +ufs-hi3660-broken-fastauto;
>> +ufs-hi3660-use-HS-GEAR3;
>> +ufs-hi3660-broken-clk-gate-bypass;
>> +status = "ok";
>> +};
>> +
>> fixed_uart5: fixed_19_2M {
>> compatible = "fixed-clock";
>> #clock-cells = <0>;
>> --
>> 2.11.GIT
>>

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

Bu Tao,

One other issue: the 'sender' of your patchset is "butao". For
upstreaming purpose, it is recommended to use your full name, in
"first name" + "Surname" format. In your case, you need to specify it
in your commit message:

$ git commit --amend --author="Bu Tao "

You may also want to add that to your .gitconfig to save your future effort.
[user]
name = Bu Tao
email = bu...@hisilicon.com

-Guodong


On Sat, Jun 10, 2017 at 10:44 AM, Guodong Xu  wrote:
> Bu Tao,
>
> 1. Subject line of this patch goes something like "arm64: dts: hi3660:
> add ufs support xxx"
>
> 2. Have you run "./scripts/get_maintainer.pl *.patch" to get the
> correct maintainers to include into your patch review?
> I don't think so. Because this is a dts change, however in your
> email's to/ cc/, there is no DTS reviewers being included. Please fix
> that and resend.
>
> 3. I suppose before sending your patchset, you already tested it
> against tip kernel. For example, where your dts change can be applied?
> If they apply to my dts patchset [1], please mention it in your commit
> message. If they don't, then please tell us where.
>
> [1].  http://www.spinics.net/lists/devicetree/msg178303.html
>
> 4. Re-send, send them as "git format-patch -v2".
>
> -Guodong
>
> On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
>> add ufs node for hi3660
>>
>> Signed-off-by: Bu Tao 
>> ---
>>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>>  1 file changed, 20 insertions(+)
>>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
>> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> old mode 100644
>> new mode 100755
>> index 3983086bd67b..4ba9cec43d94
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> @@ -141,6 +141,26 @@
>> #size-cells = <2>;
>> ranges;
>>
>> +ufs: ufs@ff3b {
>> +compatible = "jedec,ufs-1.1", 
>> "hisilicon,hi3660-ufs";
>> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
>> standard */
>> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
>> SYS CTRL */
>> +interrupt-parent = <>;
>> +interrupts = <0 278 4>;
>> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
>> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
>> +clock-names = "clk_ref", "clk_phy";
>> +freq-table-hz = <0 0>, <0 0>;
>> +resets = <_rst 0x84 12>,   /* offset: 
>> 0x84; bit: 12 */
>> + <_rst 0x84 7>;/* offset: 
>> 0x84; bit: 7  */
>> +reset-names = "rst", "assert";
>> +ufs-hi3660-use-rate-B;
>> +ufs-hi3660-broken-fastauto;
>> +ufs-hi3660-use-HS-GEAR3;
>> +ufs-hi3660-broken-clk-gate-bypass;
>> +status = "ok";
>> +};
>> +
>> fixed_uart5: fixed_19_2M {
>> compatible = "fixed-clock";
>> #clock-cells = <0>;
>> --
>> 2.11.GIT
>>

Re: [PATCH v2 0/3] Add support for Cavium CNN55XX crypto adapters.

[Herbert Xu]

On Tue, May 30, 2017 at 05:28:00PM +0530, Srikanth Jampala wrote:
> This series adds support for Cavium CNN55XX crypto adapters.
>   
>  CNN55XX crypto adapters belongs to Cavium NITROX family series,
>  able to accelerates both Symmetric and Asymmetric crypto workloads.
>  These adapters have crypto cores for Symmetric and Asymmetric
>  crypto operations, and needs to load firmware to become operational.
>  
>  Patches are generated on top of kernel/git/herbert/crypto-2.6
> 
>  The series was tested with dm-crypt for in kernel
>  cryptographic offload operations.
> 
> Changes from v1 to v2:

All applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v5 3/3] drivers:power:twl4030-charger: add deferred probing for phy and iio

[H. Nikolaus Schaller]

Hi Grygorii,

> Am 09.06.2017 um 18:25 schrieb Grygorii Strashko :
> 
> 
> 
> On 06/09/2017 01:05 AM, H. Nikolaus Schaller wrote:
>> Hi,
>> 
>>> Am 07.06.2017 um 22:44 schrieb Sebastian Reichel :
>>> 
>>> Hi,
>>> 
>>> On Sun, May 21, 2017 at 12:38:18PM +0200, H. Nikolaus Schaller wrote:
 This fixes an issue if both this twl4030_charger driver and
 phy-twl4030-usb are compiled as modules and loaded in random order.
 It has been observed on GTA04 and OpenPandora devices that in worst
 case the boot process hangs and in best case the AC detection fails
 with a warning.
 
 Therefore we add deferred probing checks for the usb_phy and the
 iio channel for AC detection.
 
 For implementing this we must reorder code because we can't safely
 return -EPROBE_DEFER after allocating any devm managed interrupt
 (it might already/still be enabled without working interrupt handler).
 
 So the check for required resources that may abort probing by
 returning -EPROBE_DEFER, must come first.
>>> 
>>> This sounds fishy. EPROBE_DEFER should not be different from
>>> other error codes in this regard and devm_ requested resources
>>> should be free'd on any error. Why is irq handler not working?
>> 
>> 1. there is no other error code involved, before we try to convert the 
>> driver to handle EPROBE_DEFER.
>> So it is not that EPROBE_DEFER is special but that we add an error return 
>> path for it.
>> 
>> 2. I don't know why it is not working - I just know that the handler seems 
>> to be triggered before
>> all resources are available (if probe() is aborted with EPROBE_DEFER error 
>> paths) which ends up in kernel panics.
>> 
>> Therefore just to be safe, I have reordered things a little (without 
>> changing the function):
>> 
>> 1. check for resources (with some EPROBE_DEFER)
>> 2. allocate non-devm (with optional EPROBE_DEFER)
>> 3. allocate devm
>> 
>> So this should be safe in any case.
>> 
>> Please also compare a discussion
>> 
>> https://lkml.org/lkml/2013/2/22/65
>> 
>>> 
 Signed-off-by: H. Nikolaus Schaller 
 ---
 drivers/power/supply/twl4030_charger.c | 37 
 --
 1 file changed, 22 insertions(+), 15 deletions(-)
 
 diff --git a/drivers/power/supply/twl4030_charger.c 
 b/drivers/power/supply/twl4030_charger.c
 index 785a07bc4f39..945eabdbbc89 100644
 --- a/drivers/power/supply/twl4030_charger.c
 +++ b/drivers/power/supply/twl4030_charger.c
 @@ -984,6 +984,28 @@ static int twl4030_bci_probe(struct platform_device 
 *pdev)
 
platform_set_drvdata(pdev, bci);
 
 +  if (bci->dev->of_node) {
 +  struct device_node *phynode;
 +
 +  phynode = of_find_compatible_node(bci->dev->of_node->parent,
 +NULL, "ti,twl4030-usb");
 +  if (phynode) {
 +  bci->transceiver = devm_usb_get_phy_by_node(
 +  bci->dev, phynode, >usb_nb);
 +  if (IS_ERR(bci->transceiver) &&
 +  PTR_ERR(bci->transceiver) == -EPROBE_DEFER)
 +  return -EPROBE_DEFER;   /* PHY not ready */
 +  }
 +  }
 +
 +  bci->channel_vac = iio_channel_get(>dev, "vac");
 +  if (IS_ERR(bci->channel_vac)) {
 +  if (PTR_ERR(bci->channel_vac) == -EPROBE_DEFER)
 +  return -EPROBE_DEFER;   /* iio not ready */
 +  dev_warn(>dev, "could not request vac iio channel");
 +  bci->channel_vac = NULL;
 +  }
 +
>>> 
>>> You should not request non-devm managed iio_channel before
>>> devm-managed power-supply.
>> 
>> Well, it is not *me* doing that.
>> 
>> It is the unpatched driver which already does. See:
>> 
>>  
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/power/supply/twl4030_charger.c?h=v4.12-rc4#n1069
>> 
>> I have just moved this line to a different location to be able to add a 
>> proper EPROBE_DEFER return path.
>> 
>>> This could be fixed by switching to
>>> devm_iio_channel_get(), which also cleans up some code.
>> 
>> Yes, this could be an alternative solution.
>> We still need EPROBE_DEFER handling.
>> 
>>> 
>>> I suspect, that this is also your IRQ problem, since iio_channel
>>> is currently free'd before irqs are free'd, but its used in irq
>>> code.
>> 
>> Hm. No.
>> 
>> In upstream code it is never freed on probe failure because there is only
>> an error return (goto fail) after allocating irqs in case the
>> twl_i2c_write_u8 fails. Which usually doesn't.
>> 
>> The EPROBE_DEFER returned by iio_channel_get not being ready simply prints
>> a warning and turns off AC detection (bci->channel_vac = NULL) forever.
>> 
>>> 
bci->ac = devm_power_supply_register(>dev, _bci_ac_desc,
 

Re: [PATCH v2 0/3] Add support for Cavium CNN55XX crypto adapters.

[Herbert Xu]

On Tue, May 30, 2017 at 05:28:00PM +0530, Srikanth Jampala wrote:
> This series adds support for Cavium CNN55XX crypto adapters.
>   
>  CNN55XX crypto adapters belongs to Cavium NITROX family series,
>  able to accelerates both Symmetric and Asymmetric crypto workloads.
>  These adapters have crypto cores for Symmetric and Asymmetric
>  crypto operations, and needs to load firmware to become operational.
>  
>  Patches are generated on top of kernel/git/herbert/crypto-2.6
> 
>  The series was tested with dm-crypt for in kernel
>  cryptographic offload operations.
> 
> Changes from v1 to v2:

All applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v5 3/3] drivers:power:twl4030-charger: add deferred probing for phy and iio

[H. Nikolaus Schaller]

Hi Grygorii,

> Am 09.06.2017 um 18:25 schrieb Grygorii Strashko :
> 
> 
> 
> On 06/09/2017 01:05 AM, H. Nikolaus Schaller wrote:
>> Hi,
>> 
>>> Am 07.06.2017 um 22:44 schrieb Sebastian Reichel :
>>> 
>>> Hi,
>>> 
>>> On Sun, May 21, 2017 at 12:38:18PM +0200, H. Nikolaus Schaller wrote:
 This fixes an issue if both this twl4030_charger driver and
 phy-twl4030-usb are compiled as modules and loaded in random order.
 It has been observed on GTA04 and OpenPandora devices that in worst
 case the boot process hangs and in best case the AC detection fails
 with a warning.
 
 Therefore we add deferred probing checks for the usb_phy and the
 iio channel for AC detection.
 
 For implementing this we must reorder code because we can't safely
 return -EPROBE_DEFER after allocating any devm managed interrupt
 (it might already/still be enabled without working interrupt handler).
 
 So the check for required resources that may abort probing by
 returning -EPROBE_DEFER, must come first.
>>> 
>>> This sounds fishy. EPROBE_DEFER should not be different from
>>> other error codes in this regard and devm_ requested resources
>>> should be free'd on any error. Why is irq handler not working?
>> 
>> 1. there is no other error code involved, before we try to convert the 
>> driver to handle EPROBE_DEFER.
>> So it is not that EPROBE_DEFER is special but that we add an error return 
>> path for it.
>> 
>> 2. I don't know why it is not working - I just know that the handler seems 
>> to be triggered before
>> all resources are available (if probe() is aborted with EPROBE_DEFER error 
>> paths) which ends up in kernel panics.
>> 
>> Therefore just to be safe, I have reordered things a little (without 
>> changing the function):
>> 
>> 1. check for resources (with some EPROBE_DEFER)
>> 2. allocate non-devm (with optional EPROBE_DEFER)
>> 3. allocate devm
>> 
>> So this should be safe in any case.
>> 
>> Please also compare a discussion
>> 
>> https://lkml.org/lkml/2013/2/22/65
>> 
>>> 
 Signed-off-by: H. Nikolaus Schaller 
 ---
 drivers/power/supply/twl4030_charger.c | 37 
 --
 1 file changed, 22 insertions(+), 15 deletions(-)
 
 diff --git a/drivers/power/supply/twl4030_charger.c 
 b/drivers/power/supply/twl4030_charger.c
 index 785a07bc4f39..945eabdbbc89 100644
 --- a/drivers/power/supply/twl4030_charger.c
 +++ b/drivers/power/supply/twl4030_charger.c
 @@ -984,6 +984,28 @@ static int twl4030_bci_probe(struct platform_device 
 *pdev)
 
platform_set_drvdata(pdev, bci);
 
 +  if (bci->dev->of_node) {
 +  struct device_node *phynode;
 +
 +  phynode = of_find_compatible_node(bci->dev->of_node->parent,
 +NULL, "ti,twl4030-usb");
 +  if (phynode) {
 +  bci->transceiver = devm_usb_get_phy_by_node(
 +  bci->dev, phynode, >usb_nb);
 +  if (IS_ERR(bci->transceiver) &&
 +  PTR_ERR(bci->transceiver) == -EPROBE_DEFER)
 +  return -EPROBE_DEFER;   /* PHY not ready */
 +  }
 +  }
 +
 +  bci->channel_vac = iio_channel_get(>dev, "vac");
 +  if (IS_ERR(bci->channel_vac)) {
 +  if (PTR_ERR(bci->channel_vac) == -EPROBE_DEFER)
 +  return -EPROBE_DEFER;   /* iio not ready */
 +  dev_warn(>dev, "could not request vac iio channel");
 +  bci->channel_vac = NULL;
 +  }
 +
>>> 
>>> You should not request non-devm managed iio_channel before
>>> devm-managed power-supply.
>> 
>> Well, it is not *me* doing that.
>> 
>> It is the unpatched driver which already does. See:
>> 
>>  
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/power/supply/twl4030_charger.c?h=v4.12-rc4#n1069
>> 
>> I have just moved this line to a different location to be able to add a 
>> proper EPROBE_DEFER return path.
>> 
>>> This could be fixed by switching to
>>> devm_iio_channel_get(), which also cleans up some code.
>> 
>> Yes, this could be an alternative solution.
>> We still need EPROBE_DEFER handling.
>> 
>>> 
>>> I suspect, that this is also your IRQ problem, since iio_channel
>>> is currently free'd before irqs are free'd, but its used in irq
>>> code.
>> 
>> Hm. No.
>> 
>> In upstream code it is never freed on probe failure because there is only
>> an error return (goto fail) after allocating irqs in case the
>> twl_i2c_write_u8 fails. Which usually doesn't.
>> 
>> The EPROBE_DEFER returned by iio_channel_get not being ready simply prints
>> a warning and turns off AC detection (bci->channel_vac = NULL) forever.
>> 
>>> 
bci->ac = devm_power_supply_register(>dev, _bci_ac_desc,
 NULL);
if (IS_ERR(bci->ac)) {
 @@ -1017,25 

Re: [PATCH] crypto: rng - move __crypto_rng_cast to the rng header

[Herbert Xu]

On Tue, May 09, 2017 at 10:32:22AM +0200, Corentin Labbe wrote:
> This patch move __crypto_rng_cast() to the right header like other
> __algo_cast functions.
> 
> Signed-off-by: Corentin Labbe 

As there is another patch which will remove thie function altogether,
I think I'll just leave it in place.

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v1 0/2] remove mediatek ethif clock in crypto driver

[Herbert Xu]

On Thu, Jun 01, 2017 at 10:30:20AM +0800, Ryder Lee wrote:
> This patch series only remove redundant clock setting in mediatek crypto 
> driver.
> 
> Changes since v1:
> -rework the commit message.

All applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH] crypto: rng - move __crypto_rng_cast to the rng header

[Herbert Xu]

On Tue, May 09, 2017 at 10:32:22AM +0200, Corentin Labbe wrote:
> This patch move __crypto_rng_cast() to the right header like other
> __algo_cast functions.
> 
> Signed-off-by: Corentin Labbe 

As there is another patch which will remove thie function altogether,
I think I'll just leave it in place.

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v1 0/2] remove mediatek ethif clock in crypto driver

[Herbert Xu]

On Thu, Jun 01, 2017 at 10:30:20AM +0800, Ryder Lee wrote:
> This patch series only remove redundant clock setting in mediatek crypto 
> driver.
> 
> Changes since v1:
> -rework the commit message.

All applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH] crypto: rng: Remove unused function __crypto_rng_cast()

[Herbert Xu]

On Mon, May 22, 2017 at 03:49:43PM -0700, Matthias Kaehlcke wrote:
> This fixes the following warning when building with clang:
> 
> crypto/rng.c:35:34: error: unused function '__crypto_rng_cast'
> [-Werror,-Wunused-function]
> 
> Signed-off-by: Matthias Kaehlcke 

Patch applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH] crypto: rng: Remove unused function __crypto_rng_cast()

[Herbert Xu]

On Mon, May 22, 2017 at 03:49:43PM -0700, Matthias Kaehlcke wrote:
> This fixes the following warning when building with clang:
> 
> crypto/rng.c:35:34: error: unused function '__crypto_rng_cast'
> [-Werror,-Wunused-function]
> 
> Signed-off-by: Matthias Kaehlcke 

Patch applied.  Thanks.
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
> add ufs node for hi3660
>
> Signed-off-by: Bu Tao 
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>  1 file changed, 20 insertions(+)
>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi

Mode change 755? Err.

>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> old mode 100644
> new mode 100755
> index 3983086bd67b..4ba9cec43d94
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -141,6 +141,26 @@
> #size-cells = <2>;
> ranges;
>
> +ufs: ufs@ff3b {
> +compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
> standard */
> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
> SYS CTRL */
> +interrupt-parent = <>;
> +interrupts = <0 278 4>;
> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> +clock-names = "clk_ref", "clk_phy";
> +freq-table-hz = <0 0>, <0 0>;
> +resets = <_rst 0x84 12>,   /* offset: 
> 0x84; bit: 12 */
> + <_rst 0x84 7>;/* offset: 
> 0x84; bit: 7  */
> +reset-names = "rst", "assert";
> +ufs-hi3660-use-rate-B;
> +ufs-hi3660-broken-fastauto;
> +ufs-hi3660-use-HS-GEAR3;
> +ufs-hi3660-broken-clk-gate-bypass;
> +status = "ok";
> +};
> +
> fixed_uart5: fixed_19_2M {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> --
> 2.11.GIT
>

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
> add ufs node for hi3660
>
> Signed-off-by: Bu Tao 
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>  1 file changed, 20 insertions(+)
>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi

Mode change 755? Err.

>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> old mode 100644
> new mode 100755
> index 3983086bd67b..4ba9cec43d94
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -141,6 +141,26 @@
> #size-cells = <2>;
> ranges;
>
> +ufs: ufs@ff3b {
> +compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
> standard */
> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
> SYS CTRL */
> +interrupt-parent = <>;
> +interrupts = <0 278 4>;
> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> +clock-names = "clk_ref", "clk_phy";
> +freq-table-hz = <0 0>, <0 0>;
> +resets = <_rst 0x84 12>,   /* offset: 
> 0x84; bit: 12 */
> + <_rst 0x84 7>;/* offset: 
> 0x84; bit: 7  */
> +reset-names = "rst", "assert";
> +ufs-hi3660-use-rate-B;
> +ufs-hi3660-broken-fastauto;
> +ufs-hi3660-use-HS-GEAR3;
> +ufs-hi3660-broken-clk-gate-bypass;
> +status = "ok";
> +};
> +
> fixed_uart5: fixed_19_2M {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> --
> 2.11.GIT
>

[PATCH v2 1/2] spi: mediatek: adjust register to enhance time accuracy

[Leilk Liu]

this patch adjust register to enhance time accuracy.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   45 ++
 include/linux/platform_data/spi-mt65xx.h |2 ++
 2 files changed, 42 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
 #define SPI_CMD_REG   0x0018
 #define SPI_STATUS0_REG   0x001c
 #define SPI_PAD_SEL_REG   0x0024
+#define SPI_CFG2_REG  0x0028
 
 #define SPI_CFG0_SCK_HIGH_OFFSET  0
 #define SPI_CFG0_SCK_LOW_OFFSET   8
 #define SPI_CFG0_CS_HOLD_OFFSET   16
 #define SPI_CFG0_CS_SETUP_OFFSET  24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET   16
 
 #define SPI_CFG1_CS_IDLE_OFFSET   0
 #define SPI_CFG1_PACKET_LOOP_OFFSET   8
@@ -55,6 +59,8 @@
 #define SPI_CMD_RST  BIT(2)
 #define SPI_CMD_PAUSE_EN BIT(4)
 #define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL   BIT(6)
+#define SPI_CMD_CS_POL   BIT(7)
 #define SPI_CMD_CPHA BIT(8)
 #define SPI_CMD_CPOL BIT(9)
 #define SPI_CMD_RX_DMA   BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+   /* some IC design adjust cfg register to enhance time accuracy */
+   bool enhance_timing;
 };
 
 struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
 static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+   .cs_pol = 0,
+   .sample_sel = 0,
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
 #endif
 
+   if (mdata->dev_comp->enhance_timing) {
+   if (chip_config->cs_pol)
+   reg_val |= SPI_CMD_CS_POL;
+   else
+   reg_val &= ~SPI_CMD_CS_POL;
+   if (chip_config->sample_sel)
+   reg_val |= SPI_CMD_SAMPLE_SEL;
+   else
+   reg_val &= ~SPI_CMD_SAMPLE_SEL;
+   }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
 
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master 
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
 
-   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
-   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
-   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
-   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
-   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   if (mdata->dev_comp->enhance_timing) {
+   reg_val |= (((sck_time - 1) & 0x)
+  << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG2_REG);
+   reg_val |= (((cs_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   } else {
+   reg_val |= (((sck_time - 1) & 0xff)
+  << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   }
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h 
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
 struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+   u32 cs_pol;
+   u32 sample_sel;
 };
 #endif
-- 
1.7.9.5

[PATCH v2 1/2] spi: mediatek: adjust register to enhance time accuracy

[Leilk Liu]

this patch adjust register to enhance time accuracy.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   45 ++
 include/linux/platform_data/spi-mt65xx.h |2 ++
 2 files changed, 42 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
 #define SPI_CMD_REG   0x0018
 #define SPI_STATUS0_REG   0x001c
 #define SPI_PAD_SEL_REG   0x0024
+#define SPI_CFG2_REG  0x0028
 
 #define SPI_CFG0_SCK_HIGH_OFFSET  0
 #define SPI_CFG0_SCK_LOW_OFFSET   8
 #define SPI_CFG0_CS_HOLD_OFFSET   16
 #define SPI_CFG0_CS_SETUP_OFFSET  24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET   16
 
 #define SPI_CFG1_CS_IDLE_OFFSET   0
 #define SPI_CFG1_PACKET_LOOP_OFFSET   8
@@ -55,6 +59,8 @@
 #define SPI_CMD_RST  BIT(2)
 #define SPI_CMD_PAUSE_EN BIT(4)
 #define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL   BIT(6)
+#define SPI_CMD_CS_POL   BIT(7)
 #define SPI_CMD_CPHA BIT(8)
 #define SPI_CMD_CPOL BIT(9)
 #define SPI_CMD_RX_DMA   BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+   /* some IC design adjust cfg register to enhance time accuracy */
+   bool enhance_timing;
 };
 
 struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
 static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+   .cs_pol = 0,
+   .sample_sel = 0,
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
 #endif
 
+   if (mdata->dev_comp->enhance_timing) {
+   if (chip_config->cs_pol)
+   reg_val |= SPI_CMD_CS_POL;
+   else
+   reg_val &= ~SPI_CMD_CS_POL;
+   if (chip_config->sample_sel)
+   reg_val |= SPI_CMD_SAMPLE_SEL;
+   else
+   reg_val &= ~SPI_CMD_SAMPLE_SEL;
+   }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
 
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master 
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
 
-   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
-   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
-   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
-   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
-   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   if (mdata->dev_comp->enhance_timing) {
+   reg_val |= (((sck_time - 1) & 0x)
+  << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG2_REG);
+   reg_val |= (((cs_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0x)
+  << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   } else {
+   reg_val |= (((sck_time - 1) & 0xff)
+  << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+   writel(reg_val, mdata->base + SPI_CFG0_REG);
+   }
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h 
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
 struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+   u32 cs_pol;
+   u32 sample_sel;
 };
 #endif
-- 
1.7.9.5

[PATCH v2 2/2] spi: mediatek: add spi support for mt7622 IC

[Leilk Liu]

this patch add support for mt7622 IC.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..4bf6495 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
 };
 
 static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+   .must_tx = true,
+   .adjust_reg = true,
+};
+
 static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+   { .compatible = "mediatek,mt7622-spi",
+   .data = (void *)_compat,
+   },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
-- 
1.7.9.5

[PATCH v2 0/2] add mt7622 spi support

[Leilk Liu]

This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC.

Change in v2:
1. rename patch title;
2. use enhance_timing to instead of adjust_reg.

Change in v1:
1. update document to add mt7622;
2. add adjust register define support;
3. add mt7622_compat.

Leilk Liu (2):
  spi: mediatek: adjust register to enhance time accuracy
  spi: mediatek: add spi support for mt7622 IC

 drivers/spi/spi-mt65xx.c |   54 +++---
 include/linux/platform_data/spi-mt65xx.h |2 ++
 2 files changed, 51 insertions(+), 5 deletions(-)

--
1.7.9.5

[PATCH v2 2/2] spi: mediatek: add spi support for mt7622 IC

[Leilk Liu]

this patch add support for mt7622 IC.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..4bf6495 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
 };
 
 static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+   .must_tx = true,
+   .adjust_reg = true,
+};
+
 static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+   { .compatible = "mediatek,mt7622-spi",
+   .data = (void *)_compat,
+   },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
-- 
1.7.9.5

[PATCH v2 0/2] add mt7622 spi support

[Leilk Liu]

This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC.

Change in v2:
1. rename patch title;
2. use enhance_timing to instead of adjust_reg.

Change in v1:
1. update document to add mt7622;
2. add adjust register define support;
3. add mt7622_compat.

Leilk Liu (2):
  spi: mediatek: adjust register to enhance time accuracy
  spi: mediatek: add spi support for mt7622 IC

 drivers/spi/spi-mt65xx.c |   54 +++---
 include/linux/platform_data/spi-mt65xx.h |2 ++
 2 files changed, 51 insertions(+), 5 deletions(-)

--
1.7.9.5

Re: [PATCH 1/2] arm:omap2+: put omap_uart_phys/virt/lsr in .text section when ZIMAGE is true

[Hoeun Ryu]

Hello, Russell.

Would you please review this patch ?

Than you

> On Jun 8, 2017, at 11:16 AM, Hoeun Ryu  wrote:
> 
> omap_uart_phys, omap_uart_virt and omap_uart_lsr reside in .data section
> and it's right implementation. But because of this, we cannot enable
> CONFIG_DEBUG_UNCOMPRESS. LL_DEBUG and DEBUG_UNCOMPRESS are very useful tools
> for debugging early boot stage when something goes wrong if you don't have
> any hardware based debugging tools like a JTAG debugger.
> This patch is to put the variables into .text section instead only when the
> DEBUG_LL_INCLUDE file is included in the kernel decompressor, which is only
> when ZIMAGE is defined.
> This patch does not change anything when DEBUG_LL_INCLUDE is included in
> the other kernel parts like arch/arm/kernel/*
> 
> Signed-off-by: Hoeun Ryu 
> ---
> arch/arm/include/debug/omap2plus.S | 11 +++
> 1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/include/debug/omap2plus.S 
> b/arch/arm/include/debug/omap2plus.S
> index 6d867ae..6ce6ef9 100644
> --- a/arch/arm/include/debug/omap2plus.S
> +++ b/arch/arm/include/debug/omap2plus.S
> @@ -58,11 +58,22 @@
> 
> #define UART_OFFSET(addr)((addr) & 0x00ff)
> 
> +/*
> + * Definition of ZIMAGE is in arch/arm/boot/compressed/Makefile.
> + * Place the following block in .text section only when this file is
> + * included by arch/arm/boot/compressed/* to make it possible to
> + * enable CONFIG_DEBUG_UNCOMPRESS and DEBUG in 
> arch/arm/boot/compressed/head.S
> + * on OMAP2+ SoCs.
> + */
> +#ifndef ZIMAGE
>.pushsection .data
> +#endif
> omap_uart_phys:.word0
> omap_uart_virt:.word0
> omap_uart_lsr:.word0
> +#ifndef ZIMAGE
>.popsection
> +#endif
> 
>.macroaddruart, rp, rv, tmp
> 
> -- 
> 2.7.4
> 

Re: [PATCH] arm:lpae: build TTB control register value from scratch in v7_ttb_setup

[Hoeun Ryu]

Hello, Russell and Robin.

Would you please review this patch ?

Than you

> On Jun 7, 2017, at 11:39 AM, Hoeun Ryu  wrote:
> 
> Reading TTBCR in early boot stage might return the value of the previous
> kernel's configuration, especially in case of kexec. For example, if
> normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <=
> PAGE_OFFSET and crash kernel (second kernel) is running on a configuration
> PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the
> reserved area for crash kernel, reading TTBCR and using the value to OR
> other bit fields might be risky because it doesn't have a reset value for
> TTBCR.
> 
> Suggested-by: Robin Murphy 
> Signed-off-by: Hoeun Ryu 
> ---
> 
> * v1: amended based on
>  - "[PATCHv2] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when
> PHYS_OFFSET > PAGE_OFFSET"
>  - https://lkml.org/lkml/2017/6/5/239
> 
> arch/arm/mm/proc-v7-3level.S | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
> index 5e5720e..7d16bbc 100644
> --- a/arch/arm/mm/proc-v7-3level.S
> +++ b/arch/arm/mm/proc-v7-3level.S
> @@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext)
>.macrov7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
>ldr\tmp, =swapper_pg_dir@ swapper_pg_dir virtual address
>cmp\ttbr1, \tmp, lsr #12@ PHYS_OFFSET > PAGE_OFFSET?
> -mrcp15, 0, \tmp, c2, c0, 2@ TTB control egister
> -orr\tmp, \tmp, #TTB_EAE
> +mov\tmp, #TTB_EAE@ for TTB control egister
>ALT_SMP(orr\tmp, \tmp, #TTB_FLAGS_SMP)
>ALT_UP(orr\tmp, \tmp, #TTB_FLAGS_UP)
>ALT_SMP(orr\tmp, \tmp, #TTB_FLAGS_SMP << 16)
> -- 
> 2.7.4
> 

Re: [PATCH 1/2] arm:omap2+: put omap_uart_phys/virt/lsr in .text section when ZIMAGE is true

[Hoeun Ryu]

Hello, Russell.

Would you please review this patch ?

Than you

> On Jun 8, 2017, at 11:16 AM, Hoeun Ryu  wrote:
> 
> omap_uart_phys, omap_uart_virt and omap_uart_lsr reside in .data section
> and it's right implementation. But because of this, we cannot enable
> CONFIG_DEBUG_UNCOMPRESS. LL_DEBUG and DEBUG_UNCOMPRESS are very useful tools
> for debugging early boot stage when something goes wrong if you don't have
> any hardware based debugging tools like a JTAG debugger.
> This patch is to put the variables into .text section instead only when the
> DEBUG_LL_INCLUDE file is included in the kernel decompressor, which is only
> when ZIMAGE is defined.
> This patch does not change anything when DEBUG_LL_INCLUDE is included in
> the other kernel parts like arch/arm/kernel/*
> 
> Signed-off-by: Hoeun Ryu 
> ---
> arch/arm/include/debug/omap2plus.S | 11 +++
> 1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/include/debug/omap2plus.S 
> b/arch/arm/include/debug/omap2plus.S
> index 6d867ae..6ce6ef9 100644
> --- a/arch/arm/include/debug/omap2plus.S
> +++ b/arch/arm/include/debug/omap2plus.S
> @@ -58,11 +58,22 @@
> 
> #define UART_OFFSET(addr)((addr) & 0x00ff)
> 
> +/*
> + * Definition of ZIMAGE is in arch/arm/boot/compressed/Makefile.
> + * Place the following block in .text section only when this file is
> + * included by arch/arm/boot/compressed/* to make it possible to
> + * enable CONFIG_DEBUG_UNCOMPRESS and DEBUG in 
> arch/arm/boot/compressed/head.S
> + * on OMAP2+ SoCs.
> + */
> +#ifndef ZIMAGE
>.pushsection .data
> +#endif
> omap_uart_phys:.word0
> omap_uart_virt:.word0
> omap_uart_lsr:.word0
> +#ifndef ZIMAGE
>.popsection
> +#endif
> 
>.macroaddruart, rp, rv, tmp
> 
> -- 
> 2.7.4
> 

Re: [PATCH] arm:lpae: build TTB control register value from scratch in v7_ttb_setup

[Hoeun Ryu]

Hello, Russell and Robin.

Would you please review this patch ?

Than you

> On Jun 7, 2017, at 11:39 AM, Hoeun Ryu  wrote:
> 
> Reading TTBCR in early boot stage might return the value of the previous
> kernel's configuration, especially in case of kexec. For example, if
> normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <=
> PAGE_OFFSET and crash kernel (second kernel) is running on a configuration
> PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the
> reserved area for crash kernel, reading TTBCR and using the value to OR
> other bit fields might be risky because it doesn't have a reset value for
> TTBCR.
> 
> Suggested-by: Robin Murphy 
> Signed-off-by: Hoeun Ryu 
> ---
> 
> * v1: amended based on
>  - "[PATCHv2] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when
> PHYS_OFFSET > PAGE_OFFSET"
>  - https://lkml.org/lkml/2017/6/5/239
> 
> arch/arm/mm/proc-v7-3level.S | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
> index 5e5720e..7d16bbc 100644
> --- a/arch/arm/mm/proc-v7-3level.S
> +++ b/arch/arm/mm/proc-v7-3level.S
> @@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext)
>.macrov7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
>ldr\tmp, =swapper_pg_dir@ swapper_pg_dir virtual address
>cmp\ttbr1, \tmp, lsr #12@ PHYS_OFFSET > PAGE_OFFSET?
> -mrcp15, 0, \tmp, c2, c0, 2@ TTB control egister
> -orr\tmp, \tmp, #TTB_EAE
> +mov\tmp, #TTB_EAE@ for TTB control egister
>ALT_SMP(orr\tmp, \tmp, #TTB_FLAGS_SMP)
>ALT_UP(orr\tmp, \tmp, #TTB_FLAGS_UP)
>ALT_SMP(orr\tmp, \tmp, #TTB_FLAGS_SMP << 16)
> -- 
> 2.7.4
> 

Re: [PATCH v4 1/4] of: remove *phandle properties from expanded device tree

[Frank Rowand]

On 06/09/17 19:35, Frank Rowand wrote:
> On 05/15/17 15:23, Rob Herring wrote:
>> On Mon, May 1, 2017 at 9:46 PM,   wrote:
>>> From: Frank Rowand 
>>>
>>> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
>>> the internal device tree.  The phandle will still be in the struct
>>> device_node phandle field.
>>>
>>> This is to resolve the issue found by Stephen Boyd [1] when he changed
>>> the type of struct property.value from void * to const void *.  As
>>> a result of the type change, the overlay code had compile errors
>>> where the resolver updates phandle values.
>>>
>>>   [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html
>>>
>>> - Add sysfs infrastructure to report np->phandle, as if it was a property.
>>> - Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
>>>   in the expanded device tree.
>>> - Remove phandle properties in of_attach_node(), for nodes dynamically
>>>   attached to the live tree.  Add the phandle sysfs entry for these nodes.
>>> - When creating an overlay changeset, duplicate the node phandle in
>>>   __of_node_dup().
>>> - Remove no longer needed checks to exclude "phandle" and "linux,phandle"
>>>   properties in several locations.
>>> - A side effect of these changes is that the obsolete "linux,phandle" and
>>>   "ibm,phandle" properties will no longer appear in /proc/device-tree (they
>>>   will appear as "phandle").
>>>
>>> Signed-off-by: Frank Rowand 
>>> ---
>>>  drivers/of/base.c   | 48 ---
>>>  drivers/of/dynamic.c| 54 
>>> +
>>>  drivers/of/fdt.c| 40 +---
>>>  drivers/of/of_private.h |  1 +
>>>  drivers/of/overlay.c|  4 +---
>>>  drivers/of/resolver.c   | 23 +
>>>  include/linux/of.h  |  1 +
>>>  7 files changed, 114 insertions(+), 57 deletions(-)
>>>
>>> diff --git a/drivers/of/base.c b/drivers/of/base.c
>>> index d7c4629a3a2d..8a0cf9003cf8 100644
>>> --- a/drivers/of/base.c
>>> +++ b/drivers/of/base.c
>>> @@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file 
>>> *filp, struct kobject *kobj,
>>> return memory_read_from_buffer(buf, count, , pp->value, 
>>> pp->length);
>>>  }
>>>
>>> +static ssize_t of_node_phandle_read(struct file *filp, struct kobject 
>>> *kobj,
>>> +   struct bin_attribute *bin_attr, char *buf,
>>> +   loff_t offset, size_t count)
>>> +{
>>> +   phandle phandle;
>>> +   struct device_node *np;
>>> +
>>> +   np = container_of(bin_attr, struct device_node, attr_phandle);
>>> +   phandle = cpu_to_be32(np->phandle);
>>> +   return memory_read_from_buffer(buf, count, , ,
>>> +  sizeof(phandle));
>>> +}
>>> +
>>>  /* always return newly allocated name, caller must free after use */
>>>  static const char *safe_name(struct kobject *kobj, const char *orig_name)
>>>  {
>>> @@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, 
>>> struct property *pp)
>>> return rc;
>>>  }
>>>
>>> +/*
>>> + * In the imported device tree (fdt), phandle is a property.  In the
>>> + * internal data structure it is instead stored in the struct device_node.
>>> + * Make phandle visible in sysfs as if it was a property.
>>> + */
>>> +int __of_add_phandle_sysfs(struct device_node *np)
>>> +{
>>> +   int rc;
>>> +
>>> +   if (!IS_ENABLED(CONFIG_SYSFS))
>>> +   return 0;
>>> +
>>> +   if (!of_kset || !of_node_is_attached(np))
>>> +   return 0;
>>> +
>>> +   if (!np->phandle || np->phandle == 0x)
>>> +   return 0;
>>> +
>>> +   sysfs_bin_attr_init(>attr_phandle);
>>> +   np->attr_phandle.attr.name = "phandle";
>>> +   np->attr_phandle.attr.mode = 0444;
>>> +   np->attr_phandle.size = sizeof(np->phandle);
>>> +   np->attr_phandle.read = of_node_phandle_read;
>>> +
>>> +   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
>>> +   WARN(rc, "error adding attribute phandle to node %s\n", 
>>> np->full_name);
>>> +   return rc;
>>> +}
>>> +
>>>  int __of_attach_node_sysfs(struct device_node *np)
>>>  {
>>> const char *name;
>>> @@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
>>> if (rc)
>>> return rc;
>>>
>>> +   __of_add_phandle_sysfs(np);
>>> +
>>> for_each_property_of_node(np, pp)
>>> __of_add_property_sysfs(np, pp);
>>>
>>> @@ -2097,9 +2141,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
>>> align))
>>> int id, len;
>>>
>>> /* Skip those we do not want to proceed */
>>> -   if (!strcmp(pp->name, "name") ||
>>> -   !strcmp(pp->name, "phandle") ||
>>> -   !strcmp(pp->name, "linux,phandle"))
>>> 

Re: [PATCH v4 1/4] of: remove *phandle properties from expanded device tree

[Frank Rowand]

On 06/09/17 19:35, Frank Rowand wrote:
> On 05/15/17 15:23, Rob Herring wrote:
>> On Mon, May 1, 2017 at 9:46 PM,   wrote:
>>> From: Frank Rowand 
>>>
>>> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
>>> the internal device tree.  The phandle will still be in the struct
>>> device_node phandle field.
>>>
>>> This is to resolve the issue found by Stephen Boyd [1] when he changed
>>> the type of struct property.value from void * to const void *.  As
>>> a result of the type change, the overlay code had compile errors
>>> where the resolver updates phandle values.
>>>
>>>   [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html
>>>
>>> - Add sysfs infrastructure to report np->phandle, as if it was a property.
>>> - Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
>>>   in the expanded device tree.
>>> - Remove phandle properties in of_attach_node(), for nodes dynamically
>>>   attached to the live tree.  Add the phandle sysfs entry for these nodes.
>>> - When creating an overlay changeset, duplicate the node phandle in
>>>   __of_node_dup().
>>> - Remove no longer needed checks to exclude "phandle" and "linux,phandle"
>>>   properties in several locations.
>>> - A side effect of these changes is that the obsolete "linux,phandle" and
>>>   "ibm,phandle" properties will no longer appear in /proc/device-tree (they
>>>   will appear as "phandle").
>>>
>>> Signed-off-by: Frank Rowand 
>>> ---
>>>  drivers/of/base.c   | 48 ---
>>>  drivers/of/dynamic.c| 54 
>>> +
>>>  drivers/of/fdt.c| 40 +---
>>>  drivers/of/of_private.h |  1 +
>>>  drivers/of/overlay.c|  4 +---
>>>  drivers/of/resolver.c   | 23 +
>>>  include/linux/of.h  |  1 +
>>>  7 files changed, 114 insertions(+), 57 deletions(-)
>>>
>>> diff --git a/drivers/of/base.c b/drivers/of/base.c
>>> index d7c4629a3a2d..8a0cf9003cf8 100644
>>> --- a/drivers/of/base.c
>>> +++ b/drivers/of/base.c
>>> @@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file 
>>> *filp, struct kobject *kobj,
>>> return memory_read_from_buffer(buf, count, , pp->value, 
>>> pp->length);
>>>  }
>>>
>>> +static ssize_t of_node_phandle_read(struct file *filp, struct kobject 
>>> *kobj,
>>> +   struct bin_attribute *bin_attr, char *buf,
>>> +   loff_t offset, size_t count)
>>> +{
>>> +   phandle phandle;
>>> +   struct device_node *np;
>>> +
>>> +   np = container_of(bin_attr, struct device_node, attr_phandle);
>>> +   phandle = cpu_to_be32(np->phandle);
>>> +   return memory_read_from_buffer(buf, count, , ,
>>> +  sizeof(phandle));
>>> +}
>>> +
>>>  /* always return newly allocated name, caller must free after use */
>>>  static const char *safe_name(struct kobject *kobj, const char *orig_name)
>>>  {
>>> @@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, 
>>> struct property *pp)
>>> return rc;
>>>  }
>>>
>>> +/*
>>> + * In the imported device tree (fdt), phandle is a property.  In the
>>> + * internal data structure it is instead stored in the struct device_node.
>>> + * Make phandle visible in sysfs as if it was a property.
>>> + */
>>> +int __of_add_phandle_sysfs(struct device_node *np)
>>> +{
>>> +   int rc;
>>> +
>>> +   if (!IS_ENABLED(CONFIG_SYSFS))
>>> +   return 0;
>>> +
>>> +   if (!of_kset || !of_node_is_attached(np))
>>> +   return 0;
>>> +
>>> +   if (!np->phandle || np->phandle == 0x)
>>> +   return 0;
>>> +
>>> +   sysfs_bin_attr_init(>attr_phandle);
>>> +   np->attr_phandle.attr.name = "phandle";
>>> +   np->attr_phandle.attr.mode = 0444;
>>> +   np->attr_phandle.size = sizeof(np->phandle);
>>> +   np->attr_phandle.read = of_node_phandle_read;
>>> +
>>> +   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
>>> +   WARN(rc, "error adding attribute phandle to node %s\n", 
>>> np->full_name);
>>> +   return rc;
>>> +}
>>> +
>>>  int __of_attach_node_sysfs(struct device_node *np)
>>>  {
>>> const char *name;
>>> @@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
>>> if (rc)
>>> return rc;
>>>
>>> +   __of_add_phandle_sysfs(np);
>>> +
>>> for_each_property_of_node(np, pp)
>>> __of_add_property_sysfs(np, pp);
>>>
>>> @@ -2097,9 +2141,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
>>> align))
>>> int id, len;
>>>
>>> /* Skip those we do not want to proceed */
>>> -   if (!strcmp(pp->name, "name") ||
>>> -   !strcmp(pp->name, "phandle") ||
>>> -   !strcmp(pp->name, "linux,phandle"))
>>> +   if (!strcmp(pp->name, "name"))
>>> 

RE: [lkp-robot] [EDAC, sb_edac] e2f747b1f4: kmsg.EDAC_sbridge:Failed_to_register_device_with_error

[Zhuo, Qiuxu]

> From: Borislav Petkov [mailto:b...@alien8.de] 
>
> Xiaolong,
>
> can you please run Qiuxu's patch to verify it fixes your issue?


Hi Boris,
I manually verified the fix patch on the Broadwell-DE server on which the 
bug was found by Xiaolong: 
the sb_edac can be loaded successfully, and it identified which size and 
type of DIMMs were installed
in each slot correctly (see attached dmesg.sb_edac.on.Broadwell-DE.log).

Hi Xiaolong,
   Would you please also test the patch by your LKP method by which the issue 
was found last time.

Thanks!

BR
Qiuxu 





dmesg.sb_edac.on.Broadwell-DE.log
Description: dmesg.sb_edac.on.Broadwell-DE.log

RE: [lkp-robot] [EDAC, sb_edac] e2f747b1f4: kmsg.EDAC_sbridge:Failed_to_register_device_with_error

[Zhuo, Qiuxu]

> From: Borislav Petkov [mailto:b...@alien8.de] 
>
> Xiaolong,
>
> can you please run Qiuxu's patch to verify it fixes your issue?


Hi Boris,
I manually verified the fix patch on the Broadwell-DE server on which the 
bug was found by Xiaolong: 
the sb_edac can be loaded successfully, and it identified which size and 
type of DIMMs were installed
in each slot correctly (see attached dmesg.sb_edac.on.Broadwell-DE.log).

Hi Xiaolong,
   Would you please also test the patch by your LKP method by which the issue 
was found last time.

Thanks!

BR
Qiuxu 





dmesg.sb_edac.on.Broadwell-DE.log
Description: dmesg.sb_edac.on.Broadwell-DE.log

Re: [PATCH] usb: gadget: functions: add ftrace export over USB

[kbuild test robot]

Hi Felipe,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.12-rc4 next-20170609]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Felipe-Balbi/usb-gadget-functions-add-ftrace-export-over-USB/20170610-060059
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: alpha-allyesconfig (attached as .config)
compiler: alpha-linux-gnu-gcc (Debian 6.3.0-18) 6.3.0 20170516
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=alpha 

All error/warnings (new ones prefixed by >>):

>> drivers/usb/gadget/function/f-trace.c:25:22: error: field 'ftrace' has 
>> incomplete type
 struct trace_export ftrace;
 ^~
   In file included from include/linux/list.h:8:0,
from include/linux/kobject.h:20,
from include/linux/device.h:17,
from drivers/usb/gadget/function/f-trace.c:12:
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_write':
   include/linux/kernel.h:854:48: error: initialization from incompatible 
pointer type [-Werror=incompatible-pointer-types]
 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
   ^
>> drivers/usb/gadget/function/f-trace.c:38:29: note: in expansion of macro 
>> 'container_of'
#define ftrace_to_trace(f) (container_of((f), struct usb_ftrace, ftrace))
^~~~
>> drivers/usb/gadget/function/f-trace.c:174:30: note: in expansion of macro 
>> 'ftrace_to_trace'
 struct usb_ftrace  *trace = ftrace_to_trace(ftrace);
 ^~~
   include/linux/kernel.h:854:48: note: (near initialization for 'trace')
 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
   ^
>> drivers/usb/gadget/function/f-trace.c:38:29: note: in expansion of macro 
>> 'container_of'
#define ftrace_to_trace(f) (container_of((f), struct usb_ftrace, ftrace))
^~~~
>> drivers/usb/gadget/function/f-trace.c:174:30: note: in expansion of macro 
>> 'ftrace_to_trace'
 struct usb_ftrace  *trace = ftrace_to_trace(ftrace);
 ^~~
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_bind':
>> drivers/usb/gadget/function/f-trace.c:294:8: error: implicit declaration of 
>> function 'register_ftrace_export' [-Werror=implicit-function-declaration]
 ret = register_ftrace_export(>ftrace);
   ^~
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_unbind':
>> drivers/usb/gadget/function/f-trace.c:322:2: error: implicit declaration of 
>> function 'unregister_ftrace_export' [-Werror=implicit-function-declaration]
 unregister_ftrace_export(>ftrace);
 ^~~~
   cc1: some warnings being treated as errors

vim +/ftrace +25 drivers/usb/gadget/function/f-trace.c

 6   *
 7   * This program is free software; you can redistribute it and/or
 8   * modify it under the terms of the GNU General Public License v2 as
 9   * published by the Free Software Foundation.
10   */
11  
  > 12  #include 
13  #include 
14  #include 
15  #include 
16  #include 
17  #include 
18  #include 
19  #include 
20  #include 
21  #include 
22  #include 
23  
24  struct usb_ftrace {
  > 25  struct trace_export ftrace;
26  struct usb_function function;
27  struct work_struct queue_work;
28  spinlock_t lock;
29  
30  struct list_head list;
31  struct list_head pending;
32  struct list_head queued;
33  
34  struct usb_ep *in;
35  
36  u8 intf_id;
37  };
  > 38  #define ftrace_to_trace(f)  (container_of((f), struct usb_ftrace, 
ftrace))
39  #define work_to_trace(w)(container_of((w), struct usb_ftrace, 
queue_work))
40  #define to_trace(f) (container_of((f), struct usb_ftrace, 
function))
41  
42  #define FTRACE_REQUEST_QUEUE_LENGTH 250
43  
44  static inline struct usb_request *next_request(struct list_head *list)
45  {
46  return list_first_entry_or_null(list, struct usb_request, list);
47  }
48  
49  struct usb_ftrace_opts {
50  struct usb_function_instance func_inst;
51  };
52  #define to_opts(fi) (container_of((fi), struct usb_ftrace_opts, 
func_inst))
53  
54  static struct usb_interface_descriptor ftrace_

Re: [PATCH] usb: gadget: functions: add ftrace export over USB

[kbuild test robot]

Hi Felipe,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.12-rc4 next-20170609]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Felipe-Balbi/usb-gadget-functions-add-ftrace-export-over-USB/20170610-060059
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: alpha-allyesconfig (attached as .config)
compiler: alpha-linux-gnu-gcc (Debian 6.3.0-18) 6.3.0 20170516
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=alpha 

All error/warnings (new ones prefixed by >>):

>> drivers/usb/gadget/function/f-trace.c:25:22: error: field 'ftrace' has 
>> incomplete type
 struct trace_export ftrace;
 ^~
   In file included from include/linux/list.h:8:0,
from include/linux/kobject.h:20,
from include/linux/device.h:17,
from drivers/usb/gadget/function/f-trace.c:12:
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_write':
   include/linux/kernel.h:854:48: error: initialization from incompatible 
pointer type [-Werror=incompatible-pointer-types]
 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
   ^
>> drivers/usb/gadget/function/f-trace.c:38:29: note: in expansion of macro 
>> 'container_of'
#define ftrace_to_trace(f) (container_of((f), struct usb_ftrace, ftrace))
^~~~
>> drivers/usb/gadget/function/f-trace.c:174:30: note: in expansion of macro 
>> 'ftrace_to_trace'
 struct usb_ftrace  *trace = ftrace_to_trace(ftrace);
 ^~~
   include/linux/kernel.h:854:48: note: (near initialization for 'trace')
 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
   ^
>> drivers/usb/gadget/function/f-trace.c:38:29: note: in expansion of macro 
>> 'container_of'
#define ftrace_to_trace(f) (container_of((f), struct usb_ftrace, ftrace))
^~~~
>> drivers/usb/gadget/function/f-trace.c:174:30: note: in expansion of macro 
>> 'ftrace_to_trace'
 struct usb_ftrace  *trace = ftrace_to_trace(ftrace);
 ^~~
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_bind':
>> drivers/usb/gadget/function/f-trace.c:294:8: error: implicit declaration of 
>> function 'register_ftrace_export' [-Werror=implicit-function-declaration]
 ret = register_ftrace_export(>ftrace);
   ^~
   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_unbind':
>> drivers/usb/gadget/function/f-trace.c:322:2: error: implicit declaration of 
>> function 'unregister_ftrace_export' [-Werror=implicit-function-declaration]
 unregister_ftrace_export(>ftrace);
 ^~~~
   cc1: some warnings being treated as errors

vim +/ftrace +25 drivers/usb/gadget/function/f-trace.c

 6   *
 7   * This program is free software; you can redistribute it and/or
 8   * modify it under the terms of the GNU General Public License v2 as
 9   * published by the Free Software Foundation.
10   */
11  
  > 12  #include 
13  #include 
14  #include 
15  #include 
16  #include 
17  #include 
18  #include 
19  #include 
20  #include 
21  #include 
22  #include 
23  
24  struct usb_ftrace {
  > 25  struct trace_export ftrace;
26  struct usb_function function;
27  struct work_struct queue_work;
28  spinlock_t lock;
29  
30  struct list_head list;
31  struct list_head pending;
32  struct list_head queued;
33  
34  struct usb_ep *in;
35  
36  u8 intf_id;
37  };
  > 38  #define ftrace_to_trace(f)  (container_of((f), struct usb_ftrace, 
ftrace))
39  #define work_to_trace(w)(container_of((w), struct usb_ftrace, 
queue_work))
40  #define to_trace(f) (container_of((f), struct usb_ftrace, 
function))
41  
42  #define FTRACE_REQUEST_QUEUE_LENGTH 250
43  
44  static inline struct usb_request *next_request(struct list_head *list)
45  {
46  return list_first_entry_or_null(list, struct usb_request, list);
47  }
48  
49  struct usb_ftrace_opts {
50  struct usb_function_instance func_inst;
51  };
52  #define to_opts(fi) (container_of((fi), struct usb_ftrace_opts, 
func_inst))
53  
54  static struct usb_interface_descriptor ftrace_

Re: [PATCH 03/10] fpga: allow to compile-test Altera FPGA bridge drivers

[Alan Tull]

On Fri, Jun 9, 2017 at 8:44 AM, Tobias Klauser  wrote:
> On 2017-06-09 at 11:49:02 +0200, Greg Kroah-Hartman 
>  wrote:
>> On Mon, Jun 05, 2017 at 02:07:34PM -0500, Alan Tull wrote:
>> > From: Tobias Klauser 
>> >
>> > Add COMPILE_TEST to the Kconfig entry for the Altera SoCFPGA FPGA
>> > Bridge. The Altera FPGA Freeze Bridge can also be used on Altera PEIe
>> > FPGAs, so the driver shouldn't depend on ARCH_SOCFPGA in the first place.
>> > This allows test-compiling the drivers on other architectures to catch
>> > compiler errors/warnings, e.g. due to API/header changes earlier on.
>> >
>> > Signed-off-by: Tobias Klauser 
>> > Signed-off-by: Alan Tull 
>> > ---
>> >  drivers/fpga/Kconfig | 4 ++--
>> >  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> I'll drop this patch from the series, as kbuild reports errors with it
>> :(
>
> These are warnings from the m32r cross compiler, not errors. They are
> due to the way readl() is defined on m32r (returning unsigned long
> instead of u32, as all other architectures do, see [1]). On all other
> architectures the patch doesn't cause any issues. There are also other
> cases which are already in mainline where this issue appers, so I'd say
> this patch rather uncovers the symptom of a problem rather than causing
> it ;)
>
> [1] https://marc.info/?l=linux-kernel=149252925326414

Yes the issue is the way m32r defines readl().  Tobias has pointed out
[2] other kernel patches cause the same warning.  There is a trivial
suggested workaround in [1] above (declare a local u32 to take the
readl() value).  Doing that would be effort to mask a known issue that
lies in the m32r code though.

Alan

[2] https://marc.info/?l=linux-kernel=149260369012554=2

Re: [PATCH 03/10] fpga: allow to compile-test Altera FPGA bridge drivers

[Alan Tull]

On Fri, Jun 9, 2017 at 8:44 AM, Tobias Klauser  wrote:
> On 2017-06-09 at 11:49:02 +0200, Greg Kroah-Hartman 
>  wrote:
>> On Mon, Jun 05, 2017 at 02:07:34PM -0500, Alan Tull wrote:
>> > From: Tobias Klauser 
>> >
>> > Add COMPILE_TEST to the Kconfig entry for the Altera SoCFPGA FPGA
>> > Bridge. The Altera FPGA Freeze Bridge can also be used on Altera PEIe
>> > FPGAs, so the driver shouldn't depend on ARCH_SOCFPGA in the first place.
>> > This allows test-compiling the drivers on other architectures to catch
>> > compiler errors/warnings, e.g. due to API/header changes earlier on.
>> >
>> > Signed-off-by: Tobias Klauser 
>> > Signed-off-by: Alan Tull 
>> > ---
>> >  drivers/fpga/Kconfig | 4 ++--
>> >  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> I'll drop this patch from the series, as kbuild reports errors with it
>> :(
>
> These are warnings from the m32r cross compiler, not errors. They are
> due to the way readl() is defined on m32r (returning unsigned long
> instead of u32, as all other architectures do, see [1]). On all other
> architectures the patch doesn't cause any issues. There are also other
> cases which are already in mainline where this issue appers, so I'd say
> this patch rather uncovers the symptom of a problem rather than causing
> it ;)
>
> [1] https://marc.info/?l=linux-kernel=149252925326414

Yes the issue is the way m32r defines readl().  Tobias has pointed out
[2] other kernel patches cause the same warning.  There is a trivial
suggested workaround in [1] above (declare a local u32 to take the
readl() value).  Doing that would be effort to mask a known issue that
lies in the m32r code though.

Alan

[2] https://marc.info/?l=linux-kernel=149260369012554=2

[PATCH net-next 4/9] net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support

[Salil Mehta]

This patch adds the support of Hisilicon Network Subsystem Accceleration
Engine and common operations to access it. This layer provides access to the
hardware configuration, hardware statistics. This layer is also
responsible for triggering the initialization of the PHY layer through
the below MDIO layer.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4257 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h|  493 +++
 2 files changed, 4750 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
new file mode 100644
index 000..6771990
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -0,0 +1,4257 @@
+/*
+ * Copyright (c) 2016-2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hclge_tm.h"
+#include "hnae3.h"
+
+#define HCLGE_NAME "hclge"
+#define HCLGE_STATS_READ(p, offset) (*((u64 *)((u8 *)(p) + (offset
+#define HCLGE_MAC_STATS_FIELD_OFF(f) (offsetof(struct hclge_mac_stats, f))
+#define HCLGE_64BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_64_bit_stats, f))
+#define HCLGE_32BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_32_bit_stats, f))
+
+static int hclge_rss_init_hw(struct hclge_dev *hdev);
+static int hclge_set_mta_filter_mode(struct hclge_dev *hdev,
+enum hclge_mta_dmac_sel_type mta_mac_sel,
+bool enable);
+static int hclge_init_vlan_config(struct hclge_dev *hdev);
+
+struct hnae3_ae_algo ae_algo;
+
+static const struct pci_device_id ae_algo_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* Required last entry */
+   {0, }
+};
+
+static const struct pci_device_id roce_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* Required last entry */
+   {0, }
+};
+
+static const char hns3_nic_test_strs[][ETH_GSTRING_LEN] = {
+   "MacLoopback test",
+   "Serdes Loopback test",
+   "PhyLoopback test"
+};
+
+static const struct hclge_comm_stats_str g_all_64bit_stats_string[] = {
+   {"igu_rx_oversize_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_oversize_pkt)},
+   {"igu_rx_undersize_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_undersize_pkt)},
+   {"igu_rx_out_all_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_out_all_pkt)},
+   {"igu_rx_uni_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_uni_pkt)},
+   {"igu_rx_multi_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_multi_pkt)},
+   {"igu_rx_broad_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_broad_pkt)},
+   {"egu_tx_out_all_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_out_all_pkt)},
+   {"egu_tx_uni_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_uni_pkt)},
+   {"egu_tx_multi_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_multi_pkt)},
+   {"egu_tx_broad_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_broad_pkt)},
+   {"ssu_ppp_mac_key_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ssu_ppp_mac_key_num)},
+   {"ssu_ppp_host_key_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ssu_ppp_host_key_num)},
+   {"ppp_ssu_mac_rlt_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ppp_ssu_mac_rlt_num)},
+   {"ppp_ssu_host_rlt_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ppp_ssu_host_rlt_num)},
+   {"ssu_tx_in_num",
+   

[PATCH net-next 4/9] net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support

[Salil Mehta]

This patch adds the support of Hisilicon Network Subsystem Accceleration
Engine and common operations to access it. This layer provides access to the
hardware configuration, hardware statistics. This layer is also
responsible for triggering the initialization of the PHY layer through
the below MDIO layer.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4257 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h|  493 +++
 2 files changed, 4750 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
new file mode 100644
index 000..6771990
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -0,0 +1,4257 @@
+/*
+ * Copyright (c) 2016-2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hclge_tm.h"
+#include "hnae3.h"
+
+#define HCLGE_NAME "hclge"
+#define HCLGE_STATS_READ(p, offset) (*((u64 *)((u8 *)(p) + (offset
+#define HCLGE_MAC_STATS_FIELD_OFF(f) (offsetof(struct hclge_mac_stats, f))
+#define HCLGE_64BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_64_bit_stats, f))
+#define HCLGE_32BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_32_bit_stats, f))
+
+static int hclge_rss_init_hw(struct hclge_dev *hdev);
+static int hclge_set_mta_filter_mode(struct hclge_dev *hdev,
+enum hclge_mta_dmac_sel_type mta_mac_sel,
+bool enable);
+static int hclge_init_vlan_config(struct hclge_dev *hdev);
+
+struct hnae3_ae_algo ae_algo;
+
+static const struct pci_device_id ae_algo_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* Required last entry */
+   {0, }
+};
+
+static const struct pci_device_id roce_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* Required last entry */
+   {0, }
+};
+
+static const char hns3_nic_test_strs[][ETH_GSTRING_LEN] = {
+   "MacLoopback test",
+   "Serdes Loopback test",
+   "PhyLoopback test"
+};
+
+static const struct hclge_comm_stats_str g_all_64bit_stats_string[] = {
+   {"igu_rx_oversize_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_oversize_pkt)},
+   {"igu_rx_undersize_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_undersize_pkt)},
+   {"igu_rx_out_all_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_out_all_pkt)},
+   {"igu_rx_uni_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_uni_pkt)},
+   {"igu_rx_multi_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_multi_pkt)},
+   {"igu_rx_broad_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(igu_rx_broad_pkt)},
+   {"egu_tx_out_all_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_out_all_pkt)},
+   {"egu_tx_uni_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_uni_pkt)},
+   {"egu_tx_multi_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_multi_pkt)},
+   {"egu_tx_broad_pkt",
+   HCLGE_64BIT_STATS_FIELD_OFF(egu_tx_broad_pkt)},
+   {"ssu_ppp_mac_key_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ssu_ppp_mac_key_num)},
+   {"ssu_ppp_host_key_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ssu_ppp_host_key_num)},
+   {"ppp_ssu_mac_rlt_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ppp_ssu_mac_rlt_num)},
+   {"ppp_ssu_host_rlt_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ppp_ssu_host_rlt_num)},
+   {"ssu_tx_in_num",
+   HCLGE_64BIT_STATS_FIELD_OFF(ssu_tx_in_num)},
+   {"ssu_tx_out_num",
+   

[PATCH net-next 3/9] net: hns3: Add HNS3 IMP(Integrated Mgmt Proc) Cmd Interface Support

[Salil Mehta]

This patch adds the support of IMP (Integrated Management Processor)
command interface to the HNS3 driver.

Each PF/VF has support of CQP(Command Queue Pair) ring interface.
Each CQP consis of send queue CSQ and receive queue CRQ.
There are various commands a PF/VF may support, like for Flow Table
manipulation, Device management, Packet buffer allocation, Forwarding,
VLANs config, Tunneling/Overlays etc.

This patch contains code to initialize the command queue, manage the
command queue descriptors and Rx/Tx protocol with the command processor
in the form of various commands/results and acknowledgements.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 347 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 742 +
 2 files changed, 1089 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
new file mode 100644
index 000..ec20ec4
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "hclge_cmd.h"
+#include "hnae3.h"
+#include "hclge_main.h"
+
+#define hclge_is_csq(ring) ((ring)->flag & HCLGE_TYPE_CSQ)
+#define hclge_ring_to_dma_dir(ring) (hclge_is_csq(ring) ? \
+   DMA_TO_DEVICE : DMA_FROM_DEVICE)
+#define cmq_ring_to_dev(ring)   (&(ring)->dev->pdev->dev)
+
+static int hclge_ring_space(struct hclge_cmq_ring *ring)
+{
+   int ntu = ring->next_to_use;
+   int ntc = ring->next_to_clean;
+   int used = (ntu - ntc + ring->desc_num) % ring->desc_num;
+
+   return ring->desc_num - used - 1;
+}
+
+static int hclge_alloc_cmd_desc(struct hclge_cmq_ring *ring)
+{
+   int size  = ring->desc_num * sizeof(struct hclge_desc);
+
+   ring->desc = kzalloc(size, GFP_KERNEL);
+   if (!ring->desc)
+   return -ENOMEM;
+
+   ring->desc_dma_addr = dma_map_single(cmq_ring_to_dev(ring), ring->desc,
+size, DMA_BIDIRECTIONAL);
+   if (dma_mapping_error(cmq_ring_to_dev(ring), ring->desc_dma_addr)) {
+   ring->desc_dma_addr = 0;
+   kfree(ring->desc);
+   ring->desc = NULL;
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
+static void hclge_free_cmd_desc(struct hclge_cmq_ring *ring)
+{
+   dma_unmap_single(cmq_ring_to_dev(ring), ring->desc_dma_addr,
+ring->desc_num * sizeof(ring->desc[0]),
+DMA_BIDIRECTIONAL);
+
+   ring->desc_dma_addr = 0;
+   kfree(ring->desc);
+   ring->desc = NULL;
+}
+
+static int hclge_init_cmd_queue(struct hclge_dev *hdev, int ring_type)
+{
+   struct hclge_hw *hw = >hw;
+   struct hclge_cmq_ring *ring =
+   (ring_type == HCLGE_TYPE_CSQ) ? >cmq.csq : >cmq.crq;
+   int ret;
+
+   ring->flag = ring_type;
+   ring->dev = hdev;
+
+   ret = hclge_alloc_cmd_desc(ring);
+   if (ret) {
+   dev_err(>pdev->dev, "descriptor %s alloc error %d\n",
+   (ring_type == HCLGE_TYPE_CSQ) ? "CSQ" : "CRQ", ret);
+   return ret;
+   }
+
+   ring->next_to_clean = 0;
+   ring->next_to_use = 0;
+
+   return 0;
+}
+
+void hclge_cmd_reuse_desc(struct hclge_desc *desc, bool is_read)
+{
+   desc->flag = cpu_to_le16(HCLGE_CMD_FLAG_NO_INTR | HCLGE_CMD_FLAG_IN);
+   if (is_read)
+   desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_WR);
+   else
+   desc->flag &= cpu_to_le16(~HCLGE_CMD_FLAG_WR);
+}
+
+void hclge_cmd_setup_basic_desc(struct hclge_desc *desc,
+   enum hclge_opcode_type opcode, bool is_read)
+{
+   memset((void *)desc, 0, sizeof(struct hclge_desc));
+   desc->opcode = cpu_to_le16(opcode);
+   desc->flag = cpu_to_le16(HCLGE_CMD_FLAG_NO_INTR | HCLGE_CMD_FLAG_IN);
+
+   if (is_read)
+   desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_WR);
+   else
+   desc->flag &= cpu_to_le16(~HCLGE_CMD_FLAG_WR);
+}
+
+static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring)
+{
+   dma_addr_t dma = ring->desc_dma_addr;
+   struct hclge_dev *hdev = ring->dev;
+   struct hclge_hw *hw = >hw;
+
+   if (ring->flag == 

[PATCH net-next 1/9] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC

[Salil Mehta]

This patch adds the support of Hisilicon Network Subsystem 3
Ethernet driver to hip08 family of SoCs.

This driver includes basic Rx/Tx functionality. It also includes
the client registration code with the HNAE3(Hisilicon Network
Acceleration Engine 3) framework.

This work provides the initial support to the hip08 SoC and
would incrementally add features or enhancements.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 2851 
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h |  585 
 2 files changed, 3436 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
new file mode 100644
index 000..d0e4f22
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
@@ -0,0 +1,2851 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hnae3.h"
+#include "hns3_enet.h"
+
+const char hns3_driver_name[] = "hns3";
+static const char hns3_driver_string[] =
+   "Hisilicon Ethernet Network Driver for Hi162x Family";
+static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
+
+/* hns3_pci_tbl - PCI Device ID Table
+ *
+ * Last entry must be all 0s
+ *
+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
+ *   Class, Class Mask, private data (not used) }
+ */
+static const struct pci_device_id hns3_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* required last entry */
+   {0, }
+};
+MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
+
+/* use only for netconsole to poll with the device without interrupt */
+#ifdef CONFIG_NET_POLL_CONTROLLER
+void hns3_nic_poll_controller(struct net_device *ndev)
+{
+   struct hns3_nic_priv *priv = netdev_priv(ndev);
+   struct hnae3_handle *h = priv->ae_handle;
+   unsigned long flag;
+   int i;
+
+   local_irq_save(flag);
+   for (i = 0; i < h->kinfo.num_tqp_vectors; i++)
+   napi_schedule(>kinfo.tqp_vectors[i].napi);
+   local_irq_restore(flag);
+}
+#endif
+
+static irqreturn_t hns3_irq_handle(int irq, void *dev)
+{
+   struct hns3_enet_tqp_vector *tqp_vector = dev;
+
+   napi_schedule(_vector->napi);
+
+   return IRQ_HANDLED;
+}
+
+static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
+{
+   struct pci_dev *pdev = priv->ae_handle->pdev;
+   struct hns3_enet_tqp_vector *tqp_vectors;
+   int txrx_int_idx = 0;
+   int rx_int_idx = 0;
+   int tx_int_idx = 0;
+   int ret;
+   int i;
+
+   for (i = 0; i < priv->vector_num; i++) {
+   tqp_vectors = >tqp_vector[i];
+
+   if (tqp_vectors->irq_init_flag == HNS3_VEVTOR_INITED)
+   continue;
+
+   if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "TxRx",
+txrx_int_idx++);
+   txrx_int_idx++;
+   } else if (tqp_vectors->rx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "Rx",
+rx_int_idx++);
+   } else if (tqp_vectors->tx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "Tx",
+tx_int_idx++);
+   } else {
+   /* Skip this unused q_vector */
+   continue;
+   }
+
+   tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
+
+   ret = devm_request_irq(>dev, tqp_vectors->vector_irq,
+  

[PATCH net-next 3/9] net: hns3: Add HNS3 IMP(Integrated Mgmt Proc) Cmd Interface Support

[Salil Mehta]

This patch adds the support of IMP (Integrated Management Processor)
command interface to the HNS3 driver.

Each PF/VF has support of CQP(Command Queue Pair) ring interface.
Each CQP consis of send queue CSQ and receive queue CRQ.
There are various commands a PF/VF may support, like for Flow Table
manipulation, Device management, Packet buffer allocation, Forwarding,
VLANs config, Tunneling/Overlays etc.

This patch contains code to initialize the command queue, manage the
command queue descriptors and Rx/Tx protocol with the command processor
in the form of various commands/results and acknowledgements.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 347 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 742 +
 2 files changed, 1089 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
new file mode 100644
index 000..ec20ec4
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "hclge_cmd.h"
+#include "hnae3.h"
+#include "hclge_main.h"
+
+#define hclge_is_csq(ring) ((ring)->flag & HCLGE_TYPE_CSQ)
+#define hclge_ring_to_dma_dir(ring) (hclge_is_csq(ring) ? \
+   DMA_TO_DEVICE : DMA_FROM_DEVICE)
+#define cmq_ring_to_dev(ring)   (&(ring)->dev->pdev->dev)
+
+static int hclge_ring_space(struct hclge_cmq_ring *ring)
+{
+   int ntu = ring->next_to_use;
+   int ntc = ring->next_to_clean;
+   int used = (ntu - ntc + ring->desc_num) % ring->desc_num;
+
+   return ring->desc_num - used - 1;
+}
+
+static int hclge_alloc_cmd_desc(struct hclge_cmq_ring *ring)
+{
+   int size  = ring->desc_num * sizeof(struct hclge_desc);
+
+   ring->desc = kzalloc(size, GFP_KERNEL);
+   if (!ring->desc)
+   return -ENOMEM;
+
+   ring->desc_dma_addr = dma_map_single(cmq_ring_to_dev(ring), ring->desc,
+size, DMA_BIDIRECTIONAL);
+   if (dma_mapping_error(cmq_ring_to_dev(ring), ring->desc_dma_addr)) {
+   ring->desc_dma_addr = 0;
+   kfree(ring->desc);
+   ring->desc = NULL;
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
+static void hclge_free_cmd_desc(struct hclge_cmq_ring *ring)
+{
+   dma_unmap_single(cmq_ring_to_dev(ring), ring->desc_dma_addr,
+ring->desc_num * sizeof(ring->desc[0]),
+DMA_BIDIRECTIONAL);
+
+   ring->desc_dma_addr = 0;
+   kfree(ring->desc);
+   ring->desc = NULL;
+}
+
+static int hclge_init_cmd_queue(struct hclge_dev *hdev, int ring_type)
+{
+   struct hclge_hw *hw = >hw;
+   struct hclge_cmq_ring *ring =
+   (ring_type == HCLGE_TYPE_CSQ) ? >cmq.csq : >cmq.crq;
+   int ret;
+
+   ring->flag = ring_type;
+   ring->dev = hdev;
+
+   ret = hclge_alloc_cmd_desc(ring);
+   if (ret) {
+   dev_err(>pdev->dev, "descriptor %s alloc error %d\n",
+   (ring_type == HCLGE_TYPE_CSQ) ? "CSQ" : "CRQ", ret);
+   return ret;
+   }
+
+   ring->next_to_clean = 0;
+   ring->next_to_use = 0;
+
+   return 0;
+}
+
+void hclge_cmd_reuse_desc(struct hclge_desc *desc, bool is_read)
+{
+   desc->flag = cpu_to_le16(HCLGE_CMD_FLAG_NO_INTR | HCLGE_CMD_FLAG_IN);
+   if (is_read)
+   desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_WR);
+   else
+   desc->flag &= cpu_to_le16(~HCLGE_CMD_FLAG_WR);
+}
+
+void hclge_cmd_setup_basic_desc(struct hclge_desc *desc,
+   enum hclge_opcode_type opcode, bool is_read)
+{
+   memset((void *)desc, 0, sizeof(struct hclge_desc));
+   desc->opcode = cpu_to_le16(opcode);
+   desc->flag = cpu_to_le16(HCLGE_CMD_FLAG_NO_INTR | HCLGE_CMD_FLAG_IN);
+
+   if (is_read)
+   desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_WR);
+   else
+   desc->flag &= cpu_to_le16(~HCLGE_CMD_FLAG_WR);
+}
+
+static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring)
+{
+   dma_addr_t dma = ring->desc_dma_addr;
+   struct hclge_dev *hdev = ring->dev;
+   struct hclge_hw *hw = >hw;
+
+   if (ring->flag == HCLGE_TYPE_CSQ) {
+   hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_L_REG,
+   

[PATCH net-next 1/9] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC

[Salil Mehta]

This patch adds the support of Hisilicon Network Subsystem 3
Ethernet driver to hip08 family of SoCs.

This driver includes basic Rx/Tx functionality. It also includes
the client registration code with the HNAE3(Hisilicon Network
Acceleration Engine 3) framework.

This work provides the initial support to the hip08 SoC and
would incrementally add features or enhancements.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 2851 
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h |  585 
 2 files changed, 3436 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
new file mode 100644
index 000..d0e4f22
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
@@ -0,0 +1,2851 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "hnae3.h"
+#include "hns3_enet.h"
+
+const char hns3_driver_name[] = "hns3";
+static const char hns3_driver_string[] =
+   "Hisilicon Ethernet Network Driver for Hi162x Family";
+static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
+
+/* hns3_pci_tbl - PCI Device ID Table
+ *
+ * Last entry must be all 0s
+ *
+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
+ *   Class, Class Mask, private data (not used) }
+ */
+static const struct pci_device_id hns3_pci_tbl[] = {
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
+   {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
+   /* required last entry */
+   {0, }
+};
+MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
+
+/* use only for netconsole to poll with the device without interrupt */
+#ifdef CONFIG_NET_POLL_CONTROLLER
+void hns3_nic_poll_controller(struct net_device *ndev)
+{
+   struct hns3_nic_priv *priv = netdev_priv(ndev);
+   struct hnae3_handle *h = priv->ae_handle;
+   unsigned long flag;
+   int i;
+
+   local_irq_save(flag);
+   for (i = 0; i < h->kinfo.num_tqp_vectors; i++)
+   napi_schedule(>kinfo.tqp_vectors[i].napi);
+   local_irq_restore(flag);
+}
+#endif
+
+static irqreturn_t hns3_irq_handle(int irq, void *dev)
+{
+   struct hns3_enet_tqp_vector *tqp_vector = dev;
+
+   napi_schedule(_vector->napi);
+
+   return IRQ_HANDLED;
+}
+
+static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
+{
+   struct pci_dev *pdev = priv->ae_handle->pdev;
+   struct hns3_enet_tqp_vector *tqp_vectors;
+   int txrx_int_idx = 0;
+   int rx_int_idx = 0;
+   int tx_int_idx = 0;
+   int ret;
+   int i;
+
+   for (i = 0; i < priv->vector_num; i++) {
+   tqp_vectors = >tqp_vector[i];
+
+   if (tqp_vectors->irq_init_flag == HNS3_VEVTOR_INITED)
+   continue;
+
+   if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "TxRx",
+txrx_int_idx++);
+   txrx_int_idx++;
+   } else if (tqp_vectors->rx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "Rx",
+rx_int_idx++);
+   } else if (tqp_vectors->tx_group.ring) {
+   snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
+"%s-%s-%d", priv->netdev->name, "Tx",
+tx_int_idx++);
+   } else {
+   /* Skip this unused q_vector */
+   continue;
+   }
+
+   tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
+
+   ret = devm_request_irq(>dev, tqp_vectors->vector_irq,
+  hns3_irq_handle, 0, tqp_vectors->name,
+  tqp_vectors);
+   

[PATCH net-next 7/9] net: hns3: Add Ethtool support to HNS3 driver

[Salil Mehta]

This patch adds the support of the Ethtool interface to
the HNS3 Ethernet driver. Various commands to read the
statistics, configure the offloading, loopback selftest etc.
are supported.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c  | 894 +
 1 file changed, 894 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c
new file mode 100644
index 000..83fde08
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c
@@ -0,0 +1,894 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include "hns3_enet.h"
+
+struct hns3_stats {
+   char stats_string[ETH_GSTRING_LEN];
+   int stats_size;
+   int stats_offset;
+};
+
+/* netdev related stats */
+#define HNS3_NETDEV_STAT(_string, _member) \
+   { _string,  \
+ FIELD_SIZEOF(struct rtnl_link_stats64, _member),  \
+ offsetof(struct rtnl_link_stats64, _member),  \
+   }
+
+static const struct hns3_stats hns3_netdev_stats[] = {
+   /* misc. Rx/Tx statistics */
+   HNS3_NETDEV_STAT("rx_packets", rx_packets),
+   HNS3_NETDEV_STAT("tx_packets", tx_packets),
+   HNS3_NETDEV_STAT("rx_bytes", rx_bytes),
+   HNS3_NETDEV_STAT("tx_bytes", tx_bytes),
+   HNS3_NETDEV_STAT("rx_errors", rx_errors),
+   HNS3_NETDEV_STAT("tx_errors", tx_errors),
+   HNS3_NETDEV_STAT("rx_dropped", rx_dropped),
+   HNS3_NETDEV_STAT("tx_dropped", tx_dropped),
+   HNS3_NETDEV_STAT("multicast", multicast),
+   HNS3_NETDEV_STAT("collisions", collisions),
+
+   /* detailed Rx errors */
+   HNS3_NETDEV_STAT("rx_length_errors", rx_length_errors),
+   HNS3_NETDEV_STAT("rx_over_errors", rx_over_errors),
+   HNS3_NETDEV_STAT("rx_crc_errors", rx_crc_errors),
+   HNS3_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
+   HNS3_NETDEV_STAT("rx_fifo_errors", rx_fifo_errors),
+   HNS3_NETDEV_STAT("rx_missed_errors", rx_missed_errors),
+
+   /* detailed Tx errors */
+   HNS3_NETDEV_STAT("tx_aborted_errors", tx_aborted_errors),
+   HNS3_NETDEV_STAT("tx_carrier_errors", tx_carrier_errors),
+   HNS3_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
+   HNS3_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
+   HNS3_NETDEV_STAT("tx_window_errors", tx_window_errors),
+
+   /* for cslip etc */
+   HNS3_NETDEV_STAT("rx_compressed", rx_compressed),
+   HNS3_NETDEV_STAT("tx_compressed", tx_compressed),
+};
+
+#define HNS3_NETDEV_STATS_COUNT ARRAY_SIZE(hns3_netdev_stats)
+
+/* tqp related stats */
+#define HNS3_TQP_STAT(_string, _member)\
+   { _string,  \
+ FIELD_SIZEOF(struct ring_stats, _member), \
+ offsetof(struct hns3_enet_ring, stats),   \
+   }
+
+static const struct hns3_stats hns3_txq_stats[] = {
+   /* Tx per-queue statistics */
+   HNS3_TQP_STAT("tx_io_err_cnt", io_err_cnt),
+   HNS3_TQP_STAT("tx_sw_err_cnt", sw_err_cnt),
+   HNS3_TQP_STAT("tx_seg_pkt_cnt", seg_pkt_cnt),
+   HNS3_TQP_STAT("tx_pkts", tx_pkts),
+   HNS3_TQP_STAT("tx_bytes", tx_bytes),
+   HNS3_TQP_STAT("tx_err_cnt", tx_err_cnt),
+   HNS3_TQP_STAT("tx_restart_queue", restart_queue),
+   HNS3_TQP_STAT("tx_busy", tx_busy),
+};
+
+#define HNS3_TXQ_STATS_COUNT ARRAY_SIZE(hns3_txq_stats)
+
+static const struct hns3_stats hns3_rxq_stats[] = {
+   /* Rx per-queue statistics */
+   HNS3_TQP_STAT("rx_io_err_cnt", io_err_cnt),
+   HNS3_TQP_STAT("rx_sw_err_cnt", sw_err_cnt),
+   HNS3_TQP_STAT("rx_seg_pkt_cnt", seg_pkt_cnt),
+   HNS3_TQP_STAT("rx_pkts", rx_pkts),
+   HNS3_TQP_STAT("rx_bytes", rx_bytes),
+   HNS3_TQP_STAT("rx_err_cnt", rx_err_cnt),
+   HNS3_TQP_STAT("rx_reuse_pg_cnt", reuse_pg_cnt),
+   HNS3_TQP_STAT("rx_err_pkt_len", err_pkt_len),
+   HNS3_TQP_STAT("rx_non_vld_descs", non_vld_descs),
+   HNS3_TQP_STAT("rx_err_bd_num", err_bd_num),
+   HNS3_TQP_STAT("rx_l2_err", l2_err),
+   HNS3_TQP_STAT("rx_l3l4_csum_err", l3l4_csum_err),
+};
+
+#define HNS3_RXQ_STATS_COUNT ARRAY_SIZE(hns3_rxq_stats)
+
+#define HNS3_TQP_STATS_COUNT (HNS3_TXQ_STATS_COUNT + HNS3_RXQ_STATS_COUNT)
+
+struct hns3_link_mode_mapping {
+   u32 hns3_link_mode;
+   

[PATCH net-next 7/9] net: hns3: Add Ethtool support to HNS3 driver

[Salil Mehta]

This patch adds the support of the Ethtool interface to
the HNS3 Ethernet driver. Various commands to read the
statistics, configure the offloading, loopback selftest etc.
are supported.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c  | 894 +
 1 file changed, 894 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c
new file mode 100644
index 000..83fde08
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c
@@ -0,0 +1,894 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include "hns3_enet.h"
+
+struct hns3_stats {
+   char stats_string[ETH_GSTRING_LEN];
+   int stats_size;
+   int stats_offset;
+};
+
+/* netdev related stats */
+#define HNS3_NETDEV_STAT(_string, _member) \
+   { _string,  \
+ FIELD_SIZEOF(struct rtnl_link_stats64, _member),  \
+ offsetof(struct rtnl_link_stats64, _member),  \
+   }
+
+static const struct hns3_stats hns3_netdev_stats[] = {
+   /* misc. Rx/Tx statistics */
+   HNS3_NETDEV_STAT("rx_packets", rx_packets),
+   HNS3_NETDEV_STAT("tx_packets", tx_packets),
+   HNS3_NETDEV_STAT("rx_bytes", rx_bytes),
+   HNS3_NETDEV_STAT("tx_bytes", tx_bytes),
+   HNS3_NETDEV_STAT("rx_errors", rx_errors),
+   HNS3_NETDEV_STAT("tx_errors", tx_errors),
+   HNS3_NETDEV_STAT("rx_dropped", rx_dropped),
+   HNS3_NETDEV_STAT("tx_dropped", tx_dropped),
+   HNS3_NETDEV_STAT("multicast", multicast),
+   HNS3_NETDEV_STAT("collisions", collisions),
+
+   /* detailed Rx errors */
+   HNS3_NETDEV_STAT("rx_length_errors", rx_length_errors),
+   HNS3_NETDEV_STAT("rx_over_errors", rx_over_errors),
+   HNS3_NETDEV_STAT("rx_crc_errors", rx_crc_errors),
+   HNS3_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
+   HNS3_NETDEV_STAT("rx_fifo_errors", rx_fifo_errors),
+   HNS3_NETDEV_STAT("rx_missed_errors", rx_missed_errors),
+
+   /* detailed Tx errors */
+   HNS3_NETDEV_STAT("tx_aborted_errors", tx_aborted_errors),
+   HNS3_NETDEV_STAT("tx_carrier_errors", tx_carrier_errors),
+   HNS3_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
+   HNS3_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
+   HNS3_NETDEV_STAT("tx_window_errors", tx_window_errors),
+
+   /* for cslip etc */
+   HNS3_NETDEV_STAT("rx_compressed", rx_compressed),
+   HNS3_NETDEV_STAT("tx_compressed", tx_compressed),
+};
+
+#define HNS3_NETDEV_STATS_COUNT ARRAY_SIZE(hns3_netdev_stats)
+
+/* tqp related stats */
+#define HNS3_TQP_STAT(_string, _member)\
+   { _string,  \
+ FIELD_SIZEOF(struct ring_stats, _member), \
+ offsetof(struct hns3_enet_ring, stats),   \
+   }
+
+static const struct hns3_stats hns3_txq_stats[] = {
+   /* Tx per-queue statistics */
+   HNS3_TQP_STAT("tx_io_err_cnt", io_err_cnt),
+   HNS3_TQP_STAT("tx_sw_err_cnt", sw_err_cnt),
+   HNS3_TQP_STAT("tx_seg_pkt_cnt", seg_pkt_cnt),
+   HNS3_TQP_STAT("tx_pkts", tx_pkts),
+   HNS3_TQP_STAT("tx_bytes", tx_bytes),
+   HNS3_TQP_STAT("tx_err_cnt", tx_err_cnt),
+   HNS3_TQP_STAT("tx_restart_queue", restart_queue),
+   HNS3_TQP_STAT("tx_busy", tx_busy),
+};
+
+#define HNS3_TXQ_STATS_COUNT ARRAY_SIZE(hns3_txq_stats)
+
+static const struct hns3_stats hns3_rxq_stats[] = {
+   /* Rx per-queue statistics */
+   HNS3_TQP_STAT("rx_io_err_cnt", io_err_cnt),
+   HNS3_TQP_STAT("rx_sw_err_cnt", sw_err_cnt),
+   HNS3_TQP_STAT("rx_seg_pkt_cnt", seg_pkt_cnt),
+   HNS3_TQP_STAT("rx_pkts", rx_pkts),
+   HNS3_TQP_STAT("rx_bytes", rx_bytes),
+   HNS3_TQP_STAT("rx_err_cnt", rx_err_cnt),
+   HNS3_TQP_STAT("rx_reuse_pg_cnt", reuse_pg_cnt),
+   HNS3_TQP_STAT("rx_err_pkt_len", err_pkt_len),
+   HNS3_TQP_STAT("rx_non_vld_descs", non_vld_descs),
+   HNS3_TQP_STAT("rx_err_bd_num", err_bd_num),
+   HNS3_TQP_STAT("rx_l2_err", l2_err),
+   HNS3_TQP_STAT("rx_l3l4_csum_err", l3l4_csum_err),
+};
+
+#define HNS3_RXQ_STATS_COUNT ARRAY_SIZE(hns3_rxq_stats)
+
+#define HNS3_TQP_STATS_COUNT (HNS3_TXQ_STATS_COUNT + HNS3_RXQ_STATS_COUNT)
+
+struct hns3_link_mode_mapping {
+   u32 hns3_link_mode;
+   u32 ethtool_link_mode;
+};
+
+static const struct hns3_link_mode_mapping hns3_lm_map[] = {
+   

[PATCH net-next 8/9] net: hns3: Add support of debugfs interface to HNS3 driver

[Salil Mehta]

This adds the support of the debugfs interface to the driver for
debugging purposes.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 188 +
 1 file changed, 188 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
new file mode 100644
index 000..8ef5a41
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hnae3.h"
+
+static struct dentry *hclge_dbgfs_root;
+static int hclge_dbg_usage(struct hclge_dev *hdev, char *data);
+#define HCLGE_DBG_READ_LEN 256
+
+struct hclge_support_cmd {
+   char *name;
+   int len;
+   int (*fn)(struct hclge_dev *hdev, char *data);
+   char *param;
+};
+
+static int hclge_dbg_send(struct hclge_dev *hdev, char *buf)
+{
+   struct hclge_desc desc;
+   enum hclge_cmd_status status;
+   int cnt;
+
+   cnt = sscanf(buf, "%hi %hi %i %i %i %i %i %i",
+, ,
+[0], [1], [2],
+[3], [4], [5]);
+   if (cnt != 8) {
+   dev_info(>pdev->dev,
+"send cmd: bad command parameter, cnt=%d\n", cnt);
+   return -EINVAL;
+   }
+
+   status = hclge_cmd_send(>hw, , 1);
+   if (status) {
+   dev_info(>pdev->dev,
+"send comamnd fail Opcode:%x, Status:%d\n",
+desc.opcode, status);
+   }
+   dev_info(>pdev->dev, "get response:\n");
+   dev_info(>pdev->dev, "opcode:%04x\tflag:%04x\tretval:%04x\t\n",
+desc.opcode, desc.flag, desc.retval);
+   dev_info(>pdev->dev, "data[0~2]:%08x\t%08x\t%08x\n",
+desc.data[0], desc.data[1], desc.data[2]);
+   dev_info(>pdev->dev, "data[3-5]:%08x\t%08x\t%08x\n",
+desc.data[3], desc.data[4], desc.data[5]);
+   return 0;
+}
+
+const struct  hclge_support_cmd  support_cmd[] = {
+   {"send cmd", 8, hclge_dbg_send,
+   "opcode flag data0 data1 data2 data3 data4 data5"},
+   {"help", 4, hclge_dbg_usage, "no option"},
+};
+
+static int hclge_dbg_usage(struct hclge_dev *hdev, char *data)
+{
+   int i;
+
+   pr_info("supported cmd list:\n");
+   for (i = 0; i < ARRAY_SIZE(support_cmd); i++)
+   pr_info("%s: %s\n", support_cmd[i].name, support_cmd[i].param);
+
+   return 0;
+}
+
+static ssize_t hclge_dbg_cmd_read(struct file *filp, char __user *buffer,
+ size_t count, loff_t *ppos)
+{
+   int uncopy_bytes;
+   char *buf;
+   int len;
+
+   if (*ppos != 0)
+   return 0;
+   if (count < HCLGE_DBG_READ_LEN)
+   return -ENOSPC;
+   buf = kzalloc(HCLGE_DBG_READ_LEN, GFP_KERNEL);
+   if (!buf)
+   return -ENOSPC;
+
+   len = snprintf(buf, HCLGE_DBG_READ_LEN, "%s\n",
+  "Please echo help to cmd to get help information");
+   uncopy_bytes = copy_to_user(buffer, buf, len);
+   kfree(buf);
+
+   if (uncopy_bytes)
+   return -EFAULT;
+
+   *ppos = len;
+   return len;
+}
+
+static ssize_t hclge_dbg_cmd_write(struct file *filp, const char __user 
*buffer,
+  size_t count, loff_t *ppos)
+{
+   struct hclge_dev *hdev = filp->private_data;
+   char *cmd_buf, *cmd_buf_tmp;
+   int uncopied_bytes;
+   int i;
+
+   if (*ppos != 0)
+   return 0;
+   cmd_buf = kzalloc(count + 1, GFP_KERNEL);
+   if (!cmd_buf)
+   return count;
+   uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
+   if (uncopied_bytes) {
+   kfree(cmd_buf);
+   return -EFAULT;
+   }
+   cmd_buf[count] = '\0';
+
+   cmd_buf_tmp = strchr(cmd_buf, '\n');
+   if (cmd_buf_tmp) {
+   *cmd_buf_tmp = '\0';
+   count = cmd_buf_tmp - cmd_buf + 1;
+   }
+
+   for (i = 0; i < ARRAY_SIZE(support_cmd); i++) {
+   if (strncmp(cmd_buf, support_cmd[i].name,
+   support_cmd[i].len) == 0) {
+   support_cmd[i].fn(hdev, _buf[support_cmd[i].len]);
+   

[PATCH net-next 8/9] net: hns3: Add support of debugfs interface to HNS3 driver

[Salil Mehta]

This adds the support of the debugfs interface to the driver for
debugging purposes.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 188 +
 1 file changed, 188 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
new file mode 100644
index 000..8ef5a41
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hnae3.h"
+
+static struct dentry *hclge_dbgfs_root;
+static int hclge_dbg_usage(struct hclge_dev *hdev, char *data);
+#define HCLGE_DBG_READ_LEN 256
+
+struct hclge_support_cmd {
+   char *name;
+   int len;
+   int (*fn)(struct hclge_dev *hdev, char *data);
+   char *param;
+};
+
+static int hclge_dbg_send(struct hclge_dev *hdev, char *buf)
+{
+   struct hclge_desc desc;
+   enum hclge_cmd_status status;
+   int cnt;
+
+   cnt = sscanf(buf, "%hi %hi %i %i %i %i %i %i",
+, ,
+[0], [1], [2],
+[3], [4], [5]);
+   if (cnt != 8) {
+   dev_info(>pdev->dev,
+"send cmd: bad command parameter, cnt=%d\n", cnt);
+   return -EINVAL;
+   }
+
+   status = hclge_cmd_send(>hw, , 1);
+   if (status) {
+   dev_info(>pdev->dev,
+"send comamnd fail Opcode:%x, Status:%d\n",
+desc.opcode, status);
+   }
+   dev_info(>pdev->dev, "get response:\n");
+   dev_info(>pdev->dev, "opcode:%04x\tflag:%04x\tretval:%04x\t\n",
+desc.opcode, desc.flag, desc.retval);
+   dev_info(>pdev->dev, "data[0~2]:%08x\t%08x\t%08x\n",
+desc.data[0], desc.data[1], desc.data[2]);
+   dev_info(>pdev->dev, "data[3-5]:%08x\t%08x\t%08x\n",
+desc.data[3], desc.data[4], desc.data[5]);
+   return 0;
+}
+
+const struct  hclge_support_cmd  support_cmd[] = {
+   {"send cmd", 8, hclge_dbg_send,
+   "opcode flag data0 data1 data2 data3 data4 data5"},
+   {"help", 4, hclge_dbg_usage, "no option"},
+};
+
+static int hclge_dbg_usage(struct hclge_dev *hdev, char *data)
+{
+   int i;
+
+   pr_info("supported cmd list:\n");
+   for (i = 0; i < ARRAY_SIZE(support_cmd); i++)
+   pr_info("%s: %s\n", support_cmd[i].name, support_cmd[i].param);
+
+   return 0;
+}
+
+static ssize_t hclge_dbg_cmd_read(struct file *filp, char __user *buffer,
+ size_t count, loff_t *ppos)
+{
+   int uncopy_bytes;
+   char *buf;
+   int len;
+
+   if (*ppos != 0)
+   return 0;
+   if (count < HCLGE_DBG_READ_LEN)
+   return -ENOSPC;
+   buf = kzalloc(HCLGE_DBG_READ_LEN, GFP_KERNEL);
+   if (!buf)
+   return -ENOSPC;
+
+   len = snprintf(buf, HCLGE_DBG_READ_LEN, "%s\n",
+  "Please echo help to cmd to get help information");
+   uncopy_bytes = copy_to_user(buffer, buf, len);
+   kfree(buf);
+
+   if (uncopy_bytes)
+   return -EFAULT;
+
+   *ppos = len;
+   return len;
+}
+
+static ssize_t hclge_dbg_cmd_write(struct file *filp, const char __user 
*buffer,
+  size_t count, loff_t *ppos)
+{
+   struct hclge_dev *hdev = filp->private_data;
+   char *cmd_buf, *cmd_buf_tmp;
+   int uncopied_bytes;
+   int i;
+
+   if (*ppos != 0)
+   return 0;
+   cmd_buf = kzalloc(count + 1, GFP_KERNEL);
+   if (!cmd_buf)
+   return count;
+   uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
+   if (uncopied_bytes) {
+   kfree(cmd_buf);
+   return -EFAULT;
+   }
+   cmd_buf[count] = '\0';
+
+   cmd_buf_tmp = strchr(cmd_buf, '\n');
+   if (cmd_buf_tmp) {
+   *cmd_buf_tmp = '\0';
+   count = cmd_buf_tmp - cmd_buf + 1;
+   }
+
+   for (i = 0; i < ARRAY_SIZE(support_cmd); i++) {
+   if (strncmp(cmd_buf, support_cmd[i].name,
+   support_cmd[i].len) == 0) {
+   support_cmd[i].fn(hdev, _buf[support_cmd[i].len]);
+   break;
+   }
+   }
+
+   kfree(cmd_buf);
+   cmd_buf = NULL;
+   

[PATCH net-next 2/9] net: hns3: Add support of the HNAE3 framework

[Salil Mehta]

This patch adds the support of the HNAE3 (Hisilicon Network
Acceleration Engine 3) framework support to the HNS3 driver.

Framework facilitates clients like ENET(HNS3 Ethernet Driver), RoCE
and user-space Ethernet drivers (like ODP etc.) to register with HNAE3
devices and their associated operations.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 drivers/net/ethernet/hisilicon/hns3/hnae3.c | 305 +++
 drivers/net/ethernet/hisilicon/hns3/hnae3.h | 449 
 2 files changed, 754 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.c 
b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
new file mode 100644
index 000..f133e1d
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (c) 2016-2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+
+#include "hnae3.h"
+
+static LIST_HEAD(hnae3_ae_algo_list);
+static LIST_HEAD(hnae3_client_list);
+static LIST_HEAD(hnae3_ae_dev_list);
+
+static DEFINE_SPINLOCK(hnae3_list_ae_algo_lock);
+static DEFINE_SPINLOCK(hnae3_list_client_lock);
+static DEFINE_SPINLOCK(hnae3_list_ae_dev_lock);
+
+static void hnae3_list_add(spinlock_t *lock, struct list_head *node,
+  struct list_head *head)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(lock, flags);
+   list_add_tail_rcu(node, head);
+   spin_unlock_irqrestore(lock, flags);
+}
+
+static void hnae3_list_del(spinlock_t *lock, struct list_head *node)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(lock, flags);
+   list_del_rcu(node);
+   spin_unlock_irqrestore(lock, flags);
+}
+
+static bool hnae3_client_match(enum hnae3_client_type client_type,
+  enum hnae3_dev_type dev_type)
+{
+   if (dev_type == HNAE3_DEV_KNIC) {
+   switch (client_type) {
+   case HNAE3_CLIENT_KNIC:
+   case HNAE3_CLIENT_ROCE:
+   return true;
+   default:
+   return false;
+   }
+   } else if (dev_type == HNAE3_DEV_UNIC) {
+   switch (client_type) {
+   case HNAE3_CLIENT_UNIC:
+   return true;
+   default:
+   return false;
+   }
+   } else {
+   return false;
+   }
+}
+
+int hnae3_register_client(struct hnae3_client *client)
+{
+   struct hnae3_client *client_tmp;
+   struct hnae3_ae_dev *ae_dev;
+   int ret;
+
+   /* One system should only have one client for every type */
+   list_for_each_entry(client_tmp, _client_list, node) {
+   if (client_tmp->type == client->type)
+   return 0;
+   }
+
+   hnae3_list_add(_list_client_lock, >node,
+  _client_list);
+
+   /* Check if there are matched ae_dev */
+   list_for_each_entry(ae_dev, _ae_dev_list, node) {
+   if (hnae3_client_match(client->type, ae_dev->dev_type) &&
+   hnae_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B)) {
+   if (ae_dev->ops && ae_dev->ops->register_client) {
+   ret = ae_dev->ops->register_client(client,
+  ae_dev);
+   if (ret) {
+   dev_err(_dev->pdev->dev,
+   "init ae_dev error.\n");
+   return ret;
+   }
+   }
+   }
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(hnae3_register_client);
+
+void hnae3_unregister_client(struct hnae3_client *client)
+{
+   struct hnae3_ae_dev *ae_dev;
+
+   /* Check if there are matched ae_dev */
+   list_for_each_entry(ae_dev, _ae_dev_list, node) {
+   if (hnae3_client_match(client->type, ae_dev->dev_type) &&
+   hnae_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B))
+   if (ae_dev->ops && ae_dev->ops->unregister_client)
+   ae_dev->ops->unregister_client(client, ae_dev);
+   }
+   hnae3_list_del(_list_client_lock, >node);
+}
+EXPORT_SYMBOL(hnae3_unregister_client);
+
+/* hnae_ae_register - register a AE engine to hnae framework
+ * @hdev: the hnae ae engine device
+ * @owner:  the module who 

[PATCH net-next 2/9] net: hns3: Add support of the HNAE3 framework

[Salil Mehta]

This patch adds the support of the HNAE3 (Hisilicon Network
Acceleration Engine 3) framework support to the HNS3 driver.

Framework facilitates clients like ENET(HNS3 Ethernet Driver), RoCE
and user-space Ethernet drivers (like ODP etc.) to register with HNAE3
devices and their associated operations.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 drivers/net/ethernet/hisilicon/hns3/hnae3.c | 305 +++
 drivers/net/ethernet/hisilicon/hns3/hnae3.h | 449 
 2 files changed, 754 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.c 
b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
new file mode 100644
index 000..f133e1d
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (c) 2016-2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+
+#include "hnae3.h"
+
+static LIST_HEAD(hnae3_ae_algo_list);
+static LIST_HEAD(hnae3_client_list);
+static LIST_HEAD(hnae3_ae_dev_list);
+
+static DEFINE_SPINLOCK(hnae3_list_ae_algo_lock);
+static DEFINE_SPINLOCK(hnae3_list_client_lock);
+static DEFINE_SPINLOCK(hnae3_list_ae_dev_lock);
+
+static void hnae3_list_add(spinlock_t *lock, struct list_head *node,
+  struct list_head *head)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(lock, flags);
+   list_add_tail_rcu(node, head);
+   spin_unlock_irqrestore(lock, flags);
+}
+
+static void hnae3_list_del(spinlock_t *lock, struct list_head *node)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(lock, flags);
+   list_del_rcu(node);
+   spin_unlock_irqrestore(lock, flags);
+}
+
+static bool hnae3_client_match(enum hnae3_client_type client_type,
+  enum hnae3_dev_type dev_type)
+{
+   if (dev_type == HNAE3_DEV_KNIC) {
+   switch (client_type) {
+   case HNAE3_CLIENT_KNIC:
+   case HNAE3_CLIENT_ROCE:
+   return true;
+   default:
+   return false;
+   }
+   } else if (dev_type == HNAE3_DEV_UNIC) {
+   switch (client_type) {
+   case HNAE3_CLIENT_UNIC:
+   return true;
+   default:
+   return false;
+   }
+   } else {
+   return false;
+   }
+}
+
+int hnae3_register_client(struct hnae3_client *client)
+{
+   struct hnae3_client *client_tmp;
+   struct hnae3_ae_dev *ae_dev;
+   int ret;
+
+   /* One system should only have one client for every type */
+   list_for_each_entry(client_tmp, _client_list, node) {
+   if (client_tmp->type == client->type)
+   return 0;
+   }
+
+   hnae3_list_add(_list_client_lock, >node,
+  _client_list);
+
+   /* Check if there are matched ae_dev */
+   list_for_each_entry(ae_dev, _ae_dev_list, node) {
+   if (hnae3_client_match(client->type, ae_dev->dev_type) &&
+   hnae_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B)) {
+   if (ae_dev->ops && ae_dev->ops->register_client) {
+   ret = ae_dev->ops->register_client(client,
+  ae_dev);
+   if (ret) {
+   dev_err(_dev->pdev->dev,
+   "init ae_dev error.\n");
+   return ret;
+   }
+   }
+   }
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(hnae3_register_client);
+
+void hnae3_unregister_client(struct hnae3_client *client)
+{
+   struct hnae3_ae_dev *ae_dev;
+
+   /* Check if there are matched ae_dev */
+   list_for_each_entry(ae_dev, _ae_dev_list, node) {
+   if (hnae3_client_match(client->type, ae_dev->dev_type) &&
+   hnae_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B))
+   if (ae_dev->ops && ae_dev->ops->unregister_client)
+   ae_dev->ops->unregister_client(client, ae_dev);
+   }
+   hnae3_list_del(_list_client_lock, >node);
+}
+EXPORT_SYMBOL(hnae3_unregister_client);
+
+/* hnae_ae_register - register a AE engine to hnae framework
+ * @hdev: the hnae ae engine device
+ * @owner:  the module who provides this dev
+ * NOTE: the duplicated name will not be checked
+ */
+int 

[PATCH net-next 0/9] Hisilicon Network Subsystem 3 Ethernet Driver

[Salil Mehta]

This patch-set contains the support of the HNS3 (Hisilicon Network Subsystem 3)
Ethernet driver for hip08 family of SoCs and future upcoming SoCs.

Hisilicon's new hip08 SoCs have integrated ethernet based on PCI Express and
hence there was a need of new driver over the previous HNS driver which is 
already part of the Linux mainline. This new driver is NOT backward
compatible with HNS.

This current driver is meant to control the Physical Function and there would
soon be a support of a separate driver for Virtual Function once this base PF
driver has been accepted. Also, this driver is the ongoing development work and
HNS3 Ethernet driver would be incrementally enhanced with more new features.

High Level Architecture:

[ Ethtool ]
   ^  |
   |  | 
   [Ethernet Client]  [RoCE Client] . . . [ Ethernet Client ] 
- |
 ||
 [ HNAE3 Framework (Register/unregister) ]|
 ||
- |
   [ HNAE Device ]|
 ||
   [ HCLGE Layer] |
 |_   |
|| |  |
[ MDIO ][ Scheduler/Shaper ]  [ Debugfs ] |
|| |  |
||_|  | 
 ||
 [ IMP command Interface ]|
- |
  HIP08  H A R D W A R E  *


Current patch-set broadly adds the support of the following PF functionality:
 1. Basic Rx and Tx functionality 
 2. TSO support
 3. Ethtool support
 4. Debugfs support 
 5. HNAE framework and hardware compatability layer
 6. Scheduler and Shaper support in transmit function
 7. MDIO support

Salil Mehta (9):
  net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC
  net: hns3: Add support of the HNAE3 framework
  net: hns3: Add HNS3 IMP(Integrated Mgmt Proc) Cmd Interface Support
  net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support
  net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver
  net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC
  net: hns3: Add Ethtool support to HNS3 driver
  net: hns3: Add support of debugfs interface to HNS3 driver
  net: hns3: Add HNS3 driver to kernel build framework & MAINTAINERS

 MAINTAINERS|8 +
 drivers/net/ethernet/hisilicon/Kconfig |   24 +
 drivers/net/ethernet/hisilicon/Makefile|1 +
 drivers/net/ethernet/hisilicon/hns3/Makefile   |7 +
 drivers/net/ethernet/hisilicon/hns3/hnae3.c|  305 ++
 drivers/net/ethernet/hisilicon/hns3/hnae3.h|  449 +++
 .../net/ethernet/hisilicon/hns3/hns3pf/Makefile|   11 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c |  347 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h |  742 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c |  188 +
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4257 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h|  493 +++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c|  310 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c  | 1018 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h  |  108 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 2851 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h |  585 +++
 .../ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c  |  894 
 18 files changed, 12598 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c

-- 
2.7.4

[PATCH net-next 5/9] net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver

[Salil Mehta]

THis patch adds the support of the Scheduling and Shaping
functionalities during the transmit leg. This also adds the
support of Pause at MAC level. (Pause at per-priority level
shall be added later along with the DCB feature).

Hardware as such consists of two types of cofiguration of 6 level
schedulers. Algorithms varies according to the level and type
of scheduler being used. Current patch is used to initialize
the mapping, algorithms(like SP, DWRR etc) and shaper(CIR, PIR etc)
being used.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c  | 1018 
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h  |  108 +++
 2 files changed, 1126 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
new file mode 100644
index 000..2b66a0e
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -0,0 +1,1018 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hclge_tm.h"
+
+enum hclge_shaper_level {
+   HCLGE_SHAPER_LVL_PRI= 0,
+   HCLGE_SHAPER_LVL_PG = 1,
+   HCLGE_SHAPER_LVL_PORT   = 2,
+   HCLGE_SHAPER_LVL_QSET   = 3,
+   HCLGE_SHAPER_LVL_CNT= 4,
+   HCLGE_SHAPER_LVL_VF = 0,
+   HCLGE_SHAPER_LVL_PF = 1,
+};
+
+#define HCLGE_SHAPER_BS_U_DEF  1
+#define HCLGE_SHAPER_BS_S_DEF  4
+
+#define HCLGE_ETHER_MAX_RATE   10
+
+/* hclge_shaper_para_calc: calculate ir parameter for the shaper
+ * @ir: Rate to be config, its unit is Mbps
+ * @shaper_level: the shaper level. eg: port, pg, priority, queueset
+ * @ir_b: IR_B parameter of IR shaper
+ * @ir_u: IR_U parameter of IR shaper
+ * @ir_s: IR_S parameter of IR shaper
+ *
+ * the formula:
+ *
+ * IR_b * (2 ^ IR_u) * 8
+ * IR(Mbps) = -  *  CLOCK(1000Mbps)
+ * Tick * (2 ^ IR_s)
+ *
+ * @return: 0: calculate sucessful, negative: fail
+ */
+static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
+ u8 *ir_b, u8 *ir_u, u8 *ir_s)
+{
+   const u16 tick_array[HCLGE_SHAPER_LVL_CNT] = {
+   6 * 256,/* Prioriy level */
+   6 * 32, /* Prioriy group level */
+   6 * 8,  /* Port level */
+   6 * 256 /* Qset level */
+   };
+   u8 ir_u_calc = 0, ir_s_calc = 0;
+   u32 ir_calc;
+   u32 tick;
+
+   /* Calc tick */
+   if (shaper_level >= HCLGE_SHAPER_LVL_CNT)
+   return -ENOMEM;
+
+   tick = tick_array[shaper_level];
+
+   /**
+* Calc the speed if ir_b = 126, ir_u = 0 and ir_s = 0
+* the formula is changed to:
+*  126 * 1 * 8
+* ir_calc =  * 1000
+*  tick * 1
+*/
+   ir_calc = (1008000 + (tick >> 1) - 1) / tick;
+
+   if (ir_calc == ir) {
+   *ir_b = 126;
+   *ir_u = 0;
+   *ir_s = 0;
+
+   return 0;
+   } else if (ir_calc > ir) {
+   /* Increasing the denominator to select ir_s value */
+   while (ir_calc > ir) {
+   ir_s_calc++;
+   ir_calc = 1008000 / (tick * (1 << ir_s_calc));
+   }
+
+   if (ir_calc == ir)
+   *ir_b = 126;
+   else
+   *ir_b = (ir * tick * (1 << ir_s_calc) + 4000) / 8000;
+   } else {
+   /* Increasing the numerator to select ir_u value */
+   u32 numerator;
+
+   while (ir_calc < ir) {
+   ir_u_calc++;
+   numerator = 1008000 * (1 << ir_u_calc);
+   ir_calc = (numerator + (tick >> 1)) / tick;
+   }
+
+   if (ir_calc == ir) {
+   *ir_b = 126;
+   } else {
+   u32 denominator = (8000 * (1 << --ir_u_calc));
+   *ir_b = (ir * tick + (denominator >> 1)) / denominator;
+   }
+   }
+
+   *ir_u = ir_u_calc;
+   *ir_s = ir_s_calc;
+
+   return 0;
+}
+
+static int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
+{
+   struct hclge_desc desc;
+
+   hclge_cmd_setup_basic_desc(, 

[PATCH net-next 0/9] Hisilicon Network Subsystem 3 Ethernet Driver

[Salil Mehta]

This patch-set contains the support of the HNS3 (Hisilicon Network Subsystem 3)
Ethernet driver for hip08 family of SoCs and future upcoming SoCs.

Hisilicon's new hip08 SoCs have integrated ethernet based on PCI Express and
hence there was a need of new driver over the previous HNS driver which is 
already part of the Linux mainline. This new driver is NOT backward
compatible with HNS.

This current driver is meant to control the Physical Function and there would
soon be a support of a separate driver for Virtual Function once this base PF
driver has been accepted. Also, this driver is the ongoing development work and
HNS3 Ethernet driver would be incrementally enhanced with more new features.

High Level Architecture:

[ Ethtool ]
   ^  |
   |  | 
   [Ethernet Client]  [RoCE Client] . . . [ Ethernet Client ] 
- |
 ||
 [ HNAE3 Framework (Register/unregister) ]|
 ||
- |
   [ HNAE Device ]|
 ||
   [ HCLGE Layer] |
 |_   |
|| |  |
[ MDIO ][ Scheduler/Shaper ]  [ Debugfs ] |
|| |  |
||_|  | 
 ||
 [ IMP command Interface ]|
- |
  HIP08  H A R D W A R E  *


Current patch-set broadly adds the support of the following PF functionality:
 1. Basic Rx and Tx functionality 
 2. TSO support
 3. Ethtool support
 4. Debugfs support 
 5. HNAE framework and hardware compatability layer
 6. Scheduler and Shaper support in transmit function
 7. MDIO support

Salil Mehta (9):
  net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC
  net: hns3: Add support of the HNAE3 framework
  net: hns3: Add HNS3 IMP(Integrated Mgmt Proc) Cmd Interface Support
  net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support
  net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver
  net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC
  net: hns3: Add Ethtool support to HNS3 driver
  net: hns3: Add support of debugfs interface to HNS3 driver
  net: hns3: Add HNS3 driver to kernel build framework & MAINTAINERS

 MAINTAINERS|8 +
 drivers/net/ethernet/hisilicon/Kconfig |   24 +
 drivers/net/ethernet/hisilicon/Makefile|1 +
 drivers/net/ethernet/hisilicon/hns3/Makefile   |7 +
 drivers/net/ethernet/hisilicon/hns3/hnae3.c|  305 ++
 drivers/net/ethernet/hisilicon/hns3/hnae3.h|  449 +++
 .../net/ethernet/hisilicon/hns3/hns3pf/Makefile|   11 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c |  347 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h |  742 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c |  188 +
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4257 
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h|  493 +++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c|  310 ++
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c  | 1018 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h  |  108 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 2851 +
 .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h |  585 +++
 .../ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c  |  894 
 18 files changed, 12598 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c

-- 
2.7.4

[PATCH net-next 5/9] net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver

[Salil Mehta]

THis patch adds the support of the Scheduling and Shaping
functionalities during the transmit leg. This also adds the
support of Pause at MAC level. (Pause at per-priority level
shall be added later along with the DCB feature).

Hardware as such consists of two types of cofiguration of 6 level
schedulers. Algorithms varies according to the level and type
of scheduler being used. Current patch is used to initialize
the mapping, algorithms(like SP, DWRR etc) and shaper(CIR, PIR etc)
being used.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c  | 1018 
 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h  |  108 +++
 2 files changed, 1126 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
new file mode 100644
index 000..2b66a0e
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -0,0 +1,1018 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+#include "hclge_tm.h"
+
+enum hclge_shaper_level {
+   HCLGE_SHAPER_LVL_PRI= 0,
+   HCLGE_SHAPER_LVL_PG = 1,
+   HCLGE_SHAPER_LVL_PORT   = 2,
+   HCLGE_SHAPER_LVL_QSET   = 3,
+   HCLGE_SHAPER_LVL_CNT= 4,
+   HCLGE_SHAPER_LVL_VF = 0,
+   HCLGE_SHAPER_LVL_PF = 1,
+};
+
+#define HCLGE_SHAPER_BS_U_DEF  1
+#define HCLGE_SHAPER_BS_S_DEF  4
+
+#define HCLGE_ETHER_MAX_RATE   10
+
+/* hclge_shaper_para_calc: calculate ir parameter for the shaper
+ * @ir: Rate to be config, its unit is Mbps
+ * @shaper_level: the shaper level. eg: port, pg, priority, queueset
+ * @ir_b: IR_B parameter of IR shaper
+ * @ir_u: IR_U parameter of IR shaper
+ * @ir_s: IR_S parameter of IR shaper
+ *
+ * the formula:
+ *
+ * IR_b * (2 ^ IR_u) * 8
+ * IR(Mbps) = -  *  CLOCK(1000Mbps)
+ * Tick * (2 ^ IR_s)
+ *
+ * @return: 0: calculate sucessful, negative: fail
+ */
+static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
+ u8 *ir_b, u8 *ir_u, u8 *ir_s)
+{
+   const u16 tick_array[HCLGE_SHAPER_LVL_CNT] = {
+   6 * 256,/* Prioriy level */
+   6 * 32, /* Prioriy group level */
+   6 * 8,  /* Port level */
+   6 * 256 /* Qset level */
+   };
+   u8 ir_u_calc = 0, ir_s_calc = 0;
+   u32 ir_calc;
+   u32 tick;
+
+   /* Calc tick */
+   if (shaper_level >= HCLGE_SHAPER_LVL_CNT)
+   return -ENOMEM;
+
+   tick = tick_array[shaper_level];
+
+   /**
+* Calc the speed if ir_b = 126, ir_u = 0 and ir_s = 0
+* the formula is changed to:
+*  126 * 1 * 8
+* ir_calc =  * 1000
+*  tick * 1
+*/
+   ir_calc = (1008000 + (tick >> 1) - 1) / tick;
+
+   if (ir_calc == ir) {
+   *ir_b = 126;
+   *ir_u = 0;
+   *ir_s = 0;
+
+   return 0;
+   } else if (ir_calc > ir) {
+   /* Increasing the denominator to select ir_s value */
+   while (ir_calc > ir) {
+   ir_s_calc++;
+   ir_calc = 1008000 / (tick * (1 << ir_s_calc));
+   }
+
+   if (ir_calc == ir)
+   *ir_b = 126;
+   else
+   *ir_b = (ir * tick * (1 << ir_s_calc) + 4000) / 8000;
+   } else {
+   /* Increasing the numerator to select ir_u value */
+   u32 numerator;
+
+   while (ir_calc < ir) {
+   ir_u_calc++;
+   numerator = 1008000 * (1 << ir_u_calc);
+   ir_calc = (numerator + (tick >> 1)) / tick;
+   }
+
+   if (ir_calc == ir) {
+   *ir_b = 126;
+   } else {
+   u32 denominator = (8000 * (1 << --ir_u_calc));
+   *ir_b = (ir * tick + (denominator >> 1)) / denominator;
+   }
+   }
+
+   *ir_u = ir_u_calc;
+   *ir_s = ir_s_calc;
+
+   return 0;
+}
+
+static int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
+{
+   struct hclge_desc desc;
+
+   hclge_cmd_setup_basic_desc(, HCLGE_OPC_CFG_MAC_PAUSE_EN, false);
+
+   desc.data[0] = cpu_to_le32((tx ? HCLGE_TX_MAC_PAUSE_EN_MSK 

[PATCH net-next 9/9] net: hns3: Add HNS3 driver to kernel build framework & MAINTAINERS

[Salil Mehta]

This patch updates the MAINTAINERS file with HNS3 Ethernet driver
maintainers names and other details. This also introduces the new
Makefiles required to build the HNS3 Ethernet driver and updates
the existing Kconfig file in the hisilicon folder.

Signed-off-by: Salil Mehta 
---
 MAINTAINERS|  8 
 drivers/net/ethernet/hisilicon/Kconfig | 24 ++
 drivers/net/ethernet/hisilicon/Makefile|  1 +
 drivers/net/ethernet/hisilicon/hns3/Makefile   |  7 +++
 .../net/ethernet/hisilicon/hns3/hns3pf/Makefile| 11 ++
 5 files changed, 51 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile

diff --git a/MAINTAINERS b/MAINTAINERS
index 8b8249b..cda0e80 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6070,6 +6070,14 @@ S:   Maintained
 F: drivers/net/ethernet/hisilicon/
 F: Documentation/devicetree/bindings/net/hisilicon*.txt
 
+HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)
+M: Yisen Zhuang 
+M: Salil Mehta 
+L: net...@vger.kernel.org
+W: http://www.hisilicon.com
+S: Maintained
+F: drivers/net/ethernet/hisilicon/hns3/
+
 HISILICON ROCE DRIVER
 M: Lijun Ou 
 M: Wei Hu(Xavier) 
diff --git a/drivers/net/ethernet/hisilicon/Kconfig 
b/drivers/net/ethernet/hisilicon/Kconfig
index d11287e..2c48fce 100644
--- a/drivers/net/ethernet/hisilicon/Kconfig
+++ b/drivers/net/ethernet/hisilicon/Kconfig
@@ -76,4 +76,28 @@ config HNS_ENET
  This selects the general ethernet driver for HNS.  This module make
  use of any HNS AE driver, such as HNS_DSAF
 
+config HNS3
+   tristate "Hisilicon Network Subsystem Support HNS3 (Framework)"
+   ---help---
+ This selects the framework support for Hisilicon Network Subsystem 3.
+ This layer facilitates clients like ENET, RoCE and user-space ethernet
+ drivers(like ODP)to register with HNAE devices and their associated
+ operations.
+
+config HNS3_HCLGE
+   tristate "Hisilicon HNS3 HCLGE Acceleration Engine & Compatibility 
Layer Support"
+   select HNS3
+   ---help---
+ This selects the HNS3_HCLGE network acceleration engine & its hardware
+ compatibility layer. The engine would be used in Hisilicon hip08 
family of
+ SoCs and further upcoming SoCs.
+
+config HNS3_ENET
+   tristate "Hisilicon HNS3 Ethernet Device Support"
+   select HNS3
+   ---help---
+ This selects the Ethernet Driver for Hisilicon Network Subsystem 3 
for hip08
+ family of SoCs. This module depends upon HNAE3 driver to access the 
HNAE3
+ devices and their associated operations.
+
 endif # NET_VENDOR_HISILICON
diff --git a/drivers/net/ethernet/hisilicon/Makefile 
b/drivers/net/ethernet/hisilicon/Makefile
index 8661695..3828c43 100644
--- a/drivers/net/ethernet/hisilicon/Makefile
+++ b/drivers/net/ethernet/hisilicon/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_HIX5HD2_GMAC) += hix5hd2_gmac.o
 obj-$(CONFIG_HIP04_ETH) += hip04_eth.o
 obj-$(CONFIG_HNS_MDIO) += hns_mdio.o
 obj-$(CONFIG_HNS) += hns/
+obj-$(CONFIG_HNS3) += hns3/
 obj-$(CONFIG_HISI_FEMAC) += hisi_femac.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/Makefile 
b/drivers/net/ethernet/hisilicon/hns3/Makefile
new file mode 100644
index 000..5e53735
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the HISILICON network device drivers.
+#
+
+obj-$(CONFIG_HNS3) += hns3pf/
+
+obj-$(CONFIG_HNS3) +=hnae3.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
new file mode 100644
index 000..8c3fd38
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the HISILICON network device drivers.
+#
+
+ccflags-y := -Idrivers/net/ethernet/hisilicon/hns3
+
+obj-$(CONFIG_HNS3_HCLGE) += hclge.o
+hclge-objs =hclge_main.o hclge_cmd.o hclge_mdio.o hclge_debugfs.o hclge_tm.o
+
+obj-$(CONFIG_HNS3_ENET) += hns3.o
+hns3-objs = hns3_enet.o hns3_ethtool.o
-- 
2.7.4

[PATCH net-next 6/9] net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC

[Salil Mehta]

This patch adds the support of MDIO bus interface for HNS3 driver.
Code provides various interfaces to start and stop the PHY layer
and to read and write the MDIO bus or PHY.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c| 310 +
 1 file changed, 310 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
new file mode 100644
index 000..c6812d2
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+
+enum hclge_mdio_c22_op_seq {
+   HCLGE_MDIO_C22_WRITE = 1,
+   HCLGE_MDIO_C22_READ = 2
+};
+
+enum hclge_mdio_c45_op_seq {
+   HCLGE_MDIO_C45_WRITE_ADDR = 0,
+   HCLGE_MDIO_C45_WRITE_DATA,
+   HCLGE_MDIO_C45_READ_INCREMENT,
+   HCLGE_MDIO_C45_READ
+};
+
+#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
+#define HCLGE_MDIO_CTRL_ST_MSK  GENMASK(2, 1)
+#define HCLGE_MDIO_CTRL_ST_LSH  1
+#define HCLGE_MDIO_IS_C22(c22)  (((c22) << HCLGE_MDIO_CTRL_ST_LSH) & \
+   HCLGE_MDIO_CTRL_ST_MSK)
+
+#define HCLGE_MDIO_CTRL_OP_MSK  GENMASK(4, 3)
+#define HCLGE_MDIO_CTRL_OP_LSH  3
+#define HCLGE_MDIO_CTRL_OP(access) \
+   (((access) << HCLGE_MDIO_CTRL_OP_LSH) & HCLGE_MDIO_CTRL_OP_MSK)
+#define HCLGE_MDIO_CTRL_PRTAD_MSK   GENMASK(4, 0)
+#define HCLGE_MDIO_CTRL_DEVAD_MSK   GENMASK(4, 0)
+
+#define HCLGE_MDIO_STA_VAL(val)((val) & BIT(0))
+
+struct hclge_mdio_cfg_cmd {
+   u8 ctrl_bit;
+   u8 prtad;   /* The external port address */
+   u8 devad;   /* The external device address */
+   u8 rsvd;
+   __le16 addr_c45;/* Only valid for c45 */
+   __le16 data_wr;
+   __le16 data_rd;
+   __le16 sta;
+};
+
+static int hclge_mdio_write(struct mii_bus *bus, int phy_id, int regnum,
+   u16 data)
+{
+   struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
+   struct hclge_mdio_cfg_cmd *mdio_cmd;
+   enum hclge_cmd_status status;
+   struct hclge_desc desc;
+   u8 is_c45, devad;
+   u16 reg;
+
+   if (!bus)
+   return -EINVAL;
+
+   is_c45 = !!(regnum & MII_ADDR_C45);
+   devad = ((regnum >> 16) & 0x1f);
+   reg = (u16)(regnum & 0x);
+
+   hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, false);
+
+   mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
+
+   if (!is_c45) {
+   /* C22 write reg and data */
+   mdio_cmd->ctrl_bit = HCLGE_MDIO_IS_C22(!is_c45);
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_OP(HCLGE_MDIO_C22_WRITE);
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;
+   mdio_cmd->data_wr = cpu_to_le16(data);
+   mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
+   mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
+   } else {
+   /* Set phy addr */
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;
+   mdio_cmd->addr_c45 = cpu_to_le16(reg);
+   mdio_cmd->data_wr = cpu_to_le16(data);
+   mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
+   mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
+   }
+
+   status = hclge_cmd_send(>hw, , 1);
+   if (status) {
+   dev_err(>pdev->dev,
+   "mdio write fail when sending cmd, status is %d.\n",
+   status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static int hclge_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
+{
+   struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
+   struct hclge_mdio_cfg_cmd *mdio_cmd;
+   enum hclge_cmd_status status;
+   struct hclge_desc desc;
+   u8 is_c45, devad;
+   u16 reg;
+
+   if (!bus)
+   return -EINVAL;
+
+   is_c45 = !!(regnum & MII_ADDR_C45);
+   devad = ((regnum >> 16) & GENMASK(4, 0));
+   reg = (u16)(regnum & GENMASK(15, 0));
+
+   hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, true);
+
+   mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
+
+   dev_dbg(>dev, "phy id=%d, is_c45=%d, devad=%d, reg=%#x!\n",
+   phy_id, is_c45, devad, reg);
+
+   if (!is_c45) {
+   /* C22 read reg */
+   

[PATCH net-next 9/9] net: hns3: Add HNS3 driver to kernel build framework & MAINTAINERS

[Salil Mehta]

This patch updates the MAINTAINERS file with HNS3 Ethernet driver
maintainers names and other details. This also introduces the new
Makefiles required to build the HNS3 Ethernet driver and updates
the existing Kconfig file in the hisilicon folder.

Signed-off-by: Salil Mehta 
---
 MAINTAINERS|  8 
 drivers/net/ethernet/hisilicon/Kconfig | 24 ++
 drivers/net/ethernet/hisilicon/Makefile|  1 +
 drivers/net/ethernet/hisilicon/hns3/Makefile   |  7 +++
 .../net/ethernet/hisilicon/hns3/hns3pf/Makefile| 11 ++
 5 files changed, 51 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/Makefile
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile

diff --git a/MAINTAINERS b/MAINTAINERS
index 8b8249b..cda0e80 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6070,6 +6070,14 @@ S:   Maintained
 F: drivers/net/ethernet/hisilicon/
 F: Documentation/devicetree/bindings/net/hisilicon*.txt
 
+HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)
+M: Yisen Zhuang 
+M: Salil Mehta 
+L: net...@vger.kernel.org
+W: http://www.hisilicon.com
+S: Maintained
+F: drivers/net/ethernet/hisilicon/hns3/
+
 HISILICON ROCE DRIVER
 M: Lijun Ou 
 M: Wei Hu(Xavier) 
diff --git a/drivers/net/ethernet/hisilicon/Kconfig 
b/drivers/net/ethernet/hisilicon/Kconfig
index d11287e..2c48fce 100644
--- a/drivers/net/ethernet/hisilicon/Kconfig
+++ b/drivers/net/ethernet/hisilicon/Kconfig
@@ -76,4 +76,28 @@ config HNS_ENET
  This selects the general ethernet driver for HNS.  This module make
  use of any HNS AE driver, such as HNS_DSAF
 
+config HNS3
+   tristate "Hisilicon Network Subsystem Support HNS3 (Framework)"
+   ---help---
+ This selects the framework support for Hisilicon Network Subsystem 3.
+ This layer facilitates clients like ENET, RoCE and user-space ethernet
+ drivers(like ODP)to register with HNAE devices and their associated
+ operations.
+
+config HNS3_HCLGE
+   tristate "Hisilicon HNS3 HCLGE Acceleration Engine & Compatibility 
Layer Support"
+   select HNS3
+   ---help---
+ This selects the HNS3_HCLGE network acceleration engine & its hardware
+ compatibility layer. The engine would be used in Hisilicon hip08 
family of
+ SoCs and further upcoming SoCs.
+
+config HNS3_ENET
+   tristate "Hisilicon HNS3 Ethernet Device Support"
+   select HNS3
+   ---help---
+ This selects the Ethernet Driver for Hisilicon Network Subsystem 3 
for hip08
+ family of SoCs. This module depends upon HNAE3 driver to access the 
HNAE3
+ devices and their associated operations.
+
 endif # NET_VENDOR_HISILICON
diff --git a/drivers/net/ethernet/hisilicon/Makefile 
b/drivers/net/ethernet/hisilicon/Makefile
index 8661695..3828c43 100644
--- a/drivers/net/ethernet/hisilicon/Makefile
+++ b/drivers/net/ethernet/hisilicon/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_HIX5HD2_GMAC) += hix5hd2_gmac.o
 obj-$(CONFIG_HIP04_ETH) += hip04_eth.o
 obj-$(CONFIG_HNS_MDIO) += hns_mdio.o
 obj-$(CONFIG_HNS) += hns/
+obj-$(CONFIG_HNS3) += hns3/
 obj-$(CONFIG_HISI_FEMAC) += hisi_femac.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/Makefile 
b/drivers/net/ethernet/hisilicon/hns3/Makefile
new file mode 100644
index 000..5e53735
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the HISILICON network device drivers.
+#
+
+obj-$(CONFIG_HNS3) += hns3pf/
+
+obj-$(CONFIG_HNS3) +=hnae3.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
new file mode 100644
index 000..8c3fd38
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the HISILICON network device drivers.
+#
+
+ccflags-y := -Idrivers/net/ethernet/hisilicon/hns3
+
+obj-$(CONFIG_HNS3_HCLGE) += hclge.o
+hclge-objs =hclge_main.o hclge_cmd.o hclge_mdio.o hclge_debugfs.o hclge_tm.o
+
+obj-$(CONFIG_HNS3_ENET) += hns3.o
+hns3-objs = hns3_enet.o hns3_ethtool.o
-- 
2.7.4

[PATCH net-next 6/9] net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC

[Salil Mehta]

This patch adds the support of MDIO bus interface for HNS3 driver.
Code provides various interfaces to start and stop the PHY layer
and to read and write the MDIO bus or PHY.

Signed-off-by: Daode Huang 
Signed-off-by: lipeng 
Signed-off-by: Salil Mehta 
Signed-off-by: Yisen Zhuang 
---
 .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c| 310 +
 1 file changed, 310 insertions(+)
 create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
new file mode 100644
index 000..c6812d2
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (c) 2016~2017 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+#include "hclge_cmd.h"
+#include "hclge_main.h"
+
+enum hclge_mdio_c22_op_seq {
+   HCLGE_MDIO_C22_WRITE = 1,
+   HCLGE_MDIO_C22_READ = 2
+};
+
+enum hclge_mdio_c45_op_seq {
+   HCLGE_MDIO_C45_WRITE_ADDR = 0,
+   HCLGE_MDIO_C45_WRITE_DATA,
+   HCLGE_MDIO_C45_READ_INCREMENT,
+   HCLGE_MDIO_C45_READ
+};
+
+#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
+#define HCLGE_MDIO_CTRL_ST_MSK  GENMASK(2, 1)
+#define HCLGE_MDIO_CTRL_ST_LSH  1
+#define HCLGE_MDIO_IS_C22(c22)  (((c22) << HCLGE_MDIO_CTRL_ST_LSH) & \
+   HCLGE_MDIO_CTRL_ST_MSK)
+
+#define HCLGE_MDIO_CTRL_OP_MSK  GENMASK(4, 3)
+#define HCLGE_MDIO_CTRL_OP_LSH  3
+#define HCLGE_MDIO_CTRL_OP(access) \
+   (((access) << HCLGE_MDIO_CTRL_OP_LSH) & HCLGE_MDIO_CTRL_OP_MSK)
+#define HCLGE_MDIO_CTRL_PRTAD_MSK   GENMASK(4, 0)
+#define HCLGE_MDIO_CTRL_DEVAD_MSK   GENMASK(4, 0)
+
+#define HCLGE_MDIO_STA_VAL(val)((val) & BIT(0))
+
+struct hclge_mdio_cfg_cmd {
+   u8 ctrl_bit;
+   u8 prtad;   /* The external port address */
+   u8 devad;   /* The external device address */
+   u8 rsvd;
+   __le16 addr_c45;/* Only valid for c45 */
+   __le16 data_wr;
+   __le16 data_rd;
+   __le16 sta;
+};
+
+static int hclge_mdio_write(struct mii_bus *bus, int phy_id, int regnum,
+   u16 data)
+{
+   struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
+   struct hclge_mdio_cfg_cmd *mdio_cmd;
+   enum hclge_cmd_status status;
+   struct hclge_desc desc;
+   u8 is_c45, devad;
+   u16 reg;
+
+   if (!bus)
+   return -EINVAL;
+
+   is_c45 = !!(regnum & MII_ADDR_C45);
+   devad = ((regnum >> 16) & 0x1f);
+   reg = (u16)(regnum & 0x);
+
+   hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, false);
+
+   mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
+
+   if (!is_c45) {
+   /* C22 write reg and data */
+   mdio_cmd->ctrl_bit = HCLGE_MDIO_IS_C22(!is_c45);
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_OP(HCLGE_MDIO_C22_WRITE);
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;
+   mdio_cmd->data_wr = cpu_to_le16(data);
+   mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
+   mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
+   } else {
+   /* Set phy addr */
+   mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;
+   mdio_cmd->addr_c45 = cpu_to_le16(reg);
+   mdio_cmd->data_wr = cpu_to_le16(data);
+   mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
+   mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
+   }
+
+   status = hclge_cmd_send(>hw, , 1);
+   if (status) {
+   dev_err(>pdev->dev,
+   "mdio write fail when sending cmd, status is %d.\n",
+   status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static int hclge_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
+{
+   struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
+   struct hclge_mdio_cfg_cmd *mdio_cmd;
+   enum hclge_cmd_status status;
+   struct hclge_desc desc;
+   u8 is_c45, devad;
+   u16 reg;
+
+   if (!bus)
+   return -EINVAL;
+
+   is_c45 = !!(regnum & MII_ADDR_C45);
+   devad = ((regnum >> 16) & GENMASK(4, 0));
+   reg = (u16)(regnum & GENMASK(15, 0));
+
+   hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, true);
+
+   mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
+
+   dev_dbg(>dev, "phy id=%d, is_c45=%d, devad=%d, reg=%#x!\n",
+   phy_id, is_c45, devad, reg);
+
+   if (!is_c45) {
+   /* C22 read reg */
+   mdio_cmd->ctrl_bit = HCLGE_MDIO_IS_C22(!is_c45);
+   mdio_cmd->ctrl_bit |= 

Re: [PATCH v2 01/11] crypto: introduce crypto wait for async op

[Herbert Xu]

On Mon, May 29, 2017 at 11:22:48AM +0300, Gilad Ben-Yossef wrote:
>
> +static inline int crypto_wait_req(int err, struct crypto_wait *wait)
> +{
> + switch (err) {
> + case -EINPROGRESS:
> + case -EBUSY:
> + wait_for_completion(>completion);
> + reinit_completion(>completion);
> + err = wait->err;
> + break;
> + };
> +
> + return err;
> +}

This assumes that the request is used with backlog.  For non-backlog
requests this would result in a memory leak as EBUSY in that case is
a fatal error.

So this API can't be used without backlog.

We could introduce a flag to indicate whether we want backlog or not,
or maybe we should change our API so that in the non-backlog case we
return something other than EBUSY.

Opinions?

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v2 01/11] crypto: introduce crypto wait for async op

[Herbert Xu]

On Mon, May 29, 2017 at 11:22:48AM +0300, Gilad Ben-Yossef wrote:
>
> +static inline int crypto_wait_req(int err, struct crypto_wait *wait)
> +{
> + switch (err) {
> + case -EINPROGRESS:
> + case -EBUSY:
> + wait_for_completion(>completion);
> + reinit_completion(>completion);
> + err = wait->err;
> + break;
> + };
> +
> + return err;
> +}

This assumes that the request is used with backlog.  For non-backlog
requests this would result in a memory leak as EBUSY in that case is
a fatal error.

So this API can't be used without backlog.

We could introduce a flag to indicate whether we want backlog or not,
or maybe we should change our API so that in the non-backlog case we
return something other than EBUSY.

Opinions?

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH] usb: gadget: functions: add ftrace export over USB

[kbuild test robot]

Hi Felipe,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.12-rc4 next-20170609]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Felipe-Balbi/usb-gadget-functions-add-ftrace-export-over-USB/20170610-060059
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_bind':
>> drivers/usb/gadget/function/f-trace.c:271:22: error: assignment from 
>> incompatible pointer type [-Werror=incompatible-pointer-types]
 trace->ftrace.write = ftrace_write;
 ^
   cc1: some warnings being treated as errors

vim +271 drivers/usb/gadget/function/f-trace.c

   265  goto err0;
   266  trace->in = ep;
   267  
   268  ftrace_hs_in_desc.bEndpointAddress = 
ftrace_fs_in_desc.bEndpointAddress;
   269  ftrace_ss_in_desc.bEndpointAddress = 
ftrace_fs_in_desc.bEndpointAddress;
   270  
 > 271  trace->ftrace.write = ftrace_write;
   272  
   273  spin_lock_init(>lock);
   274  INIT_WORK(>queue_work, ftrace_queue_work);

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH] usb: gadget: functions: add ftrace export over USB

[kbuild test robot]

Hi Felipe,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.12-rc4 next-20170609]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Felipe-Balbi/usb-gadget-functions-add-ftrace-export-over-USB/20170610-060059
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/usb/gadget/function/f-trace.c: In function 'ftrace_bind':
>> drivers/usb/gadget/function/f-trace.c:271:22: error: assignment from 
>> incompatible pointer type [-Werror=incompatible-pointer-types]
 trace->ftrace.write = ftrace_write;
 ^
   cc1: some warnings being treated as errors

vim +271 drivers/usb/gadget/function/f-trace.c

   265  goto err0;
   266  trace->in = ep;
   267  
   268  ftrace_hs_in_desc.bEndpointAddress = 
ftrace_fs_in_desc.bEndpointAddress;
   269  ftrace_ss_in_desc.bEndpointAddress = 
ftrace_fs_in_desc.bEndpointAddress;
   270  
 > 271  trace->ftrace.write = ftrace_write;
   272  
   273  spin_lock_init(>lock);
   274  INIT_WORK(>queue_work, ftrace_queue_work);

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH 1/3] mm: add vm_insert_mixed_mkwrite()

[Dan Williams]

On Fri, Jun 9, 2017 at 8:03 PM, Ross Zwisler
 wrote:
> On Fri, Jun 09, 2017 at 02:23:51PM -0700, Dan Williams wrote:
>> On Wed, Jun 7, 2017 at 1:48 PM, Ross Zwisler
>>  wrote:
>> > To be able to use the common 4k zero page in DAX we need to have our PTE
>> > fault path look more like our PMD fault path where a PTE entry can be
>> > marked as dirty and writeable as it is first inserted, rather than waiting
>> > for a follow-up dax_pfn_mkwrite() => finish_mkwrite_fault() call.
>> >
>> > Right now we can rely on having a dax_pfn_mkwrite() call because we can
>> > distinguish between these two cases in do_wp_page():
>> >
>> > case 1: 4k zero page => writable DAX storage
>> > case 2: read-only DAX storage => writeable DAX storage
>> >
>> > This distinction is made by via vm_normal_page().  vm_normal_page() returns
>> > false for the common 4k zero page, though, just as it does for DAX ptes.
>> > Instead of special casing the DAX + 4k zero page case, we will simplify our
>> > DAX PTE page fault sequence so that it matches our DAX PMD sequence, and
>> > get rid of dax_pfn_mkwrite() completely.
>> >
>> > This means that insert_pfn() needs to follow the lead of insert_pfn_pmd()
>> > and allow us to pass in a 'mkwrite' flag.  If 'mkwrite' is set insert_pfn()
>> > will do the work that was previously done by wp_page_reuse() as part of the
>> > dax_pfn_mkwrite() call path.
>> >
>> > Signed-off-by: Ross Zwisler 
>> > ---
>> >  include/linux/mm.h |  9 +++--
>> >  mm/memory.c| 21 ++---
>> >  2 files changed, 21 insertions(+), 9 deletions(-)
>> >
>> > diff --git a/include/linux/mm.h b/include/linux/mm.h
>> > index b892e95..11e323a 100644
>> > --- a/include/linux/mm.h
>> > +++ b/include/linux/mm.h
>> > @@ -2294,10 +2294,15 @@ int vm_insert_pfn(struct vm_area_struct *vma, 
>> > unsigned long addr,
>> > unsigned long pfn);
>> >  int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
>> > unsigned long pfn, pgprot_t pgprot);
>> > -int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
>> > -   pfn_t pfn);
>> > +int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long 
>> > addr,
>> > +   pfn_t pfn, bool mkwrite);
>>
>> Are there any other planned public users of vm_insert_mixed_mkwrite()
>> that would pass false? I think not.
>>
>> >  int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, 
>> > unsigned long len);
>> >
>> > +static inline int vm_insert_mixed(struct vm_area_struct *vma,
>> > +   unsigned long addr, pfn_t pfn)
>> > +{
>> > +   return vm_insert_mixed_mkwrite(vma, addr, pfn, false);
>> > +}
>>
>> ...in other words instead of making the distinction of
>> vm_insert_mixed_mkwrite() and vm_insert_mixed() with extra flag
>> argument just move the distinction into mm/memory.c directly.
>>
>> So, the prototype remains the same as vm_insert_mixed()
>>
>> int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long
>> addr, pfn_t pfn);
>>
>> ...and only static insert_pfn(...) needs to change.
>
> My usage of vm_insert_mixed_mkwrite() in fs/dax.c needs the mkwrite flag to be
> there.  From dax_insert_mapping():
>
> return vm_insert_mixed_mkwrite(vma, vaddr, pfn,
> vmf->flags & FAULT_FLAG_WRITE);

Ok, I missed that.

>
> So, yes, we could do what you suggest, but then that code becomes:
>
> if (vmf->flags & FAULT_FLAG_WRITE)
> vm_insert_mixed_mkwrite(vma, vaddr, pfn);
> else
> vm_insert_mixed(vma, vaddr, pfn);

I think that's more readable / greppable.

>
> And vm_insert_mixed_mkwrite() and vm_insert_mixed() are redundant with only
> the insert_pfn() line differing?  This doesn't seem better...unless I'm
> missing something?
>
> The way it is, vm_insert_mixed_mkwrite() also closely matches
> insert_pfn_pmd(), which we use in the PMD case and which also takes a 'write'
> boolean which works the same as our newly added 'mkwrite'.

Hmm, but now the pfn and pmd cases are inconsistent, if you put the
flag name in the function then don't add an argument, or make it like
the pmd case and add an argument to vm_insert_mixed(). I prefer the
former.

Re: [PATCH 1/3] mm: add vm_insert_mixed_mkwrite()

[Dan Williams]

On Fri, Jun 9, 2017 at 8:03 PM, Ross Zwisler
 wrote:
> On Fri, Jun 09, 2017 at 02:23:51PM -0700, Dan Williams wrote:
>> On Wed, Jun 7, 2017 at 1:48 PM, Ross Zwisler
>>  wrote:
>> > To be able to use the common 4k zero page in DAX we need to have our PTE
>> > fault path look more like our PMD fault path where a PTE entry can be
>> > marked as dirty and writeable as it is first inserted, rather than waiting
>> > for a follow-up dax_pfn_mkwrite() => finish_mkwrite_fault() call.
>> >
>> > Right now we can rely on having a dax_pfn_mkwrite() call because we can
>> > distinguish between these two cases in do_wp_page():
>> >
>> > case 1: 4k zero page => writable DAX storage
>> > case 2: read-only DAX storage => writeable DAX storage
>> >
>> > This distinction is made by via vm_normal_page().  vm_normal_page() returns
>> > false for the common 4k zero page, though, just as it does for DAX ptes.
>> > Instead of special casing the DAX + 4k zero page case, we will simplify our
>> > DAX PTE page fault sequence so that it matches our DAX PMD sequence, and
>> > get rid of dax_pfn_mkwrite() completely.
>> >
>> > This means that insert_pfn() needs to follow the lead of insert_pfn_pmd()
>> > and allow us to pass in a 'mkwrite' flag.  If 'mkwrite' is set insert_pfn()
>> > will do the work that was previously done by wp_page_reuse() as part of the
>> > dax_pfn_mkwrite() call path.
>> >
>> > Signed-off-by: Ross Zwisler 
>> > ---
>> >  include/linux/mm.h |  9 +++--
>> >  mm/memory.c| 21 ++---
>> >  2 files changed, 21 insertions(+), 9 deletions(-)
>> >
>> > diff --git a/include/linux/mm.h b/include/linux/mm.h
>> > index b892e95..11e323a 100644
>> > --- a/include/linux/mm.h
>> > +++ b/include/linux/mm.h
>> > @@ -2294,10 +2294,15 @@ int vm_insert_pfn(struct vm_area_struct *vma, 
>> > unsigned long addr,
>> > unsigned long pfn);
>> >  int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
>> > unsigned long pfn, pgprot_t pgprot);
>> > -int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
>> > -   pfn_t pfn);
>> > +int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long 
>> > addr,
>> > +   pfn_t pfn, bool mkwrite);
>>
>> Are there any other planned public users of vm_insert_mixed_mkwrite()
>> that would pass false? I think not.
>>
>> >  int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, 
>> > unsigned long len);
>> >
>> > +static inline int vm_insert_mixed(struct vm_area_struct *vma,
>> > +   unsigned long addr, pfn_t pfn)
>> > +{
>> > +   return vm_insert_mixed_mkwrite(vma, addr, pfn, false);
>> > +}
>>
>> ...in other words instead of making the distinction of
>> vm_insert_mixed_mkwrite() and vm_insert_mixed() with extra flag
>> argument just move the distinction into mm/memory.c directly.
>>
>> So, the prototype remains the same as vm_insert_mixed()
>>
>> int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long
>> addr, pfn_t pfn);
>>
>> ...and only static insert_pfn(...) needs to change.
>
> My usage of vm_insert_mixed_mkwrite() in fs/dax.c needs the mkwrite flag to be
> there.  From dax_insert_mapping():
>
> return vm_insert_mixed_mkwrite(vma, vaddr, pfn,
> vmf->flags & FAULT_FLAG_WRITE);

Ok, I missed that.

>
> So, yes, we could do what you suggest, but then that code becomes:
>
> if (vmf->flags & FAULT_FLAG_WRITE)
> vm_insert_mixed_mkwrite(vma, vaddr, pfn);
> else
> vm_insert_mixed(vma, vaddr, pfn);

I think that's more readable / greppable.

>
> And vm_insert_mixed_mkwrite() and vm_insert_mixed() are redundant with only
> the insert_pfn() line differing?  This doesn't seem better...unless I'm
> missing something?
>
> The way it is, vm_insert_mixed_mkwrite() also closely matches
> insert_pfn_pmd(), which we use in the PMD case and which also takes a 'write'
> boolean which works the same as our newly added 'mkwrite'.

Hmm, but now the pfn and pmd cases are inconsistent, if you put the
flag name in the function then don't add an argument, or make it like
the pmd case and add an argument to vm_insert_mixed(). I prefer the
former.

Re: [PATCH] clocksource: fix read and iounmap of incorrect variable

[Fu Wei]

Hi Frank,

On 10 June 2017 at 08:26,   wrote:
> From: Frank Rowand 
>
> Fix boot warning 'Trying to vfree() nonexistent vm area'
> from arch_timer_mem_of_init().
>
> Refactored code attempts to read and iounmap using address frame
> instead of address ioremap(frame->cntbase).
>
> Fixes: c389d701dfb70 ("clocksource: arm_arch_timer: split MMIO timer 
> probing.")
>
> Signed-off-by: Frank Rowand 

Reviewed-by: Fu Wei 

> ---
>
> WARNING: CPU: 0 PID: 0 at mm/vmalloc.c:1514 iounmap+0x14/0x18
> Trying to vfree() nonexistent vm area (ee821000)
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.12.0-rc1-dirty #1
> Hardware name: Generic DT based system
> [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
> [] (show_stack) from [] (dump_stack+0x6c/0x8c)
> [] (dump_stack) from [] (__warn+0xd0/0xf8)
> [] (__warn) from [] (warn_slowpath_fmt+0x38/0x48)
> [] (warn_slowpath_fmt) from [] (iounmap+0x14/0x18)
> [] (iounmap) from [] (arch_timer_mem_of_init+0x224/0x414)
> [] (arch_timer_mem_of_init) from [] 
> (clocksource_probe+0x44/0xa8)
> [] (clocksource_probe) from [] (start_kernel+0x228/0x3a0)
> [] (start_kernel) from [<0020807c>] (0x20807c)
>
>  drivers/clocksource/arm_arch_timer.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c 
> b/drivers/clocksource/arm_arch_timer.c
> index 4bed671e490e..8b5c30062d99 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -1209,9 +1209,9 @@ static int __init arch_timer_of_init(struct device_node 
> *np)
> return 0;
> }
>
> -   rate = readl_relaxed(frame + CNTFRQ);
> +   rate = readl_relaxed(base + CNTFRQ);
>
> -   iounmap(frame);
> +   iounmap(base);

Great thanks for your patch, this is a bug. So sorry for this typo.
It happened in my last v24 patchset: https://lkml.org/lkml/2017/4/14/363

Hope this fix can be merged ASAP.

>
> return rate;
>  }
> --
> Frank Rowand 
>



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH] clocksource: fix read and iounmap of incorrect variable

[Fu Wei]

Hi Frank,

On 10 June 2017 at 08:26,   wrote:
> From: Frank Rowand 
>
> Fix boot warning 'Trying to vfree() nonexistent vm area'
> from arch_timer_mem_of_init().
>
> Refactored code attempts to read and iounmap using address frame
> instead of address ioremap(frame->cntbase).
>
> Fixes: c389d701dfb70 ("clocksource: arm_arch_timer: split MMIO timer 
> probing.")
>
> Signed-off-by: Frank Rowand 

Reviewed-by: Fu Wei 

> ---
>
> WARNING: CPU: 0 PID: 0 at mm/vmalloc.c:1514 iounmap+0x14/0x18
> Trying to vfree() nonexistent vm area (ee821000)
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.12.0-rc1-dirty #1
> Hardware name: Generic DT based system
> [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
> [] (show_stack) from [] (dump_stack+0x6c/0x8c)
> [] (dump_stack) from [] (__warn+0xd0/0xf8)
> [] (__warn) from [] (warn_slowpath_fmt+0x38/0x48)
> [] (warn_slowpath_fmt) from [] (iounmap+0x14/0x18)
> [] (iounmap) from [] (arch_timer_mem_of_init+0x224/0x414)
> [] (arch_timer_mem_of_init) from [] 
> (clocksource_probe+0x44/0xa8)
> [] (clocksource_probe) from [] (start_kernel+0x228/0x3a0)
> [] (start_kernel) from [<0020807c>] (0x20807c)
>
>  drivers/clocksource/arm_arch_timer.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c 
> b/drivers/clocksource/arm_arch_timer.c
> index 4bed671e490e..8b5c30062d99 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -1209,9 +1209,9 @@ static int __init arch_timer_of_init(struct device_node 
> *np)
> return 0;
> }
>
> -   rate = readl_relaxed(frame + CNTFRQ);
> +   rate = readl_relaxed(base + CNTFRQ);
>
> -   iounmap(frame);
> +   iounmap(base);

Great thanks for your patch, this is a bug. So sorry for this typo.
It happened in my last v24 patchset: https://lkml.org/lkml/2017/4/14/363

Hope this fix can be merged ASAP.

>
> return rate;
>  }
> --
> Frank Rowand 
>



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat

Re: [PATCH] [media] media-ioc-g-topology.rst: fix typos

[Alexandre Courbot]

On Fri, Jun 9, 2017 at 2:51 AM, Mauro Carvalho Chehab
 wrote:
> Em Wed,  7 Jun 2017 18:33:02 +0900
> Alexandre Courbot  escreveu:
>
>> Fix what seems to be a few typos induced by copy/paste.
>>
>> Signed-off-by: Alexandre Courbot 
>> ---
>>  Documentation/media/uapi/mediactl/media-ioc-g-topology.rst | 8 
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst 
>> b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> index 48c9531f4db0..5f2d82756033 100644
>> --- a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> +++ b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> @@ -241,7 +241,7 @@ desired arrays with the media graph elements.
>>
>>  .. c:type:: media_v2_intf_devnode
>>
>> -.. flat-table:: struct media_v2_interface
>> +.. flat-table:: struct media_v2_devnode
>>  :header-rows:  0
>>  :stub-columns: 0
>>  :widths: 1 2 8
>
> Actually the fix is wrong here :-)

Whoopsie. Apologies for not double-checking. >_<

>
> I'll just fold the following diff to your patch:
>
> diff --git a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst 
> b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> index 5f2d82756033..add8281494f8 100644
> --- a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> +++ b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> @@ -241,7 +241,7 @@ desired arrays with the media graph elements.
>
>  .. c:type:: media_v2_intf_devnode
>
> -.. flat-table:: struct media_v2_devnode
> +.. flat-table:: struct media_v2_intf_devnode
>  :header-rows:  0
>  :stub-columns: 0
>  :widths: 1 2 8

Looks perfect now. Thanks for catching this!

Re: [PATCH] [media] media-ioc-g-topology.rst: fix typos

[Alexandre Courbot]

On Fri, Jun 9, 2017 at 2:51 AM, Mauro Carvalho Chehab
 wrote:
> Em Wed,  7 Jun 2017 18:33:02 +0900
> Alexandre Courbot  escreveu:
>
>> Fix what seems to be a few typos induced by copy/paste.
>>
>> Signed-off-by: Alexandre Courbot 
>> ---
>>  Documentation/media/uapi/mediactl/media-ioc-g-topology.rst | 8 
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst 
>> b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> index 48c9531f4db0..5f2d82756033 100644
>> --- a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> +++ b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
>> @@ -241,7 +241,7 @@ desired arrays with the media graph elements.
>>
>>  .. c:type:: media_v2_intf_devnode
>>
>> -.. flat-table:: struct media_v2_interface
>> +.. flat-table:: struct media_v2_devnode
>>  :header-rows:  0
>>  :stub-columns: 0
>>  :widths: 1 2 8
>
> Actually the fix is wrong here :-)

Whoopsie. Apologies for not double-checking. >_<

>
> I'll just fold the following diff to your patch:
>
> diff --git a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst 
> b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> index 5f2d82756033..add8281494f8 100644
> --- a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> +++ b/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst
> @@ -241,7 +241,7 @@ desired arrays with the media graph elements.
>
>  .. c:type:: media_v2_intf_devnode
>
> -.. flat-table:: struct media_v2_devnode
> +.. flat-table:: struct media_v2_intf_devnode
>  :header-rows:  0
>  :stub-columns: 0
>  :widths: 1 2 8

Looks perfect now. Thanks for catching this!

Re: [PATCH 1/3] mm: add vm_insert_mixed_mkwrite()

[Ross Zwisler]

On Fri, Jun 09, 2017 at 02:23:51PM -0700, Dan Williams wrote:
> On Wed, Jun 7, 2017 at 1:48 PM, Ross Zwisler
>  wrote:
> > To be able to use the common 4k zero page in DAX we need to have our PTE
> > fault path look more like our PMD fault path where a PTE entry can be
> > marked as dirty and writeable as it is first inserted, rather than waiting
> > for a follow-up dax_pfn_mkwrite() => finish_mkwrite_fault() call.
> >
> > Right now we can rely on having a dax_pfn_mkwrite() call because we can
> > distinguish between these two cases in do_wp_page():
> >
> > case 1: 4k zero page => writable DAX storage
> > case 2: read-only DAX storage => writeable DAX storage
> >
> > This distinction is made by via vm_normal_page().  vm_normal_page() returns
> > false for the common 4k zero page, though, just as it does for DAX ptes.
> > Instead of special casing the DAX + 4k zero page case, we will simplify our
> > DAX PTE page fault sequence so that it matches our DAX PMD sequence, and
> > get rid of dax_pfn_mkwrite() completely.
> >
> > This means that insert_pfn() needs to follow the lead of insert_pfn_pmd()
> > and allow us to pass in a 'mkwrite' flag.  If 'mkwrite' is set insert_pfn()
> > will do the work that was previously done by wp_page_reuse() as part of the
> > dax_pfn_mkwrite() call path.
> >
> > Signed-off-by: Ross Zwisler 
> > ---
> >  include/linux/mm.h |  9 +++--
> >  mm/memory.c| 21 ++---
> >  2 files changed, 21 insertions(+), 9 deletions(-)
> >
> > diff --git a/include/linux/mm.h b/include/linux/mm.h
> > index b892e95..11e323a 100644
> > --- a/include/linux/mm.h
> > +++ b/include/linux/mm.h
> > @@ -2294,10 +2294,15 @@ int vm_insert_pfn(struct vm_area_struct *vma, 
> > unsigned long addr,
> > unsigned long pfn);
> >  int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
> > unsigned long pfn, pgprot_t pgprot);
> > -int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
> > -   pfn_t pfn);
> > +int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long addr,
> > +   pfn_t pfn, bool mkwrite);
> 
> Are there any other planned public users of vm_insert_mixed_mkwrite()
> that would pass false? I think not.
> 
> >  int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, 
> > unsigned long len);
> >
> > +static inline int vm_insert_mixed(struct vm_area_struct *vma,
> > +   unsigned long addr, pfn_t pfn)
> > +{
> > +   return vm_insert_mixed_mkwrite(vma, addr, pfn, false);
> > +}
> 
> ...in other words instead of making the distinction of
> vm_insert_mixed_mkwrite() and vm_insert_mixed() with extra flag
> argument just move the distinction into mm/memory.c directly.
> 
> So, the prototype remains the same as vm_insert_mixed()
> 
> int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long
> addr, pfn_t pfn);
> 
> ...and only static insert_pfn(...) needs to change.

My usage of vm_insert_mixed_mkwrite() in fs/dax.c needs the mkwrite flag to be
there.  From dax_insert_mapping():

return vm_insert_mixed_mkwrite(vma, vaddr, pfn,
vmf->flags & FAULT_FLAG_WRITE);

So, yes, we could do what you suggest, but then that code becomes:

if (vmf->flags & FAULT_FLAG_WRITE)
vm_insert_mixed_mkwrite(vma, vaddr, pfn);
else
vm_insert_mixed(vma, vaddr, pfn);

And vm_insert_mixed_mkwrite() and vm_insert_mixed() are redundant with only
the insert_pfn() line differing?  This doesn't seem better...unless I'm
missing something?

The way it is, vm_insert_mixed_mkwrite() also closely matches
insert_pfn_pmd(), which we use in the PMD case and which also takes a 'write'
boolean which works the same as our newly added 'mkwrite'.

Re: [PATCH 1/3] mm: add vm_insert_mixed_mkwrite()

[Ross Zwisler]

On Fri, Jun 09, 2017 at 02:23:51PM -0700, Dan Williams wrote:
> On Wed, Jun 7, 2017 at 1:48 PM, Ross Zwisler
>  wrote:
> > To be able to use the common 4k zero page in DAX we need to have our PTE
> > fault path look more like our PMD fault path where a PTE entry can be
> > marked as dirty and writeable as it is first inserted, rather than waiting
> > for a follow-up dax_pfn_mkwrite() => finish_mkwrite_fault() call.
> >
> > Right now we can rely on having a dax_pfn_mkwrite() call because we can
> > distinguish between these two cases in do_wp_page():
> >
> > case 1: 4k zero page => writable DAX storage
> > case 2: read-only DAX storage => writeable DAX storage
> >
> > This distinction is made by via vm_normal_page().  vm_normal_page() returns
> > false for the common 4k zero page, though, just as it does for DAX ptes.
> > Instead of special casing the DAX + 4k zero page case, we will simplify our
> > DAX PTE page fault sequence so that it matches our DAX PMD sequence, and
> > get rid of dax_pfn_mkwrite() completely.
> >
> > This means that insert_pfn() needs to follow the lead of insert_pfn_pmd()
> > and allow us to pass in a 'mkwrite' flag.  If 'mkwrite' is set insert_pfn()
> > will do the work that was previously done by wp_page_reuse() as part of the
> > dax_pfn_mkwrite() call path.
> >
> > Signed-off-by: Ross Zwisler 
> > ---
> >  include/linux/mm.h |  9 +++--
> >  mm/memory.c| 21 ++---
> >  2 files changed, 21 insertions(+), 9 deletions(-)
> >
> > diff --git a/include/linux/mm.h b/include/linux/mm.h
> > index b892e95..11e323a 100644
> > --- a/include/linux/mm.h
> > +++ b/include/linux/mm.h
> > @@ -2294,10 +2294,15 @@ int vm_insert_pfn(struct vm_area_struct *vma, 
> > unsigned long addr,
> > unsigned long pfn);
> >  int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
> > unsigned long pfn, pgprot_t pgprot);
> > -int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
> > -   pfn_t pfn);
> > +int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long addr,
> > +   pfn_t pfn, bool mkwrite);
> 
> Are there any other planned public users of vm_insert_mixed_mkwrite()
> that would pass false? I think not.
> 
> >  int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, 
> > unsigned long len);
> >
> > +static inline int vm_insert_mixed(struct vm_area_struct *vma,
> > +   unsigned long addr, pfn_t pfn)
> > +{
> > +   return vm_insert_mixed_mkwrite(vma, addr, pfn, false);
> > +}
> 
> ...in other words instead of making the distinction of
> vm_insert_mixed_mkwrite() and vm_insert_mixed() with extra flag
> argument just move the distinction into mm/memory.c directly.
> 
> So, the prototype remains the same as vm_insert_mixed()
> 
> int vm_insert_mixed_mkwrite(struct vm_area_struct *vma, unsigned long
> addr, pfn_t pfn);
> 
> ...and only static insert_pfn(...) needs to change.

My usage of vm_insert_mixed_mkwrite() in fs/dax.c needs the mkwrite flag to be
there.  From dax_insert_mapping():

return vm_insert_mixed_mkwrite(vma, vaddr, pfn,
vmf->flags & FAULT_FLAG_WRITE);

So, yes, we could do what you suggest, but then that code becomes:

if (vmf->flags & FAULT_FLAG_WRITE)
vm_insert_mixed_mkwrite(vma, vaddr, pfn);
else
vm_insert_mixed(vma, vaddr, pfn);

And vm_insert_mixed_mkwrite() and vm_insert_mixed() are redundant with only
the insert_pfn() line differing?  This doesn't seem better...unless I'm
missing something?

The way it is, vm_insert_mixed_mkwrite() also closely matches
insert_pfn_pmd(), which we use in the PMD case and which also takes a 'write'
boolean which works the same as our newly added 'mkwrite'.

[PATCH 0/6] Constant Time Memory Comparisons Are Important

[Jason A. Donenfeld]

Whenever you're comparing two MACs, it's important to do this using
crypto_memneq instead of memcmp. With memcmp, you leak timing information,
which could then be used to iteratively forge a MAC. This is far too basic
of a mistake for us to have so pervasively in the year 2017, so let's begin
cleaning this stuff up. The following 6 locations were found with some
simple regex greps, but I'm sure more lurk below the surface. If you
maintain some code or know somebody who maintains some code that deals
with MACs, tell them to double check which comparison function they're
using.

Jason A. Donenfeld (6):
  sunrpc: use constant time memory comparison for mac
  net/ipv6: use constant time memory comparison for mac
  ccree: use constant time memory comparison for macs and tags
  security/keys: use constant time memory comparison for macs
  bluetooth/smp: use constant time memory comparison for secret values
  mac80211/wpa: use constant time memory comparison for MACs

Cc: Anna Schumaker 
Cc: David Howells 
Cc: David Safford 
Cc: "David S. Miller" 
Cc: Gilad Ben-Yossef 
Cc: Greg Kroah-Hartman 
Cc: Gustavo Padovan 
Cc: "J. Bruce Fields" 
Cc: Jeff Layton 
Cc: Johan Hedberg 
Cc: Johannes Berg 
Cc: Marcel Holtmann 
Cc: Mimi Zohar 
Cc: Trond Myklebust 
Cc: keyri...@vger.kernel.org
Cc: linux-blueto...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-wirel...@vger.kernel.org
Cc: net...@vger.kernel.org

 drivers/staging/ccree/ssi_fips_ll.c   | 17 ---
 net/bluetooth/smp.c   | 39 ++-
 net/ipv6/seg6_hmac.c  |  3 ++-
 net/mac80211/wpa.c|  9 
 net/sunrpc/auth_gss/gss_krb5_crypto.c |  3 ++-
 security/keys/trusted.c   |  7 ---
 6 files changed, 42 insertions(+), 36 deletions(-)

-- 
2.13.1

[PATCH 0/6] Constant Time Memory Comparisons Are Important

[Jason A. Donenfeld]

Whenever you're comparing two MACs, it's important to do this using
crypto_memneq instead of memcmp. With memcmp, you leak timing information,
which could then be used to iteratively forge a MAC. This is far too basic
of a mistake for us to have so pervasively in the year 2017, so let's begin
cleaning this stuff up. The following 6 locations were found with some
simple regex greps, but I'm sure more lurk below the surface. If you
maintain some code or know somebody who maintains some code that deals
with MACs, tell them to double check which comparison function they're
using.

Jason A. Donenfeld (6):
  sunrpc: use constant time memory comparison for mac
  net/ipv6: use constant time memory comparison for mac
  ccree: use constant time memory comparison for macs and tags
  security/keys: use constant time memory comparison for macs
  bluetooth/smp: use constant time memory comparison for secret values
  mac80211/wpa: use constant time memory comparison for MACs

Cc: Anna Schumaker 
Cc: David Howells 
Cc: David Safford 
Cc: "David S. Miller" 
Cc: Gilad Ben-Yossef 
Cc: Greg Kroah-Hartman 
Cc: Gustavo Padovan 
Cc: "J. Bruce Fields" 
Cc: Jeff Layton 
Cc: Johan Hedberg 
Cc: Johannes Berg 
Cc: Marcel Holtmann 
Cc: Mimi Zohar 
Cc: Trond Myklebust 
Cc: keyri...@vger.kernel.org
Cc: linux-blueto...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-wirel...@vger.kernel.org
Cc: net...@vger.kernel.org

 drivers/staging/ccree/ssi_fips_ll.c   | 17 ---
 net/bluetooth/smp.c   | 39 ++-
 net/ipv6/seg6_hmac.c  |  3 ++-
 net/mac80211/wpa.c|  9 
 net/sunrpc/auth_gss/gss_krb5_crypto.c |  3 ++-
 security/keys/trusted.c   |  7 ---
 6 files changed, 42 insertions(+), 36 deletions(-)

-- 
2.13.1

[PATCH 2/6] net/ipv6: use constant time memory comparison for mac

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: "David S. Miller" 
Cc: net...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/ipv6/seg6_hmac.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/ipv6/seg6_hmac.c b/net/ipv6/seg6_hmac.c
index f950cb53d5e3..54213c83b44e 100644
--- a/net/ipv6/seg6_hmac.c
+++ b/net/ipv6/seg6_hmac.c
@@ -38,6 +38,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -274,7 +275,7 @@ bool seg6_hmac_validate_skb(struct sk_buff *skb)
if (seg6_hmac_compute(hinfo, srh, _hdr(skb)->saddr, hmac_output))
return false;
 
-   if (memcmp(hmac_output, tlv->hmac, SEG6_HMAC_FIELD_LEN) != 0)
+   if (crypto_memneq(hmac_output, tlv->hmac, SEG6_HMAC_FIELD_LEN))
return false;
 
return true;
-- 
2.13.1

[PATCH 2/6] net/ipv6: use constant time memory comparison for mac

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: "David S. Miller" 
Cc: net...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/ipv6/seg6_hmac.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/ipv6/seg6_hmac.c b/net/ipv6/seg6_hmac.c
index f950cb53d5e3..54213c83b44e 100644
--- a/net/ipv6/seg6_hmac.c
+++ b/net/ipv6/seg6_hmac.c
@@ -38,6 +38,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -274,7 +275,7 @@ bool seg6_hmac_validate_skb(struct sk_buff *skb)
if (seg6_hmac_compute(hinfo, srh, _hdr(skb)->saddr, hmac_output))
return false;
 
-   if (memcmp(hmac_output, tlv->hmac, SEG6_HMAC_FIELD_LEN) != 0)
+   if (crypto_memneq(hmac_output, tlv->hmac, SEG6_HMAC_FIELD_LEN))
return false;
 
return true;
-- 
2.13.1

[PATCH 1/6] sunrpc: use constant time memory comparison for mac

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: "J. Bruce Fields" 
Cc: Jeff Layton 
Cc: Trond Myklebust 
Cc: Anna Schumaker 
Cc: linux-...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/sunrpc/auth_gss/gss_krb5_crypto.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/sunrpc/auth_gss/gss_krb5_crypto.c 
b/net/sunrpc/auth_gss/gss_krb5_crypto.c
index fb39284ec174..12649c9fedab 100644
--- a/net/sunrpc/auth_gss/gss_krb5_crypto.c
+++ b/net/sunrpc/auth_gss/gss_krb5_crypto.c
@@ -34,6 +34,7 @@
  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -927,7 +928,7 @@ gss_krb5_aes_decrypt(struct krb5_ctx *kctx, u32 offset, 
struct xdr_buf *buf,
if (ret)
goto out_err;
 
-   if (memcmp(pkt_hmac, our_hmac, kctx->gk5e->cksumlength) != 0) {
+   if (crypto_memneq(pkt_hmac, our_hmac, kctx->gk5e->cksumlength) != 0) {
ret = GSS_S_BAD_SIG;
goto out_err;
}
-- 
2.13.1

[PATCH 5/6] bluetooth/smp: use constant time memory comparison for secret values

[Jason A. Donenfeld]

This file is filled with complex cryptography. Thus, the comparisons of
MACs and secret keys and curve points and so forth should not add timing
attacks, which could either result in a direct forgery, or, given the
complexity, some other type of attack.

Signed-off-by: Jason A. Donenfeld 
Cc: Marcel Holtmann 
Cc: Gustavo Padovan 
Cc: Johan Hedberg 
Cc: linux-blueto...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/bluetooth/smp.c | 39 ---
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 14585edc9439..a0ef89772c36 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -523,7 +524,7 @@ bool smp_irk_matches(struct hci_dev *hdev, const u8 irk[16],
if (err)
return false;
 
-   return !memcmp(bdaddr->b, hash, 3);
+   return !crypto_memneq(bdaddr->b, hash, 3);
 }
 
 int smp_generate_rpa(struct hci_dev *hdev, const u8 irk[16], bdaddr_t *rpa)
@@ -579,7 +580,7 @@ int smp_generate_oob(struct hci_dev *hdev, u8 hash[16], u8 
rand[16])
/* This is unlikely, but we need to check that
 * we didn't accidentially generate a debug key.
 */
-   if (memcmp(smp->local_sk, debug_sk, 32))
+   if (crypto_memneq(smp->local_sk, debug_sk, 32))
break;
}
smp->debug_key = false;
@@ -993,7 +994,7 @@ static u8 smp_random(struct smp_chan *smp)
if (ret)
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, confirm, sizeof(smp->pcnf)) != 0) {
+   if (crypto_memneq(smp->pcnf, confirm, sizeof(smp->pcnf))) {
BT_ERR("Pairing failed (confirmation values mismatch)");
return SMP_CONFIRM_FAILED;
}
@@ -1512,7 +1513,7 @@ static u8 sc_passkey_round(struct smp_chan *smp, u8 
smp_op)
   smp->rrnd, r, cfm))
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, cfm, 16))
+   if (crypto_memneq(smp->pcnf, cfm, 16))
return SMP_CONFIRM_FAILED;
 
smp->passkey_round++;
@@ -1908,7 +1909,7 @@ static u8 sc_send_public_key(struct smp_chan *smp)
/* This is unlikely, but we need to check that
 * we didn't accidentially generate a debug key.
 */
-   if (memcmp(smp->local_sk, debug_sk, 32))
+   if (crypto_memneq(smp->local_sk, debug_sk, 32))
break;
}
}
@@ -2176,7 +2177,7 @@ static u8 smp_cmd_pairing_random(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, cfm, 16))
+   if (crypto_memneq(smp->pcnf, cfm, 16))
return SMP_CONFIRM_FAILED;
} else {
smp_send_cmd(conn, SMP_CMD_PAIRING_RANDOM, sizeof(smp->prnd),
@@ -2660,7 +2661,7 @@ static int smp_cmd_public_key(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(cfm.confirm_val, smp->pcnf, 16))
+   if (crypto_memneq(cfm.confirm_val, smp->pcnf, 16))
return SMP_CONFIRM_FAILED;
}
 
@@ -2693,7 +2694,7 @@ static int smp_cmd_public_key(struct l2cap_conn *conn, 
struct sk_buff *skb)
else
hcon->pending_sec_level = BT_SECURITY_FIPS;
 
-   if (!memcmp(debug_pk, smp->remote_pk, 64))
+   if (!crypto_memneq(debug_pk, smp->remote_pk, 64))
set_bit(SMP_FLAG_DEBUG_KEY, >flags);
 
if (smp->method == DSP_PASSKEY) {
@@ -2792,7 +2793,7 @@ static int smp_cmd_dhkey_check(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(check->e, e, 16))
+   if (crypto_memneq(check->e, e, 16))
return SMP_DHKEY_CHECK_FAILED;
 
if (!hcon->out) {
@@ -3506,10 +3507,10 @@ static int __init test_debug_key(void)
if (!generate_ecdh_keys(pk, sk))
return -EINVAL;
 
-   if (memcmp(sk, debug_sk, 32))
+   if (crypto_memneq(sk, debug_sk, 32))
return -EINVAL;
 
-   if (memcmp(pk, debug_pk, 64))
+   if (crypto_memneq(pk, debug_pk, 64))
return -EINVAL;
 
return 0;
@@ -3529,7 +3530,7 @@ static int __init test_ah(struct crypto_cipher *tfm_aes)
if (err)
return err;
 
-   if (memcmp(res, exp, 3))
+   if (crypto_memneq(res, exp, 3))
return -EINVAL;
 
return 0;
@@ -3559,7 

[PATCH 1/6] sunrpc: use constant time memory comparison for mac

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: "J. Bruce Fields" 
Cc: Jeff Layton 
Cc: Trond Myklebust 
Cc: Anna Schumaker 
Cc: linux-...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/sunrpc/auth_gss/gss_krb5_crypto.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/sunrpc/auth_gss/gss_krb5_crypto.c 
b/net/sunrpc/auth_gss/gss_krb5_crypto.c
index fb39284ec174..12649c9fedab 100644
--- a/net/sunrpc/auth_gss/gss_krb5_crypto.c
+++ b/net/sunrpc/auth_gss/gss_krb5_crypto.c
@@ -34,6 +34,7 @@
  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -927,7 +928,7 @@ gss_krb5_aes_decrypt(struct krb5_ctx *kctx, u32 offset, 
struct xdr_buf *buf,
if (ret)
goto out_err;
 
-   if (memcmp(pkt_hmac, our_hmac, kctx->gk5e->cksumlength) != 0) {
+   if (crypto_memneq(pkt_hmac, our_hmac, kctx->gk5e->cksumlength) != 0) {
ret = GSS_S_BAD_SIG;
goto out_err;
}
-- 
2.13.1

[PATCH 5/6] bluetooth/smp: use constant time memory comparison for secret values

[Jason A. Donenfeld]

This file is filled with complex cryptography. Thus, the comparisons of
MACs and secret keys and curve points and so forth should not add timing
attacks, which could either result in a direct forgery, or, given the
complexity, some other type of attack.

Signed-off-by: Jason A. Donenfeld 
Cc: Marcel Holtmann 
Cc: Gustavo Padovan 
Cc: Johan Hedberg 
Cc: linux-blueto...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/bluetooth/smp.c | 39 ---
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 14585edc9439..a0ef89772c36 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -523,7 +524,7 @@ bool smp_irk_matches(struct hci_dev *hdev, const u8 irk[16],
if (err)
return false;
 
-   return !memcmp(bdaddr->b, hash, 3);
+   return !crypto_memneq(bdaddr->b, hash, 3);
 }
 
 int smp_generate_rpa(struct hci_dev *hdev, const u8 irk[16], bdaddr_t *rpa)
@@ -579,7 +580,7 @@ int smp_generate_oob(struct hci_dev *hdev, u8 hash[16], u8 
rand[16])
/* This is unlikely, but we need to check that
 * we didn't accidentially generate a debug key.
 */
-   if (memcmp(smp->local_sk, debug_sk, 32))
+   if (crypto_memneq(smp->local_sk, debug_sk, 32))
break;
}
smp->debug_key = false;
@@ -993,7 +994,7 @@ static u8 smp_random(struct smp_chan *smp)
if (ret)
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, confirm, sizeof(smp->pcnf)) != 0) {
+   if (crypto_memneq(smp->pcnf, confirm, sizeof(smp->pcnf))) {
BT_ERR("Pairing failed (confirmation values mismatch)");
return SMP_CONFIRM_FAILED;
}
@@ -1512,7 +1513,7 @@ static u8 sc_passkey_round(struct smp_chan *smp, u8 
smp_op)
   smp->rrnd, r, cfm))
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, cfm, 16))
+   if (crypto_memneq(smp->pcnf, cfm, 16))
return SMP_CONFIRM_FAILED;
 
smp->passkey_round++;
@@ -1908,7 +1909,7 @@ static u8 sc_send_public_key(struct smp_chan *smp)
/* This is unlikely, but we need to check that
 * we didn't accidentially generate a debug key.
 */
-   if (memcmp(smp->local_sk, debug_sk, 32))
+   if (crypto_memneq(smp->local_sk, debug_sk, 32))
break;
}
}
@@ -2176,7 +2177,7 @@ static u8 smp_cmd_pairing_random(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(smp->pcnf, cfm, 16))
+   if (crypto_memneq(smp->pcnf, cfm, 16))
return SMP_CONFIRM_FAILED;
} else {
smp_send_cmd(conn, SMP_CMD_PAIRING_RANDOM, sizeof(smp->prnd),
@@ -2660,7 +2661,7 @@ static int smp_cmd_public_key(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(cfm.confirm_val, smp->pcnf, 16))
+   if (crypto_memneq(cfm.confirm_val, smp->pcnf, 16))
return SMP_CONFIRM_FAILED;
}
 
@@ -2693,7 +2694,7 @@ static int smp_cmd_public_key(struct l2cap_conn *conn, 
struct sk_buff *skb)
else
hcon->pending_sec_level = BT_SECURITY_FIPS;
 
-   if (!memcmp(debug_pk, smp->remote_pk, 64))
+   if (!crypto_memneq(debug_pk, smp->remote_pk, 64))
set_bit(SMP_FLAG_DEBUG_KEY, >flags);
 
if (smp->method == DSP_PASSKEY) {
@@ -2792,7 +2793,7 @@ static int smp_cmd_dhkey_check(struct l2cap_conn *conn, 
struct sk_buff *skb)
if (err)
return SMP_UNSPECIFIED;
 
-   if (memcmp(check->e, e, 16))
+   if (crypto_memneq(check->e, e, 16))
return SMP_DHKEY_CHECK_FAILED;
 
if (!hcon->out) {
@@ -3506,10 +3507,10 @@ static int __init test_debug_key(void)
if (!generate_ecdh_keys(pk, sk))
return -EINVAL;
 
-   if (memcmp(sk, debug_sk, 32))
+   if (crypto_memneq(sk, debug_sk, 32))
return -EINVAL;
 
-   if (memcmp(pk, debug_pk, 64))
+   if (crypto_memneq(pk, debug_pk, 64))
return -EINVAL;
 
return 0;
@@ -3529,7 +3530,7 @@ static int __init test_ah(struct crypto_cipher *tfm_aes)
if (err)
return err;
 
-   if (memcmp(res, exp, 3))
+   if (crypto_memneq(res, exp, 3))
return -EINVAL;
 
return 0;
@@ -3559,7 +3560,7 @@ static int __init test_c1(struct crypto_cipher *tfm_aes)
if (err)

[PATCH 6/6] mac80211/wpa: use constant time memory comparison for MACs

[Jason A. Donenfeld]

Otherwise, we enable all sorts of forgeries via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: Johannes Berg 
Cc: linux-wirel...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/mac80211/wpa.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/net/mac80211/wpa.c b/net/mac80211/wpa.c
index c1ef22df865f..cc19614ff4e6 100644
--- a/net/mac80211/wpa.c
+++ b/net/mac80211/wpa.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ieee80211_i.h"
 #include "michael.h"
@@ -153,7 +154,7 @@ ieee80211_rx_h_michael_mic_verify(struct ieee80211_rx_data 
*rx)
data_len = skb->len - hdrlen - MICHAEL_MIC_LEN;
key = >key->conf.key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
michael_mic(key, hdr, data, data_len, mic);
-   if (memcmp(mic, data + data_len, MICHAEL_MIC_LEN) != 0)
+   if (crypto_memneq(mic, data + data_len, MICHAEL_MIC_LEN))
goto mic_fail;
 
/* remove Michael MIC from payload */
@@ -1048,7 +1049,7 @@ ieee80211_crypto_aes_cmac_decrypt(struct 
ieee80211_rx_data *rx)
bip_aad(skb, aad);
ieee80211_aes_cmac(key->u.aes_cmac.tfm, aad,
   skb->data + 24, skb->len - 24, mic);
-   if (memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   if (crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_cmac.icverrors++;
return RX_DROP_UNUSABLE;
}
@@ -1098,7 +1099,7 @@ ieee80211_crypto_aes_cmac_256_decrypt(struct 
ieee80211_rx_data *rx)
bip_aad(skb, aad);
ieee80211_aes_cmac_256(key->u.aes_cmac.tfm, aad,
   skb->data + 24, skb->len - 24, mic);
-   if (memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   if (crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_cmac.icverrors++;
return RX_DROP_UNUSABLE;
}
@@ -1202,7 +1203,7 @@ ieee80211_crypto_aes_gmac_decrypt(struct 
ieee80211_rx_data *rx)
if (ieee80211_aes_gmac(key->u.aes_gmac.tfm, aad, nonce,
   skb->data + 24, skb->len - 24,
   mic) < 0 ||
-   memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_gmac.icverrors++;
return RX_DROP_UNUSABLE;
}
-- 
2.13.1

[PATCH 6/6] mac80211/wpa: use constant time memory comparison for MACs

[Jason A. Donenfeld]

Otherwise, we enable all sorts of forgeries via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: Johannes Berg 
Cc: linux-wirel...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 net/mac80211/wpa.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/net/mac80211/wpa.c b/net/mac80211/wpa.c
index c1ef22df865f..cc19614ff4e6 100644
--- a/net/mac80211/wpa.c
+++ b/net/mac80211/wpa.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ieee80211_i.h"
 #include "michael.h"
@@ -153,7 +154,7 @@ ieee80211_rx_h_michael_mic_verify(struct ieee80211_rx_data 
*rx)
data_len = skb->len - hdrlen - MICHAEL_MIC_LEN;
key = >key->conf.key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
michael_mic(key, hdr, data, data_len, mic);
-   if (memcmp(mic, data + data_len, MICHAEL_MIC_LEN) != 0)
+   if (crypto_memneq(mic, data + data_len, MICHAEL_MIC_LEN))
goto mic_fail;
 
/* remove Michael MIC from payload */
@@ -1048,7 +1049,7 @@ ieee80211_crypto_aes_cmac_decrypt(struct 
ieee80211_rx_data *rx)
bip_aad(skb, aad);
ieee80211_aes_cmac(key->u.aes_cmac.tfm, aad,
   skb->data + 24, skb->len - 24, mic);
-   if (memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   if (crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_cmac.icverrors++;
return RX_DROP_UNUSABLE;
}
@@ -1098,7 +1099,7 @@ ieee80211_crypto_aes_cmac_256_decrypt(struct 
ieee80211_rx_data *rx)
bip_aad(skb, aad);
ieee80211_aes_cmac_256(key->u.aes_cmac.tfm, aad,
   skb->data + 24, skb->len - 24, mic);
-   if (memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   if (crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_cmac.icverrors++;
return RX_DROP_UNUSABLE;
}
@@ -1202,7 +1203,7 @@ ieee80211_crypto_aes_gmac_decrypt(struct 
ieee80211_rx_data *rx)
if (ieee80211_aes_gmac(key->u.aes_gmac.tfm, aad, nonce,
   skb->data + 24, skb->len - 24,
   mic) < 0 ||
-   memcmp(mic, mmie->mic, sizeof(mmie->mic)) != 0) {
+   crypto_memneq(mic, mmie->mic, sizeof(mmie->mic))) {
key->u.aes_gmac.icverrors++;
return RX_DROP_UNUSABLE;
}
-- 
2.13.1

[PATCH 4/6] security/keys: use constant time memory comparison for macs

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: David Safford 
Cc: Mimi Zohar 
Cc: David Howells 
Cc: keyri...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 security/keys/trusted.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/security/keys/trusted.c b/security/keys/trusted.c
index 2ae31c5a87de..df7d30b0a6f7 100644
--- a/security/keys/trusted.c
+++ b/security/keys/trusted.c
@@ -11,6 +11,7 @@
  * See Documentation/security/keys-trusted-encrypted.txt
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -243,7 +244,7 @@ static int TSS_checkhmac1(unsigned char *buffer,
if (ret < 0)
goto out;
 
-   if (memcmp(testhmac, authdata, SHA1_DIGEST_SIZE))
+   if (crypto_memneq(testhmac, authdata, SHA1_DIGEST_SIZE))
ret = -EINVAL;
 out:
kfree(sdesc);
@@ -335,7 +336,7 @@ static int TSS_checkhmac2(unsigned char *buffer,
  TPM_NONCE_SIZE, ononce, 1, continueflag1, 0, 0);
if (ret < 0)
goto out;
-   if (memcmp(testhmac1, authdata1, SHA1_DIGEST_SIZE)) {
+   if (crypto_memneq(testhmac1, authdata1, SHA1_DIGEST_SIZE)) {
ret = -EINVAL;
goto out;
}
@@ -344,7 +345,7 @@ static int TSS_checkhmac2(unsigned char *buffer,
  TPM_NONCE_SIZE, ononce, 1, continueflag2, 0, 0);
if (ret < 0)
goto out;
-   if (memcmp(testhmac2, authdata2, SHA1_DIGEST_SIZE))
+   if (crypto_memneq(testhmac2, authdata2, SHA1_DIGEST_SIZE))
ret = -EINVAL;
 out:
kfree(sdesc);
-- 
2.13.1

[PATCH 4/6] security/keys: use constant time memory comparison for macs

[Jason A. Donenfeld]

Otherwise, we enable a MAC forgery via timing attack.

Signed-off-by: Jason A. Donenfeld 
Cc: David Safford 
Cc: Mimi Zohar 
Cc: David Howells 
Cc: keyri...@vger.kernel.org
Cc: sta...@vger.kernel.org
---
 security/keys/trusted.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/security/keys/trusted.c b/security/keys/trusted.c
index 2ae31c5a87de..df7d30b0a6f7 100644
--- a/security/keys/trusted.c
+++ b/security/keys/trusted.c
@@ -11,6 +11,7 @@
  * See Documentation/security/keys-trusted-encrypted.txt
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -243,7 +244,7 @@ static int TSS_checkhmac1(unsigned char *buffer,
if (ret < 0)
goto out;
 
-   if (memcmp(testhmac, authdata, SHA1_DIGEST_SIZE))
+   if (crypto_memneq(testhmac, authdata, SHA1_DIGEST_SIZE))
ret = -EINVAL;
 out:
kfree(sdesc);
@@ -335,7 +336,7 @@ static int TSS_checkhmac2(unsigned char *buffer,
  TPM_NONCE_SIZE, ononce, 1, continueflag1, 0, 0);
if (ret < 0)
goto out;
-   if (memcmp(testhmac1, authdata1, SHA1_DIGEST_SIZE)) {
+   if (crypto_memneq(testhmac1, authdata1, SHA1_DIGEST_SIZE)) {
ret = -EINVAL;
goto out;
}
@@ -344,7 +345,7 @@ static int TSS_checkhmac2(unsigned char *buffer,
  TPM_NONCE_SIZE, ononce, 1, continueflag2, 0, 0);
if (ret < 0)
goto out;
-   if (memcmp(testhmac2, authdata2, SHA1_DIGEST_SIZE))
+   if (crypto_memneq(testhmac2, authdata2, SHA1_DIGEST_SIZE))
ret = -EINVAL;
 out:
kfree(sdesc);
-- 
2.13.1

[PATCH] Drivers: rtl8723bs - remove asm includes

[Derek Robson]

Fixed checkpatch warnings "Use #include  instead of "
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/rtl8723bs/include/osdep_service_linux.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/rtl8723bs/include/osdep_service_linux.h 
b/drivers/staging/rtl8723bs/include/osdep_service_linux.h
index 486e8184b0b2..0c9b4f622fee 100644
--- a/drivers/staging/rtl8723bs/include/osdep_service_linux.h
+++ b/drivers/staging/rtl8723bs/include/osdep_service_linux.h
@@ -26,10 +26,10 @@
/* include  */
#include 
#include 
-   #include 
+   #include 
#include 
-   #include 
-   #include 
+   #include 
+   #include 
#include 
#include 
#include 
-- 
2.13.0

[PATCH] Drivers: rtl8723bs - remove asm includes

[Derek Robson]

Fixed checkpatch warnings "Use #include  instead of "
Found using checkpatch

Signed-off-by: Derek Robson 
---
 drivers/staging/rtl8723bs/include/osdep_service_linux.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/rtl8723bs/include/osdep_service_linux.h 
b/drivers/staging/rtl8723bs/include/osdep_service_linux.h
index 486e8184b0b2..0c9b4f622fee 100644
--- a/drivers/staging/rtl8723bs/include/osdep_service_linux.h
+++ b/drivers/staging/rtl8723bs/include/osdep_service_linux.h
@@ -26,10 +26,10 @@
/* include  */
#include 
#include 
-   #include 
+   #include 
#include 
-   #include 
-   #include 
+   #include 
+   #include 
#include 
#include 
#include 
-- 
2.13.0

[PATCH 3/6] ccree: use constant time memory comparison for macs and tags

[Jason A. Donenfeld]

Otherwise, we enable several different forgeries via timing attack.

While the C inside this file is nearly incomprehensible, I did notice a
high volume of "FIPS" and "NIST", which makes this kind of bug slightly
more embarrassing.

Signed-off-by: Jason A. Donenfeld 
Cc: Gilad Ben-Yossef 
Cc: Greg Kroah-Hartman 
Cc: sta...@vger.kernel.org
---
 drivers/staging/ccree/ssi_fips_ll.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_ll.c 
b/drivers/staging/ccree/ssi_fips_ll.c
index d573574bbb98..3310997d8e3e 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -19,6 +19,7 @@ This file defines the driver FIPS Low Level implmentaion 
functions,
 that executes the KAT.
 ***/
 #include 
+#include 
 
 #include "ssi_driver.h"
 #include "ssi_fips_local.h"
@@ -462,7 +463,7 @@ ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffe
}
 
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, cipherData->dataOut, 
cipherData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, cipherData->dataOut, 
cipherData->dataInSize))
{
FIPS_LOG("dout comparison error %d - oprMode=%d, 
isAes=%d\n", i, cipherData->oprMode, cipherData->isAes);
FIPS_LOG("  i  expected   received \n");
@@ -586,7 +587,7 @@ ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, cmac_data->mac_res, 
cmac_data->mac_res_size) != 0)
+   if (crypto_memneq(virt_ctx->mac_res, cmac_data->mac_res, 
cmac_data->mac_res_size))
{
FIPS_LOG("comparison error %d - digest_size=%d \n", i, 
cmac_data->mac_res_size);
FIPS_LOG("  i  expected   received \n");
@@ -760,7 +761,7 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 }
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, hash_data->mac_res, digest_size) 
!= 0)
+   if (crypto_memneq(virt_ctx->mac_res, hash_data->mac_res, 
digest_size))
{
FIPS_LOG("comparison error %d - hash_mode=%d 
digest_size=%d \n", i, hash_data->hash_mode, digest_size);
FIPS_LOG("  i  expected   received \n");
@@ -1093,7 +1094,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, hmac_data->mac_res, digest_size) 
!= 0)
+   if (crypto_memneq(virt_ctx->mac_res, hmac_data->mac_res, 
digest_size))
{
FIPS_LOG("comparison error %d - hash_mode=%d 
digest_size=%d \n", i, hmac_data->hash_mode, digest_size);
FIPS_LOG("  i  expected   received \n");
@@ -1310,7 +1311,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, ccmData->dataOut, 
ccmData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, ccmData->dataOut, 
ccmData->dataInSize))
{
FIPS_LOG("dout comparison error %d - size=%d \n", i, 
ccmData->dataInSize);
 error = CC_REE_FIPS_ERROR_AESCCM_PUT;
@@ -1318,7 +1319,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 }
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, ccmData->macResOut, 
ccmData->tagSize) != 0)
+   if (crypto_memneq(virt_ctx->mac_res, ccmData->macResOut, 
ccmData->tagSize))
{
FIPS_LOG("mac_res comparison error %d - mac_size=%d 
\n", i, ccmData->tagSize);
FIPS_LOG("  i  expected   received \n");
@@ -1633,7 +1634,7 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 
if (gcmData->direction == DRV_CRYPTO_DIRECTION_ENCRYPT) {
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, gcmData->dataOut, 
gcmData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, gcmData->dataOut, 
gcmData->dataInSize))
{
FIPS_LOG("dout comparison error %d - size=%d 
\n", i, gcmData->dataInSize);
FIPS_LOG("  i  expected  

[PATCH 3/6] ccree: use constant time memory comparison for macs and tags

[Jason A. Donenfeld]

Otherwise, we enable several different forgeries via timing attack.

While the C inside this file is nearly incomprehensible, I did notice a
high volume of "FIPS" and "NIST", which makes this kind of bug slightly
more embarrassing.

Signed-off-by: Jason A. Donenfeld 
Cc: Gilad Ben-Yossef 
Cc: Greg Kroah-Hartman 
Cc: sta...@vger.kernel.org
---
 drivers/staging/ccree/ssi_fips_ll.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips_ll.c 
b/drivers/staging/ccree/ssi_fips_ll.c
index d573574bbb98..3310997d8e3e 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -19,6 +19,7 @@ This file defines the driver FIPS Low Level implmentaion 
functions,
 that executes the KAT.
 ***/
 #include 
+#include 
 
 #include "ssi_driver.h"
 #include "ssi_fips_local.h"
@@ -462,7 +463,7 @@ ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffe
}
 
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, cipherData->dataOut, 
cipherData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, cipherData->dataOut, 
cipherData->dataInSize))
{
FIPS_LOG("dout comparison error %d - oprMode=%d, 
isAes=%d\n", i, cipherData->oprMode, cipherData->isAes);
FIPS_LOG("  i  expected   received \n");
@@ -586,7 +587,7 @@ ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, cmac_data->mac_res, 
cmac_data->mac_res_size) != 0)
+   if (crypto_memneq(virt_ctx->mac_res, cmac_data->mac_res, 
cmac_data->mac_res_size))
{
FIPS_LOG("comparison error %d - digest_size=%d \n", i, 
cmac_data->mac_res_size);
FIPS_LOG("  i  expected   received \n");
@@ -760,7 +761,7 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 }
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, hash_data->mac_res, digest_size) 
!= 0)
+   if (crypto_memneq(virt_ctx->mac_res, hash_data->mac_res, 
digest_size))
{
FIPS_LOG("comparison error %d - hash_mode=%d 
digest_size=%d \n", i, hash_data->hash_mode, digest_size);
FIPS_LOG("  i  expected   received \n");
@@ -1093,7 +1094,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, hmac_data->mac_res, digest_size) 
!= 0)
+   if (crypto_memneq(virt_ctx->mac_res, hmac_data->mac_res, 
digest_size))
{
FIPS_LOG("comparison error %d - hash_mode=%d 
digest_size=%d \n", i, hmac_data->hash_mode, digest_size);
FIPS_LOG("  i  expected   received \n");
@@ -1310,7 +1311,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
}
 
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, ccmData->dataOut, 
ccmData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, ccmData->dataOut, 
ccmData->dataInSize))
{
FIPS_LOG("dout comparison error %d - size=%d \n", i, 
ccmData->dataInSize);
 error = CC_REE_FIPS_ERROR_AESCCM_PUT;
@@ -1318,7 +1319,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 }
 
/* compare actual mac result to expected */
-   if (memcmp(virt_ctx->mac_res, ccmData->macResOut, 
ccmData->tagSize) != 0)
+   if (crypto_memneq(virt_ctx->mac_res, ccmData->macResOut, 
ccmData->tagSize))
{
FIPS_LOG("mac_res comparison error %d - mac_size=%d 
\n", i, ccmData->tagSize);
FIPS_LOG("  i  expected   received \n");
@@ -1633,7 +1634,7 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, 
void *cpu_addr_buffer,
 
if (gcmData->direction == DRV_CRYPTO_DIRECTION_ENCRYPT) {
/* compare actual dout to expected */
-   if (memcmp(virt_ctx->dout, gcmData->dataOut, 
gcmData->dataInSize) != 0)
+   if (crypto_memneq(virt_ctx->dout, gcmData->dataOut, 
gcmData->dataInSize))
{
FIPS_LOG("dout comparison error %d - size=%d 
\n", i, gcmData->dataInSize);
FIPS_LOG("  i  expected   received \n");
@@ -1649,7 +1650,7 @@ 

[PATCH] rt_mutex: correctly initialize lockdep in rt_mutex_init_proxy_locked

[Levin, Alexander (Sasha Levin)]

lockdep can't deal with NULL name or key, and doesn't do anything
with the lock when that happens.

Make rt_mutex_init_proxy_locked pass a name and a key for the lock.

Fixes: f5694788ad8d ("rt_mutex: Add lockdep annotations")
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sasha Levin 
---
 kernel/locking/rtmutex.c|  6 --
 kernel/locking/rtmutex_common.h | 12 ++--
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c
index 43123533e9b1..f540961cec30 100644
--- a/kernel/locking/rtmutex.c
+++ b/kernel/locking/rtmutex.c
@@ -1679,10 +1679,12 @@ EXPORT_SYMBOL_GPL(__rt_mutex_init);
  * possible at this point because the pi_state which contains the rtmutex
  * is not yet visible to other tasks.
  */
-void rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+void __rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+   const char *name,
+   struct lock_class_key *key,
struct task_struct *proxy_owner)
 {
-   __rt_mutex_init(lock, NULL, NULL);
+   __rt_mutex_init(lock, name, key);
debug_rt_mutex_proxy_lock(lock, proxy_owner);
rt_mutex_set_owner(lock, proxy_owner);
 }
diff --git a/kernel/locking/rtmutex_common.h b/kernel/locking/rtmutex_common.h
index 72ad45a9a794..110dc1ed1e89 100644
--- a/kernel/locking/rtmutex_common.h
+++ b/kernel/locking/rtmutex_common.h
@@ -100,8 +100,16 @@ enum rtmutex_chainwalk {
  * PI-futex support (proxy locking functions, etc.):
  */
 extern struct task_struct *rt_mutex_next_owner(struct rt_mutex *lock);
-extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock,
-  struct task_struct *proxy_owner);
+extern void __rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+const char *name,
+struct lock_class_key *key,
+struct task_struct *proxy_owner);
+#define rt_mutex_init_proxy_locked(lock, proxy_owner) \
+do { \
+   static struct lock_class_key __key; \
+   __rt_mutex_init_proxy_locked(lock, #lock, &__key, proxy_owner); \
+} while (0)
+
 extern void rt_mutex_proxy_unlock(struct rt_mutex *lock,
  struct task_struct *proxy_owner);
 extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter);
-- 
2.11.0

[PATCH] rt_mutex: correctly initialize lockdep in rt_mutex_init_proxy_locked

[Levin, Alexander (Sasha Levin)]

lockdep can't deal with NULL name or key, and doesn't do anything
with the lock when that happens.

Make rt_mutex_init_proxy_locked pass a name and a key for the lock.

Fixes: f5694788ad8d ("rt_mutex: Add lockdep annotations")
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sasha Levin 
---
 kernel/locking/rtmutex.c|  6 --
 kernel/locking/rtmutex_common.h | 12 ++--
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c
index 43123533e9b1..f540961cec30 100644
--- a/kernel/locking/rtmutex.c
+++ b/kernel/locking/rtmutex.c
@@ -1679,10 +1679,12 @@ EXPORT_SYMBOL_GPL(__rt_mutex_init);
  * possible at this point because the pi_state which contains the rtmutex
  * is not yet visible to other tasks.
  */
-void rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+void __rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+   const char *name,
+   struct lock_class_key *key,
struct task_struct *proxy_owner)
 {
-   __rt_mutex_init(lock, NULL, NULL);
+   __rt_mutex_init(lock, name, key);
debug_rt_mutex_proxy_lock(lock, proxy_owner);
rt_mutex_set_owner(lock, proxy_owner);
 }
diff --git a/kernel/locking/rtmutex_common.h b/kernel/locking/rtmutex_common.h
index 72ad45a9a794..110dc1ed1e89 100644
--- a/kernel/locking/rtmutex_common.h
+++ b/kernel/locking/rtmutex_common.h
@@ -100,8 +100,16 @@ enum rtmutex_chainwalk {
  * PI-futex support (proxy locking functions, etc.):
  */
 extern struct task_struct *rt_mutex_next_owner(struct rt_mutex *lock);
-extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock,
-  struct task_struct *proxy_owner);
+extern void __rt_mutex_init_proxy_locked(struct rt_mutex *lock,
+const char *name,
+struct lock_class_key *key,
+struct task_struct *proxy_owner);
+#define rt_mutex_init_proxy_locked(lock, proxy_owner) \
+do { \
+   static struct lock_class_key __key; \
+   __rt_mutex_init_proxy_locked(lock, #lock, &__key, proxy_owner); \
+} while (0)
+
 extern void rt_mutex_proxy_unlock(struct rt_mutex *lock,
  struct task_struct *proxy_owner);
 extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter);
-- 
2.11.0

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

Bu Tao,

1. Subject line of this patch goes something like "arm64: dts: hi3660:
add ufs support xxx"

2. Have you run "./scripts/get_maintainer.pl *.patch" to get the
correct maintainers to include into your patch review?
I don't think so. Because this is a dts change, however in your
email's to/ cc/, there is no DTS reviewers being included. Please fix
that and resend.

3. I suppose before sending your patchset, you already tested it
against tip kernel. For example, where your dts change can be applied?
If they apply to my dts patchset [1], please mention it in your commit
message. If they don't, then please tell us where.

[1].  http://www.spinics.net/lists/devicetree/msg178303.html

4. Re-send, send them as "git format-patch -v2".

-Guodong

On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
> add ufs node for hi3660
>
> Signed-off-by: Bu Tao 
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>  1 file changed, 20 insertions(+)
>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> old mode 100644
> new mode 100755
> index 3983086bd67b..4ba9cec43d94
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -141,6 +141,26 @@
> #size-cells = <2>;
> ranges;
>
> +ufs: ufs@ff3b {
> +compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
> standard */
> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
> SYS CTRL */
> +interrupt-parent = <>;
> +interrupts = <0 278 4>;
> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> +clock-names = "clk_ref", "clk_phy";
> +freq-table-hz = <0 0>, <0 0>;
> +resets = <_rst 0x84 12>,   /* offset: 
> 0x84; bit: 12 */
> + <_rst 0x84 7>;/* offset: 
> 0x84; bit: 7  */
> +reset-names = "rst", "assert";
> +ufs-hi3660-use-rate-B;
> +ufs-hi3660-broken-fastauto;
> +ufs-hi3660-use-HS-GEAR3;
> +ufs-hi3660-broken-clk-gate-bypass;
> +status = "ok";
> +};
> +
> fixed_uart5: fixed_19_2M {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> --
> 2.11.GIT
>

Re: [PATCH 2/3] scsi:ufs:add ufs node property for hi3660

[Guodong Xu]

Bu Tao,

1. Subject line of this patch goes something like "arm64: dts: hi3660:
add ufs support xxx"

2. Have you run "./scripts/get_maintainer.pl *.patch" to get the
correct maintainers to include into your patch review?
I don't think so. Because this is a dts change, however in your
email's to/ cc/, there is no DTS reviewers being included. Please fix
that and resend.

3. I suppose before sending your patchset, you already tested it
against tip kernel. For example, where your dts change can be applied?
If they apply to my dts patchset [1], please mention it in your commit
message. If they don't, then please tell us where.

[1].  http://www.spinics.net/lists/devicetree/msg178303.html

4. Re-send, send them as "git format-patch -v2".

-Guodong

On Sat, Jun 10, 2017 at 9:20 AM, butao  wrote:
> add ufs node for hi3660
>
> Signed-off-by: Bu Tao 
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 
>  1 file changed, 20 insertions(+)
>  mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> old mode 100644
> new mode 100755
> index 3983086bd67b..4ba9cec43d94
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -141,6 +141,26 @@
> #size-cells = <2>;
> ranges;
>
> +ufs: ufs@ff3b {
> +compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
> +reg = <0x0 0xff3b 0x0 0x1000>,  /* 0: HCI 
> standard */
> +  <0x0 0xff3b1000 0x0 0x1000>;  /* 1: UFS 
> SYS CTRL */
> +interrupt-parent = <>;
> +interrupts = <0 278 4>;
> +clocks = <_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> + <_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> +clock-names = "clk_ref", "clk_phy";
> +freq-table-hz = <0 0>, <0 0>;
> +resets = <_rst 0x84 12>,   /* offset: 
> 0x84; bit: 12 */
> + <_rst 0x84 7>;/* offset: 
> 0x84; bit: 7  */
> +reset-names = "rst", "assert";
> +ufs-hi3660-use-rate-B;
> +ufs-hi3660-broken-fastauto;
> +ufs-hi3660-use-HS-GEAR3;
> +ufs-hi3660-broken-clk-gate-bypass;
> +status = "ok";
> +};
> +
> fixed_uart5: fixed_19_2M {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> --
> 2.11.GIT
>

Re: [PATCH v4 1/4] of: remove *phandle properties from expanded device tree

[Frank Rowand]

On 05/15/17 15:23, Rob Herring wrote:
> On Mon, May 1, 2017 at 9:46 PM,   wrote:
>> From: Frank Rowand 
>>
>> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
>> the internal device tree.  The phandle will still be in the struct
>> device_node phandle field.
>>
>> This is to resolve the issue found by Stephen Boyd [1] when he changed
>> the type of struct property.value from void * to const void *.  As
>> a result of the type change, the overlay code had compile errors
>> where the resolver updates phandle values.
>>
>>   [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html
>>
>> - Add sysfs infrastructure to report np->phandle, as if it was a property.
>> - Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
>>   in the expanded device tree.
>> - Remove phandle properties in of_attach_node(), for nodes dynamically
>>   attached to the live tree.  Add the phandle sysfs entry for these nodes.
>> - When creating an overlay changeset, duplicate the node phandle in
>>   __of_node_dup().
>> - Remove no longer needed checks to exclude "phandle" and "linux,phandle"
>>   properties in several locations.
>> - A side effect of these changes is that the obsolete "linux,phandle" and
>>   "ibm,phandle" properties will no longer appear in /proc/device-tree (they
>>   will appear as "phandle").
>>
>> Signed-off-by: Frank Rowand 
>> ---
>>  drivers/of/base.c   | 48 ---
>>  drivers/of/dynamic.c| 54 
>> +
>>  drivers/of/fdt.c| 40 +---
>>  drivers/of/of_private.h |  1 +
>>  drivers/of/overlay.c|  4 +---
>>  drivers/of/resolver.c   | 23 +
>>  include/linux/of.h  |  1 +
>>  7 files changed, 114 insertions(+), 57 deletions(-)
>>
>> diff --git a/drivers/of/base.c b/drivers/of/base.c
>> index d7c4629a3a2d..8a0cf9003cf8 100644
>> --- a/drivers/of/base.c
>> +++ b/drivers/of/base.c
>> @@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file *filp, 
>> struct kobject *kobj,
>> return memory_read_from_buffer(buf, count, , pp->value, 
>> pp->length);
>>  }
>>
>> +static ssize_t of_node_phandle_read(struct file *filp, struct kobject *kobj,
>> +   struct bin_attribute *bin_attr, char *buf,
>> +   loff_t offset, size_t count)
>> +{
>> +   phandle phandle;
>> +   struct device_node *np;
>> +
>> +   np = container_of(bin_attr, struct device_node, attr_phandle);
>> +   phandle = cpu_to_be32(np->phandle);
>> +   return memory_read_from_buffer(buf, count, , ,
>> +  sizeof(phandle));
>> +}
>> +
>>  /* always return newly allocated name, caller must free after use */
>>  static const char *safe_name(struct kobject *kobj, const char *orig_name)
>>  {
>> @@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, 
>> struct property *pp)
>> return rc;
>>  }
>>
>> +/*
>> + * In the imported device tree (fdt), phandle is a property.  In the
>> + * internal data structure it is instead stored in the struct device_node.
>> + * Make phandle visible in sysfs as if it was a property.
>> + */
>> +int __of_add_phandle_sysfs(struct device_node *np)
>> +{
>> +   int rc;
>> +
>> +   if (!IS_ENABLED(CONFIG_SYSFS))
>> +   return 0;
>> +
>> +   if (!of_kset || !of_node_is_attached(np))
>> +   return 0;
>> +
>> +   if (!np->phandle || np->phandle == 0x)
>> +   return 0;
>> +
>> +   sysfs_bin_attr_init(>attr_phandle);
>> +   np->attr_phandle.attr.name = "phandle";
>> +   np->attr_phandle.attr.mode = 0444;
>> +   np->attr_phandle.size = sizeof(np->phandle);
>> +   np->attr_phandle.read = of_node_phandle_read;
>> +
>> +   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
>> +   WARN(rc, "error adding attribute phandle to node %s\n", 
>> np->full_name);
>> +   return rc;
>> +}
>> +
>>  int __of_attach_node_sysfs(struct device_node *np)
>>  {
>> const char *name;
>> @@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
>> if (rc)
>> return rc;
>>
>> +   __of_add_phandle_sysfs(np);
>> +
>> for_each_property_of_node(np, pp)
>> __of_add_property_sysfs(np, pp);
>>
>> @@ -2097,9 +2141,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
>> align))
>> int id, len;
>>
>> /* Skip those we do not want to proceed */
>> -   if (!strcmp(pp->name, "name") ||
>> -   !strcmp(pp->name, "phandle") ||
>> -   !strcmp(pp->name, "linux,phandle"))
>> +   if (!strcmp(pp->name, "name"))
>> continue;
>>
>> np = of_find_node_by_path(pp->value);
>> diff --git 

Re: [PATCH v4 1/4] of: remove *phandle properties from expanded device tree

[Frank Rowand]

On 05/15/17 15:23, Rob Herring wrote:
> On Mon, May 1, 2017 at 9:46 PM,   wrote:
>> From: Frank Rowand 
>>
>> Remove "phandle", "linux,phandle", and "ibm,phandle" properties from
>> the internal device tree.  The phandle will still be in the struct
>> device_node phandle field.
>>
>> This is to resolve the issue found by Stephen Boyd [1] when he changed
>> the type of struct property.value from void * to const void *.  As
>> a result of the type change, the overlay code had compile errors
>> where the resolver updates phandle values.
>>
>>   [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.1/04160.html
>>
>> - Add sysfs infrastructure to report np->phandle, as if it was a property.
>> - Do not create "phandle" "ibm,phandle", and "linux,phandle" properties
>>   in the expanded device tree.
>> - Remove phandle properties in of_attach_node(), for nodes dynamically
>>   attached to the live tree.  Add the phandle sysfs entry for these nodes.
>> - When creating an overlay changeset, duplicate the node phandle in
>>   __of_node_dup().
>> - Remove no longer needed checks to exclude "phandle" and "linux,phandle"
>>   properties in several locations.
>> - A side effect of these changes is that the obsolete "linux,phandle" and
>>   "ibm,phandle" properties will no longer appear in /proc/device-tree (they
>>   will appear as "phandle").
>>
>> Signed-off-by: Frank Rowand 
>> ---
>>  drivers/of/base.c   | 48 ---
>>  drivers/of/dynamic.c| 54 
>> +
>>  drivers/of/fdt.c| 40 +---
>>  drivers/of/of_private.h |  1 +
>>  drivers/of/overlay.c|  4 +---
>>  drivers/of/resolver.c   | 23 +
>>  include/linux/of.h  |  1 +
>>  7 files changed, 114 insertions(+), 57 deletions(-)
>>
>> diff --git a/drivers/of/base.c b/drivers/of/base.c
>> index d7c4629a3a2d..8a0cf9003cf8 100644
>> --- a/drivers/of/base.c
>> +++ b/drivers/of/base.c
>> @@ -116,6 +116,19 @@ static ssize_t of_node_property_read(struct file *filp, 
>> struct kobject *kobj,
>> return memory_read_from_buffer(buf, count, , pp->value, 
>> pp->length);
>>  }
>>
>> +static ssize_t of_node_phandle_read(struct file *filp, struct kobject *kobj,
>> +   struct bin_attribute *bin_attr, char *buf,
>> +   loff_t offset, size_t count)
>> +{
>> +   phandle phandle;
>> +   struct device_node *np;
>> +
>> +   np = container_of(bin_attr, struct device_node, attr_phandle);
>> +   phandle = cpu_to_be32(np->phandle);
>> +   return memory_read_from_buffer(buf, count, , ,
>> +  sizeof(phandle));
>> +}
>> +
>>  /* always return newly allocated name, caller must free after use */
>>  static const char *safe_name(struct kobject *kobj, const char *orig_name)
>>  {
>> @@ -164,6 +177,35 @@ int __of_add_property_sysfs(struct device_node *np, 
>> struct property *pp)
>> return rc;
>>  }
>>
>> +/*
>> + * In the imported device tree (fdt), phandle is a property.  In the
>> + * internal data structure it is instead stored in the struct device_node.
>> + * Make phandle visible in sysfs as if it was a property.
>> + */
>> +int __of_add_phandle_sysfs(struct device_node *np)
>> +{
>> +   int rc;
>> +
>> +   if (!IS_ENABLED(CONFIG_SYSFS))
>> +   return 0;
>> +
>> +   if (!of_kset || !of_node_is_attached(np))
>> +   return 0;
>> +
>> +   if (!np->phandle || np->phandle == 0x)
>> +   return 0;
>> +
>> +   sysfs_bin_attr_init(>attr_phandle);
>> +   np->attr_phandle.attr.name = "phandle";
>> +   np->attr_phandle.attr.mode = 0444;
>> +   np->attr_phandle.size = sizeof(np->phandle);
>> +   np->attr_phandle.read = of_node_phandle_read;
>> +
>> +   rc = sysfs_create_bin_file(>kobj, >attr_phandle);
>> +   WARN(rc, "error adding attribute phandle to node %s\n", 
>> np->full_name);
>> +   return rc;
>> +}
>> +
>>  int __of_attach_node_sysfs(struct device_node *np)
>>  {
>> const char *name;
>> @@ -193,6 +235,8 @@ int __of_attach_node_sysfs(struct device_node *np)
>> if (rc)
>> return rc;
>>
>> +   __of_add_phandle_sysfs(np);
>> +
>> for_each_property_of_node(np, pp)
>> __of_add_property_sysfs(np, pp);
>>
>> @@ -2097,9 +2141,7 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
>> align))
>> int id, len;
>>
>> /* Skip those we do not want to proceed */
>> -   if (!strcmp(pp->name, "name") ||
>> -   !strcmp(pp->name, "phandle") ||
>> -   !strcmp(pp->name, "linux,phandle"))
>> +   if (!strcmp(pp->name, "name"))
>> continue;
>>
>> np = of_find_node_by_path(pp->value);
>> diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
>> index 

Re: [PATCH -v4 0/14] mm: make movable onlining suck less

[Wei Yang]

On Fri, Jun 9, 2017 at 6:49 PM, Michal Hocko  wrote:
> On Fri 09-06-17 17:51:24, Wei Yang wrote:
>> Hi, Michal
>>
>> I am not that familiar with hotplug and trying to catch up the issue
>>  and your solution.
>>
>> One potential issue I found is we don't check the physical boundary
>> when add_memory_resource().
>>
>> For example, on x86-64, only 64T physical memory is supported currently.
>> Looks it is expanded after 5-level pagetable is introduced. While there is
>> still some limitations on this. But we don't check the boundary I think.
>>
>> During the bootup, this is ensured by the max_pfn which is guaranteed to
>> be under MAX_ARCH_PFN. I don't see some limitation on this when doing
>>  hotplug.
>
> This might be true and I would have to double check but this rework
> doesn't change anything in that regards. Or do I miss something?

Ah, yes, I believe your patch set don't touch this area.

This is just related to hotplug.

> --
> Michal Hocko
> SUSE Labs

Re: [PATCH -v4 0/14] mm: make movable onlining suck less

[Wei Yang]

On Fri, Jun 9, 2017 at 6:49 PM, Michal Hocko  wrote:
> On Fri 09-06-17 17:51:24, Wei Yang wrote:
>> Hi, Michal
>>
>> I am not that familiar with hotplug and trying to catch up the issue
>>  and your solution.
>>
>> One potential issue I found is we don't check the physical boundary
>> when add_memory_resource().
>>
>> For example, on x86-64, only 64T physical memory is supported currently.
>> Looks it is expanded after 5-level pagetable is introduced. While there is
>> still some limitations on this. But we don't check the boundary I think.
>>
>> During the bootup, this is ensured by the max_pfn which is guaranteed to
>> be under MAX_ARCH_PFN. I don't see some limitation on this when doing
>>  hotplug.
>
> This might be true and I would have to double check but this rework
> doesn't change anything in that regards. Or do I miss something?

Ah, yes, I believe your patch set don't touch this area.

This is just related to hotplug.

> --
> Michal Hocko
> SUSE Labs