Nadav reported parallel MADV_DONTNEED on same range has a stale TLB
problem and Mel fixed it[1] and found same problem on MADV_FREE[2].
Quote from Mel Gorman
"The race in question is CPU 0 running madv_free and updating some PTEs
while CPU 1 is also running madv_free and looking at the same
Nadav reported parallel MADV_DONTNEED on same range has a stale TLB
problem and Mel fixed it[1] and found same problem on MADV_FREE[2].
Quote from Mel Gorman
"The race in question is CPU 0 running madv_free and updating some PTEs
while CPU 1 is also running madv_free and looking at the same
This patch is ready for solving race problems caused by TLB batch.
For that, we will increase/decrease TLB flush pending count of
mm_struct whenever tlb_[gather|finish]_mmu is called.
Before making it simple, this patch separates architecture specific
part and rename it to
This patch is ready for solving race problems caused by TLB batch.
For that, we will increase/decrease TLB flush pending count of
mm_struct whenever tlb_[gather|finish]_mmu is called.
Before making it simple, this patch separates architecture specific
part and rename it to
Currently, tlb_flush_pending is used only for CONFIG_[NUMA_BALANCING|
COMPACTION] but upcoming patches to solve subtle TLB flush bacting
problem will use it regardless of compaction/numa so this patch
doesn't remove the dependency.
Cc: Nadav Amit
Cc: Mel Gorman
Currently, tlb_flush_pending is used only for CONFIG_[NUMA_BALANCING|
COMPACTION] but upcoming patches to solve subtle TLB flush bacting
problem will use it regardless of compaction/numa so this patch
doesn't remove the dependency.
Cc: Nadav Amit
Cc: Mel Gorman
Signed-off-by: Minchan Kim
---
Nadav and Mel founded several subtle races caused by TLB batching.
This patchset aims for solving thoses problems using embedding
[inc|dec]_tlb_flush_pending to TLB batching API.
With that, places to know TLB flush pending catch it up by
using mm_tlb_flush_pending.
Each patch includes detailed
Nadav reported KSM can corrupt the user data by the TLB batching race[1].
That means data user written can be lost.
Quote from Nadav Amit
"
For this race we need 4 CPUs:
CPU0: Caches a writable and dirty PTE entry, and uses the stale value for
write later.
CPU1: Runs madvise_free on the range
Nadav and Mel founded several subtle races caused by TLB batching.
This patchset aims for solving thoses problems using embedding
[inc|dec]_tlb_flush_pending to TLB batching API.
With that, places to know TLB flush pending catch it up by
using mm_tlb_flush_pending.
Each patch includes detailed
Nadav reported KSM can corrupt the user data by the TLB batching race[1].
That means data user written can be lost.
Quote from Nadav Amit
"
For this race we need 4 CPUs:
CPU0: Caches a writable and dirty PTE entry, and uses the stale value for
write later.
CPU1: Runs madvise_free on the range
On 2017/7/28 0:00, Gao, Ping A wrote:
> On 2017/7/27 0:43, Alex Williamson wrote:
>> [cc +libvir-list]
>>
>> On Wed, 26 Jul 2017 21:16:59 +0800
>> "Gao, Ping A" wrote:
>>
>>> The vfio-mdev provide the capability to let different guest share the
>>> same physical device
On 2017/7/28 0:00, Gao, Ping A wrote:
> On 2017/7/27 0:43, Alex Williamson wrote:
>> [cc +libvir-list]
>>
>> On Wed, 26 Jul 2017 21:16:59 +0800
>> "Gao, Ping A" wrote:
>>
>>> The vfio-mdev provide the capability to let different guest share the
>>> same physical device through mediate sharing,
Hi Andrew,
Today's linux-next merge of the akpm-current tree got a conflict in:
include/linux/fs.h
between commit:
9dcc0577f2a4 ("mm: remove optimizations based on i_size in mapping writeback
waits")
from the wberr tree and patch:
"mm: remove optimizations based on i_size in mapping
Hi Andrew,
Today's linux-next merge of the akpm-current tree got a conflict in:
include/linux/fs.h
between commit:
9dcc0577f2a4 ("mm: remove optimizations based on i_size in mapping writeback
waits")
from the wberr tree and patch:
"mm: remove optimizations based on i_size in mapping
On Mon, Jul 31, 2017 at 2:55 PM, Alex Williamson
wrote:
> On Mon, 31 Jul 2017 10:56:53 -0700
> Feng Kan wrote:
>
>> On Fri, Jul 28, 2017 at 4:00 PM, Alex Williamson
>> wrote:
>> > On Fri, 28 Jul 2017 11:50:43 -0700
>> > Feng
On Mon, Jul 31, 2017 at 8:43 AM, da...@codemonkey.org.uk
wrote:
> Another NFSv4 KASAN splat, this time from rc3.
>
> BUG: KASAN: use-after-free in nfs4_exchange_id_done+0x3d7/0x8e0 [nfsv4]
Ugh. It's really hard to tell what access that it - KASAN doesn't
actually give
On Mon, Jul 31, 2017 at 2:55 PM, Alex Williamson
wrote:
> On Mon, 31 Jul 2017 10:56:53 -0700
> Feng Kan wrote:
>
>> On Fri, Jul 28, 2017 at 4:00 PM, Alex Williamson
>> wrote:
>> > On Fri, 28 Jul 2017 11:50:43 -0700
>> > Feng Kan wrote:
>> >
>> >> The APM X-Gene PCIe root port does not support
On Mon, Jul 31, 2017 at 8:43 AM, da...@codemonkey.org.uk
wrote:
> Another NFSv4 KASAN splat, this time from rc3.
>
> BUG: KASAN: use-after-free in nfs4_exchange_id_done+0x3d7/0x8e0 [nfsv4]
Ugh. It's really hard to tell what access that it - KASAN doesn't
actually give enough information. There's
On Mon, Jul 31, 2017 at 06:00:02PM -0700, Palmer Dabbelt wrote:
> This contains all the code that directly interfaces with the RISC-V
> memory model. While this code corforms to the current RISC-V ISA
> specifications (user 2.2 and priv 1.10), the memory model is somewhat
> underspecified in
On Mon, Jul 31, 2017 at 06:00:02PM -0700, Palmer Dabbelt wrote:
> This contains all the code that directly interfaces with the RISC-V
> memory model. While this code corforms to the current RISC-V ISA
> specifications (user 2.2 and priv 1.10), the memory model is somewhat
> underspecified in
Hi Brian,
On Mon, Jul 31, 2017, Brian Norris wrote:
> Contains a QCA6174A-5 chipset, with USB BT. Let's support loading
> firmware on it.
>
> From usb-devices:
> T: Bus=02 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#= 3 Spd=12 MxCh= 0
> D: Ver= 2.01 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs= 1
> P:
Hi Brian,
On Mon, Jul 31, 2017, Brian Norris wrote:
> Contains a QCA6174A-5 chipset, with USB BT. Let's support loading
> firmware on it.
>
> From usb-devices:
> T: Bus=02 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#= 3 Spd=12 MxCh= 0
> D: Ver= 2.01 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs= 1
> P:
Hi Andrew,
After merging the akpm-current tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
arch/powerpc/kernel/rtas.c: In function 'rtas_online_cpus_mask':
arch/powerpc/kernel/rtas.c:917:37: error: 'GFP_KENREL' undeclared (first use in
this function)
if
Hi Andrew,
After merging the akpm-current tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
arch/powerpc/kernel/rtas.c: In function 'rtas_online_cpus_mask':
arch/powerpc/kernel/rtas.c:917:37: error: 'GFP_KENREL' undeclared (first use in
this function)
if
Hi
We using pci_dev_run_wake that changed in mentioned patch to decide
if to replace usual PM callbacks with domain ones.
IIRC, the mei device is not remote wakeable on that platform,
so we should set domain callbacks.
There was a patch in PM framework that squashes runtime suspend with
usual
Hi
We using pci_dev_run_wake that changed in mentioned patch to decide
if to replace usual PM callbacks with domain ones.
IIRC, the mei device is not remote wakeable on that platform,
so we should set domain callbacks.
There was a patch in PM framework that squashes runtime suspend with
usual
Hi Andrew,
After merging the akpm-current tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
fs/proc/task_mmu.c: In function 'show_map_vma':
fs/proc/task_mmu.c:285:28: warning: unused variable 'priv' [-Wunused-variable]
struct proc_maps_private *priv = m->private;
Hi Andrew,
After merging the akpm-current tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
fs/proc/task_mmu.c: In function 'show_map_vma':
fs/proc/task_mmu.c:285:28: warning: unused variable 'priv' [-Wunused-variable]
struct proc_maps_private *priv = m->private;
Hello Huang,
On Tue, Aug 01, 2017 at 11:30:41AM +0800, Huang, Ying wrote:
> Hi, Horiguchi san,
>
> Naoya Horiguchi writes:
>
> > Hi,
> >
> > I found the following bug when testing mmotm-2017-07-31-16-56.
> > The triggering testcase just swaps in/out shmem pages.
> >
Hello Huang,
On Tue, Aug 01, 2017 at 11:30:41AM +0800, Huang, Ying wrote:
> Hi, Horiguchi san,
>
> Naoya Horiguchi writes:
>
> > Hi,
> >
> > I found the following bug when testing mmotm-2017-07-31-16-56.
> > The triggering testcase just swaps in/out shmem pages.
> > It seems to me related to
1) Handle notifier registry failures properly in tun/tap driver, from
Tonghao Zhang.
2) Fix bpf verifier handling of subtraction bounds and add a testcase
for this, from Edward Cree.
3) Increase reset timeout in ftgmac100 driver, from Ben Herrenschmidt.
4) Fix use after free in
1) Handle notifier registry failures properly in tun/tap driver, from
Tonghao Zhang.
2) Fix bpf verifier handling of subtraction bounds and add a testcase
for this, from Edward Cree.
3) Increase reset timeout in ftgmac100 driver, from Ben Herrenschmidt.
4) Fix use after free in
On Mon, Jul 31, 2017 at 10:11 PM, Linus Torvalds
wrote:
>
> And I just checked this on a separate branch, just because I wanted to
> see what the overall diff was. There's a conflict [..]
Side note: the overall patch looks fine to me. I like how it removes
On Mon, Jul 31, 2017 at 10:11 PM, Linus Torvalds
wrote:
>
> And I just checked this on a separate branch, just because I wanted to
> see what the overall diff was. There's a conflict [..]
Side note: the overall patch looks fine to me. I like how it removes
complexity and code. I didn't test it
On Mon, Jul 31, 2017 at 8:03 PM, Kees Cook wrote:
>
> Yeah, I'm open to whatever. It's not clear where it should go, but if
> you want to take it and Linus doesn't want it "early", that works for
> me. Linus, Andrew, thoughts?
I'd actually like this to go in separately
From: Rishabh Hardas
Solved a few coding style issues, used BIT macro to set MINORBITS.
Signed-off-by: Rishabh Hardas
---
drivers/staging/pi433/pi433_if.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff
On Mon, Jul 31, 2017 at 8:03 PM, Kees Cook wrote:
>
> Yeah, I'm open to whatever. It's not clear where it should go, but if
> you want to take it and Linus doesn't want it "early", that works for
> me. Linus, Andrew, thoughts?
I'd actually like this to go in separately from all the other
From: Rishabh Hardas
Solved a few coding style issues, used BIT macro to set MINORBITS.
Signed-off-by: Rishabh Hardas
---
drivers/staging/pi433/pi433_if.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/staging/pi433/pi433_if.c
Acked-by: Julia Lawall
On Mon, 31 Jul 2017, Gustavo A. R. Silva wrote:
> Coccinelle script to remove unnecessary static on local variables when
> the variables are not used before update.
>
> Signed-off-by: Gustavo A. R. Silva
> ---
> Changes in
Acked-by: Julia Lawall
On Mon, 31 Jul 2017, Gustavo A. R. Silva wrote:
> Coccinelle script to remove unnecessary static on local variables when
> the variables are not used before update.
>
> Signed-off-by: Gustavo A. R. Silva
> ---
> Changes in v2:
> Update header and Copyright note.
>
>
Here's an updated series for the proposed new IOCTLs. Major changes
since last time:
* Leave driver API with 32-bit vblank counts
* Use ktime_t instead of struct timespec.
* Check for MODESETTING before using modesetting APIs
* Ensure vblank is running in new get_sequence ioctl
There are
These provide crtc-id based functions instead of pipe-number, while
also offering higher resolution time (ns) and wider frame count (64)
as required by the Vulkan API.
v2:
* Check for DRIVER_MODESET in new crtc-based vblank ioctls
Failing to check this will oops the driver.
* Ensure
This modifies the datatypes used by the vblank code to provide both 64
bits of vblank count and switch to using ktime_t for timestamps to
increase resolution from microseconds to nanoseconds.
The driver interfaces have been left using 32 bits of vblank count;
all of the code necessary to widen
Here's an updated series for the proposed new IOCTLs. Major changes
since last time:
* Leave driver API with 32-bit vblank counts
* Use ktime_t instead of struct timespec.
* Check for MODESETTING before using modesetting APIs
* Ensure vblank is running in new get_sequence ioctl
There are
These provide crtc-id based functions instead of pipe-number, while
also offering higher resolution time (ns) and wider frame count (64)
as required by the Vulkan API.
v2:
* Check for DRIVER_MODESET in new crtc-based vblank ioctls
Failing to check this will oops the driver.
* Ensure
This modifies the datatypes used by the vblank code to provide both 64
bits of vblank count and switch to using ktime_t for timestamps to
increase resolution from microseconds to nanoseconds.
The driver interfaces have been left using 32 bits of vblank count;
all of the code necessary to widen
Place drm_event_vblank in a new union that includes that and a bare
drm_event structure. This will allow new members of that union to be
added in the future without changing code related to the existing vbl
event type.
Assignments to the crtc_id field are now done when the event is
allocated,
Place drm_event_vblank in a new union that includes that and a bare
drm_event structure. This will allow new members of that union to be
added in the future without changing code related to the existing vbl
event type.
Assignments to the crtc_id field are now done when the event is
allocated,
On 2017年08月01日 11:30, Vinod Koul wrote:
On Mon, Jul 31, 2017 at 06:47:34PM +0800, Cheng-Yi Chiang wrote:
From: "U. Artie Eoff"
Reset the hw_ptr before queuing the restore_stream_context
work to eradicate a nasty white audio noise on resume.
Liam, Jie? This on
On 2017年08月01日 11:30, Vinod Koul wrote:
On Mon, Jul 31, 2017 at 06:47:34PM +0800, Cheng-Yi Chiang wrote:
From: "U. Artie Eoff"
Reset the hw_ptr before queuing the restore_stream_context
work to eradicate a nasty white audio noise on resume.
Liam, Jie? This on legacy BYT driver..
Add pm_runtime* calls to cadence-quadspi driver. This is required to
switch on QSPI power domain on TI 66AK2G SoC during probe.
Signed-off-by: Vignesh R
---
drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
Add pm_runtime* calls to cadence-quadspi driver. This is required to
switch on QSPI power domain on TI 66AK2G SoC during probe.
Signed-off-by: Vignesh R
---
drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
Add DT node for Cadence QSPI IP present in 66AK2G SoC.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm/boot/dts/keystone-k2g.dtsi
index
Add DT node for Cadence QSPI IP present in 66AK2G SoC.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm/boot/dts/keystone-k2g.dtsi
index
As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
Controller programming sequence, a delay equal to couple QSPI master
clock(~5ns) is required after setting CQSPI_REG_INDIRECTWR_START bit and
writing data to the flash. Add a new compatible to handle the couple of
cycles of delay
As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
Controller programming sequence, a delay equal to couple QSPI master
clock(~5ns) is required after setting CQSPI_REG_INDIRECTWR_START bit and
writing data to the flash. Add a new compatible to handle the couple of
cycles of delay
66AK2G EVM has a s25fl512s flash connected to QSPI CS0. Add pinmux for
QSPI and DT entries for the same.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g-evm.dts | 69 ++
1 file changed, 69 insertions(+)
diff --git
On 2017-07-28 12:40, Kiran Gunda wrote:
v2:
* [PATCH V2 04/12] spmi: pmic-arb: optimize qpnpint_irq_set_type
function
Added Stephen's Reviewed-by tag.
* [PATCH V2 05/12] spmi: pmic-arb: fix memory allocation for
mapping_table
Added Fixes tag and Stephen's Reviewed-by tag.
* [PATCH V2
Cadence QSPI IP has a adapted loopback circuit which can be enabled by
setting BYPASS field to 0 in READCAPTURE register. It enables use of
QSPI return clock to latch the data rather than the internal QSPI
reference clock. For high speed operations, adapted loopback circuit
using QSPI return clock
This series adds support for Cadence QSPI for 66AK2G SoC. The first
three patches enhance the cadence-quadspi driver to support loopback
clock and pm_runtime and tweaks for 66AK2G SoC. Remaining patches add
DT nodes and enable the driver in defconfig.
Tested on 66AK2G GP and ICE boards.
Vignesh
66AK2G EVM has a s25fl512s flash connected to QSPI CS0. Add pinmux for
QSPI and DT entries for the same.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g-evm.dts | 69 ++
1 file changed, 69 insertions(+)
diff --git
On 2017-07-28 12:40, Kiran Gunda wrote:
v2:
* [PATCH V2 04/12] spmi: pmic-arb: optimize qpnpint_irq_set_type
function
Added Stephen's Reviewed-by tag.
* [PATCH V2 05/12] spmi: pmic-arb: fix memory allocation for
mapping_table
Added Fixes tag and Stephen's Reviewed-by tag.
* [PATCH V2
Cadence QSPI IP has a adapted loopback circuit which can be enabled by
setting BYPASS field to 0 in READCAPTURE register. It enables use of
QSPI return clock to latch the data rather than the internal QSPI
reference clock. For high speed operations, adapted loopback circuit
using QSPI return clock
This series adds support for Cadence QSPI for 66AK2G SoC. The first
three patches enhance the cadence-quadspi driver to support loopback
clock and pm_runtime and tweaks for 66AK2G SoC. Remaining patches add
DT nodes and enable the driver in defconfig.
Tested on 66AK2G GP and ICE boards.
Vignesh
66AK2G ICE board has a s25fl256s1 flash connected to QSPI CS0. Add
pinmux and DT entries for the same.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g-ice.dts | 69 ++
1 file changed, 69 insertions(+)
diff --git
66AK2G SoC has a Cadence QSPI IP. Therefore, enable cadence-quadspi
driver as part of keystone_defconfig. Since, QSPI flash can be used to
for root filesystem, built it into the kernel instead of module.
Signed-off-by: Vignesh R
---
arch/arm/configs/keystone_defconfig | 1 +
1
66AK2G ICE board has a s25fl256s1 flash connected to QSPI CS0. Add
pinmux and DT entries for the same.
Signed-off-by: Vignesh R
---
arch/arm/boot/dts/keystone-k2g-ice.dts | 69 ++
1 file changed, 69 insertions(+)
diff --git
66AK2G SoC has a Cadence QSPI IP. Therefore, enable cadence-quadspi
driver as part of keystone_defconfig. Since, QSPI flash can be used to
for root filesystem, built it into the kernel instead of module.
Signed-off-by: Vignesh R
---
arch/arm/configs/keystone_defconfig | 1 +
1 file changed, 1
Update the ti,omap-hsmmc.txt to include information about
66AK2G specific mmc controller. Also cleanup the entries
under optional properties to look a bit nicer.
Signed-off-by: Lokesh Vutla
---
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 52 +++---
1
Update the ti,omap-hsmmc.txt to include information about
66AK2G specific mmc controller. Also cleanup the entries
under optional properties to look a bit nicer.
Signed-off-by: Lokesh Vutla
---
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 52 +++---
1 file changed, 37
Enable the TI OMAP HSMMC and fixed regulator support
for keystone platforms.
Signed-off-by: Lokesh Vutla
---
arch/arm/configs/keystone_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/keystone_defconfig
b/arch/arm/configs/keystone_defconfig
Enable the TI OMAP HSMMC and fixed regulator support
for keystone platforms.
Signed-off-by: Lokesh Vutla
---
arch/arm/configs/keystone_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/keystone_defconfig
b/arch/arm/configs/keystone_defconfig
index
This series adds DT nodes and documentation for eDMA and MMC IPs on
Keystone 66AK2G SoC. Also enable the required configs in keystone_defconfig.
This series depends on Keerthy's gpio node patches on 66AK2G:
https://patchwork.kernel.org/patch/9864311/
Tested:
k2g-evm with rootfs on mmc:
Enable MMC0 which is used for micro SD and MMC1 which is used for the on
board EMMC.
Signed-off-by: Lokesh Vutla
[fcoo...@ti.com: add mmc1, bufferclass and pullup/pulldown settings]
Signed-off-by: Franklin S Cooper Jr
[nsek...@ti.com: add card detect GPIO
This series adds DT nodes and documentation for eDMA and MMC IPs on
Keystone 66AK2G SoC. Also enable the required configs in keystone_defconfig.
This series depends on Keerthy's gpio node patches on 66AK2G:
https://patchwork.kernel.org/patch/9864311/
Tested:
k2g-evm with rootfs on mmc:
Enable MMC0 which is used for micro SD and MMC1 which is used for the on
board EMMC.
Signed-off-by: Lokesh Vutla
[fcoo...@ti.com: add mmc1, bufferclass and pullup/pulldown settings]
Signed-off-by: Franklin S Cooper Jr
[nsek...@ti.com: add card detect GPIO support]
Signed-off-by: Sekhar Nori
Add device tree nodes for MMC0 and MMC1 pesent
on 66AK2G device.
Signed-off-by: Lokesh Vutla
[nsek...@ti.com: fix clock-names for mmc1 node]
Signed-off-by: Sekhar Nori
---
arch/arm/boot/dts/keystone-k2g.dtsi | 32
1 file
Add device tree nodes for MMC0 and MMC1 pesent
on 66AK2G device.
Signed-off-by: Lokesh Vutla
[nsek...@ti.com: fix clock-names for mmc1 node]
Signed-off-by: Sekhar Nori
---
arch/arm/boot/dts/keystone-k2g.dtsi | 32
1 file changed, 32 insertions(+)
diff --git
From: Peter Ujfalusi
Add nodes for eDMA0 and eDMA1.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Dave Gerlach
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/keystone-k2g.dtsi | 66
Update ti,edma binding documentation to reflect 66AK2G specific
properties.
Signed-off-by: Lokesh Vutla
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 95 +--
1 file changed, 90 insertions(+), 5 deletions(-)
diff --git
From: Peter Ujfalusi
Add nodes for eDMA0 and eDMA1.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Dave Gerlach
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/keystone-k2g.dtsi | 66 +
1 file changed, 66 insertions(+)
diff --git
Update ti,edma binding documentation to reflect 66AK2G specific
properties.
Signed-off-by: Lokesh Vutla
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 95 +--
1 file changed, 90 insertions(+), 5 deletions(-)
diff --git
Coccinelle script to remove unnecessary static on local variables when
the variables are not used before update.
Signed-off-by: Gustavo A. R. Silva
---
Changes in v2:
Update header and Copyright note.
scripts/coccinelle/misc/static_unnecessary.cocci | 96
Coccinelle script to remove unnecessary static on local variables when
the variables are not used before update.
Signed-off-by: Gustavo A. R. Silva
---
Changes in v2:
Update header and Copyright note.
scripts/coccinelle/misc/static_unnecessary.cocci | 96
1 file
Hi Ashish,
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v4.13-rc3 next-20170731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ashish-Kalra/staging-ks7010-fix
Hi Ashish,
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v4.13-rc3 next-20170731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ashish-Kalra/staging-ks7010-fix
This patch was originally submitted in the context of the ChromiumOS kernel
3.10 for BYT
(https://groups.google.com/a/chromium.org/forum/#!topic/chromium-os-reviews/AsoBhfHzQg8).
> -Original Message-
> From: Koul, Vinod
> Sent: Monday, July 31, 2017 8:30 PM
> To: Cheng-Yi Chiang
This patch was originally submitted in the context of the ChromiumOS kernel
3.10 for BYT
(https://groups.google.com/a/chromium.org/forum/#!topic/chromium-os-reviews/AsoBhfHzQg8).
> -Original Message-
> From: Koul, Vinod
> Sent: Monday, July 31, 2017 8:30 PM
> To: Cheng-Yi Chiang ; Jie,
Hi Ashish,
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v4.13-rc3 next-20170731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ashish-Kalra/staging-ks7010-fix
Hi Ashish,
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v4.13-rc3 next-20170731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ashish-Kalra/staging-ks7010-fix
This makes it possible to preserve basic futex support and compile out
the PI support when RT mutexes are not available.
Signed-off-by: Nicolas Pitre
---
include/linux/futex.h | 7 ++-
init/Kconfig| 7 ++-
kernel/futex.c
This makes it possible to preserve basic futex support and compile out
the PI support when RT mutexes are not available.
Signed-off-by: Nicolas Pitre
---
include/linux/futex.h | 7 ++-
init/Kconfig| 7 ++-
kernel/futex.c | 22
This driver provides PS/2 serio bus support by implementing bit banging
with the GPIO API. The GPIO pins, data and clock, can be configured with
a node in the device tree or by static platform data.
Writing to a device is supported as well, though it is not recommended as
the timings to be halt
This driver provides PS/2 serio bus support by implementing bit banging
with the GPIO API. The GPIO pins, data and clock, can be configured with
a node in the device tree or by static platform data.
Writing to a device is supported as well, though it is not recommended as
the timings to be halt
- On Aug 1, 2017, at 12:03 AM, Paul E. McKenney paul...@linux.vnet.ibm.com
wrote:
> On Tue, Aug 01, 2017 at 12:04:05AM +, Mathieu Desnoyers wrote:
>> - On Jul 31, 2017, at 12:13 PM, Paul E. McKenney
>> paul...@linux.vnet.ibm.com
>> wrote:
>>
>> > On Mon, Jul 31, 2017 at 01:50:29PM
- On Aug 1, 2017, at 12:03 AM, Paul E. McKenney paul...@linux.vnet.ibm.com
wrote:
> On Tue, Aug 01, 2017 at 12:04:05AM +, Mathieu Desnoyers wrote:
>> - On Jul 31, 2017, at 12:13 PM, Paul E. McKenney
>> paul...@linux.vnet.ibm.com
>> wrote:
>>
>> > On Mon, Jul 31, 2017 at 01:50:29PM
On Mon, 31 Jul 2017, Thomas Gleixner wrote:
> But I really do not agree with your reasoning about easier to understand
> and maintain. I have the dubious pleasure to stare into that code on a
> regular base. PI and non PI share a lot of code and it's really not helping
> to have two separate
On Mon, 31 Jul 2017, Thomas Gleixner wrote:
> But I really do not agree with your reasoning about easier to understand
> and maintain. I have the dubious pleasure to stare into that code on a
> regular base. PI and non PI share a lot of code and it's really not helping
> to have two separate
commit 3d89e5478bf550a50c99e93adf659369798263b0 upstream.
Commit:
e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU hotplug")
... set rq->prev_* to 0 after a CPU hotplug comes back, in order to
fix the case where (after CPU hotplug) steal time is smaller than
commit 3d89e5478bf550a50c99e93adf659369798263b0 upstream.
Commit:
e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU hotplug")
... set rq->prev_* to 0 after a CPU hotplug comes back, in order to
fix the case where (after CPU hotplug) steal time is smaller than
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