On Tue, Jun 23, 2020 at 12:47 AM Luc Van Oostenryck
wrote:
>
> Since the pre-git time the checker is run first, before the compiler.
> But if the source file contains some syntax error, the warnings from
> the compiler are more useful than those from sparse (and other
> checker most probably
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: dd0d718152e4c65b173070d48ea9dfc06894c3e5
commit: 652b4afb240e5dc196995597942309e89e89c767 staging: wfx: load firmware
date: 9 months ago
config: xtensa-randconfig-m031-20200623 (attached as .config)
Em Mon, 22 Jun 2020 11:22:09 -0600
Jonathan Corbet escreveu:
> On Mon, 22 Jun 2020 10:11:06 -0700
> Eric Biggers wrote:
>
> > Someone already sent out a fix for this:
> > https://lkml.kernel.org/linux-doc/52f851cb5c9fd2ecae97deec7e168e66b8c295c3.1591137229.git.mchehab+hua...@kernel.org/
No
Hello,
syzbot found the following crash on:
HEAD commit:7ae77150 Merge tag 'powerpc-5.8-1' of git://git.kernel.org..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11d6561510
kernel config: https://syzkaller.appspot.com/x/.config?x=be4578b3f1083656
On Tue, Jun 23, 2020 at 11:33:53AM +0900, Masahiro Yamada wrote:
> On Tue, Jun 23, 2020 at 4:02 AM Kees Cook wrote:
> >
> > Some builds of GCC enable stack protector by default. Simply removing
> > the arguments is not sufficient to disable stack protector, as the stack
> > protector for those
On Mon, Jun 22, 2020 at 05:03:31PM +0800, Shengjiu Wang wrote:
> The "ret" in fsl_easrc_set_ctx_format is not initialized, then
> the unknown value maybe returned by this function.
>
> Fixes: 955ac624058f ("ASoC: fsl_easrc: Add EASRC ASoC CPU DAI drivers")
> Signed-off-by: Shengjiu Wang
On Mon, Jun 22, 2020 at 05:27:20AM -0700, Tom Rix wrote:
> In addition to reviewing, I have run these changes on the pac a10 card and
> while i do not have an afu using interrupts, I have exercised some of the new
> interfaces.
>
> The most useful i have submitted to selftests drivers/fpga. In
On Tue, 23 Jun 2020 09:38:01 +0900
Masami Hiramatsu wrote:
> On Tue, 23 Jun 2020 08:47:06 +0900
> Masami Hiramatsu wrote:
>
> > On Mon, 22 Jun 2020 09:01:48 -0400
> > Steven Rostedt wrote:
> >
> > > On Mon, 22 Jun 2020 08:27:53 +0800
> > > Ming Lei wrote:
> > >
> > > > Can you kprobe guys
On Mon, Jun 22, 2020 at 6:58 PM Roman Gushchin wrote:
>
> Instead of having two sets of kmem_caches: one for system-wide and
> non-accounted allocations and the second one shared by all accounted
> allocations, we can use just one.
>
> The idea is simple: space for obj_cgroup metadata can be
On Mon, Jun 22, 2020 at 01:59:04PM -0700, Todd Kjos wrote:
> On Mon, Jun 22, 2020 at 1:18 PM Todd Kjos wrote:
> >
> > On Mon, Jun 22, 2020 at 1:09 PM Christian Brauner
> > wrote:
> > >
> > > On Mon, Jun 22, 2020 at 01:07:15PM -0700, Todd Kjos wrote:
> > > > The binder driver makes the assumption
On Mon, Jun 22, 2020 at 02:27:38PM -0700, Rick Lindsley wrote:
>
> On Mon, Jun 22, 2020 at 01:48:45PM -0400, Tejun Heo wrote:
>
> > It should be obvious that representing each consecutive memory range with a
> > separate directory entry is far from an optimal way of representing
> > something
Hi Viresh,
Thank you for the review. please find my reply inline.
+++ b/drivers/cpufreq/tegra194-cpufreq.c
@@ -0,0 +1,403 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved
2020
+ */
+
+#include
+#include
On Mon, Jun 22, 2020 at 6:58 PM Roman Gushchin wrote:
>
> Switch to per-object accounting of non-root slab objects.
>
> Charging is performed using obj_cgroup API in the pre_alloc hook.
> Obj_cgroup is charged with the size of the object and the size of
> metadata: as now it's the size of an
IPQ6018 uses the PMIC MP5496. Add the binding for the same.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
Convert qcom,smd-rpm-regulator.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 -
.../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++
2 files changed, 106 insertions(+), 321 deletions(-)
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator controls the
APSS and SDCC voltage scaling respectively. Add support for the same.
Signed-off-by: Kathiravan T
---
drivers/regulator/qcom_smd-regulator.c | 34 ++
1 file changed, 34 insertions(+)
diff
Convert the qcom,smd-rpm.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 63 ---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++
2 files changed, 92 insertions(+), 63 deletions(-)
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018
platform.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 005dd30..1a5226a 100644
---
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496
controls the APSS and SDCC voltage scaling respectively. Add support
for the same.
changes since V1:
- Moved YAML conversion to the last as per Mark's comments
Kathiravan T (6):
dt-bindings: soc: qcom: Add IPQ6018
With the current approach we have an extra check in the
cppc_cpufreq_get_rate() callback, which checks if hisilicon's get rate
implementation should be used instead. While it works fine, the approach
isn't very straight forward, over that we have an extra check in the
routine.
Rearrange code and
On Tue, Jun 23, 2020 at 12:08 AM Markus Elfring wrote:
>
> > Fix unchecked return value for clk_prepare_enable.
> >
> > And because clk_prepare_enable and clk_disable_unprepare should
> > check input clock parameter is NULL or not, then we don't need
> > to check it before calling the function.
>
Currently using attribute "energy_performance_preference", user space can
write one of the four per-defined preference string. These preference
strings gets mapped to a hard-coded Energy-Performance Preference (EPP) or
Energy-Performance Bias (EPB) knob.
These four values supposed to cover broad
By default intel_pstate driver disables energy efficiency by setting
MSR_IA32_POWER_CTL bit 19 for Kaby Lake desktop CPU model in HWP mode.
This CPU model is also shared by Coffee Lake desktop CPUs. This allows
these systems to reach maximum possible frequency. But this adds power
penalty, which
On Mon, 2020-06-22 at 20:03 +0200, Greg Kroah-Hartman wrote:
> On Mon, Jun 22, 2020 at 01:48:45PM -0400, Tejun Heo wrote:
> > Hello, Ian.
> >
> > On Sun, Jun 21, 2020 at 12:55:33PM +0800, Ian Kent wrote:
> > > > > They are used for hotplugging and partitioning memory. The
> > > > > size of
> > >
randconfig-a006-20200622
i386 randconfig-a002-20200622
i386 randconfig-a003-20200622
i386 randconfig-a001-20200622
i386 randconfig-a005-20200622
i386 randconfig-a004-20200622
x86_64 randconfig-a012-20200623
x86_64
On Mon, Jun 22, 2020 at 09:32:12PM -0700, Nitin Gupta wrote:
> On 6/22/20 7:26 PM, Nathan Chancellor wrote:
> > On Tue, Jun 16, 2020 at 01:45:27PM -0700, Nitin Gupta wrote:
> >> For some applications, we need to allocate almost all memory as
> >> hugepages. However, on a running system,
Hi Rob,
On 6/22/20, Rob Clark wrote:
> On Sun, Jun 21, 2020 at 12:58 AM Bjorn Andersson
> wrote:
>>
>> On Sun 21 Jun 00:40 PDT 2020, Avri Altman wrote:
>>
>> >
>> > >
>> > > On Wed, Apr 8, 2020 at 3:00 PM Asutosh Das
>> > > wrote:
>> > > >
>> > > > The write performance of TLC NAND is
On 6/22/20 7:26 PM, Nathan Chancellor wrote:
> On Tue, Jun 16, 2020 at 01:45:27PM -0700, Nitin Gupta wrote:
>> For some applications, we need to allocate almost all memory as
>> hugepages. However, on a running system, higher-order allocations can
>> fail if the memory is fragmented. Linux kernel
This patch changes the read I/O to the HPB read I/O.
If the logical address of the read I/O belongs to active sub-region, the
HPB driver modifies the read I/O command to HPB read. It modifies the upiu
command of UFS instead of modifying the existing SCSI command.
In the HPB version 1.0, the
This is a patch for managing L2P map in HPB module.
The HPB divides logical addresses into several regions. A region consists
of several sub-regions. The sub-region is a basic unit where L2P mapping is
managed. The driver loads L2P mapping data of each sub-region. The loaded
sub-region is called
On 06/23/2020 10:26 AM, Nathan Chancellor wrote:
> On Tue, Jun 16, 2020 at 01:45:27PM -0700, Nitin Gupta wrote:
>> For some applications, we need to allocate almost all memory as
>> hugepages. However, on a running system, higher-order allocations can
>> fail if the memory is fragmented. Linux
If users don't specify NUMA node, the driver will use the ZIP module near
the CPU allocating acomp. Otherwise, it uses the ZIP module according to
the requirement of users.
Cc: Zhou Wang
Signed-off-by: Barry Song
---
drivers/crypto/hisilicon/zip/zip.h| 2 +-
For a Linux server with NUMA, there are possibly multiple (de)compressors
which are either local or remote to some NUMA node. Some drivers will
automatically use the (de)compressor near the CPU calling acomp_alloc().
However, it is not necessarily correct because users who send acomp_req
could be
For a typical Linux server, probably there are several hardware modules.
For example, numa node0 has a compressor, numa node2 has a same module.
Some drivers are automatically using the module near the CPU calling
acomp_alloc.
But it isn't necessarily correct. Just like memory allocation API like
zswap is allocating acomp on one different cpu with those cpus which will
eventually committing acomp_req. this patch specifies the numa node to
help compression/decompression done by local (de)compressors hardware.
Cc: Seth Jennings
Cc: Dan Streetman
Cc: Vitaly Wool
Cc: Herbert Xu
Cc: David
From: Aiden Leong
Date: Mon, 22 Jun 2020 20:04:58 -0700
> Fix a typo in gue.h
>
> Signed-off-by: Aiden Leong
Applied, thank you.
Change the default TCS wait behavior to only wait for completion in AMC
and WAKE. Waiting isn't necessary in the SLEEP TCS, since votes are only
being removed in this case. Resources can be safely disabled
asynchronously in parallel with the rest of the power collapse sequence.
This reduces the
Small BW votes that translate to less than a single BCM unit are
currently truncated to zero. Ensure that non-zero BW requests always
result in at least a vote of 1 to BCM.
Fixes: 976daac4a1c5 ("interconnect: qcom: Consolidate interconnect RPMh
support")
Signed-off-by: Mike Tipton
---
On 22-06-20, 15:13, Charles Keepax wrote:
> On Mon, Jun 22, 2020 at 08:28:48AM -0500, Pierre-Louis Bossart wrote:
> > On 6/22/20 1:58 AM, Vinod Koul wrote:
+--+
> > a) can you clarify if we can go from running to free directly? is
> > this really a legit transition?
Networking changes must be submitted with net...@vger.kernel.org
Thank you.
Currently, bcm-voter always assumes requests are made in KBps and that
BCM HW always wants them in Bps, so it always scales the requests by
1000. However, certain use cases and BCMs may use different units.
Thus, add support for BCM-specific scaling factors.
Signed-off-by: Mike Tipton
---
These changes are mostly unrelated, but there are some dependencies
between them.
Mike Tipton (4):
interconnect: qcom: Support bcm-voter-specific TCS wait behavior
interconnect: qcom: Only wait for completion in AMC/WAKE by default
interconnect: qcom: Add support for per-BCM scaling factors
Currently, all bcm-voters set tcs_cmd::wait=true for the last VCD
command in each TCS (AMC, WAKE, and SLEEP). However, some bcm-voters
don't need the completion and instead need to optimize for latency. For
instance, disabling wait-for-completion in the WAKE set can decrease
resume latency and
This patch fixes a spelling typo in irq-riscv-intc.c
Signed-off-by: Greentime Hu
---
drivers/irqchip/irq-riscv-intc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index a6f97fa6ff69..8017f6d32d52 100644
From: Geliang Tang
Date: Mon, 22 Jun 2020 19:45:58 +0800
> In RFC 8684, we don't need to send sndr_key in SYN package anymore, so drop
> it.
>
> Fixes: cc7972ea1932 ("mptcp: parse and emit MP_CAPABLE option according to v1
> spec")
> Signed-off-by: Geliang Tang
Applied and queued up for
Replace internal bucket/tag macros with those defined in dt-bindings.
Signed-off-by: Mike Tipton
---
drivers/interconnect/qcom/icc-rpmh.h | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/interconnect/qcom/icc-rpmh.h
Add generic qcom interconnect bindings that are common across platforms. In
particular, these include QCOM_ICC_TAG_* macros that clients can use when
calling icc_set_tag().
Signed-off-by: Mike Tipton
---
include/dt-bindings/interconnect/qcom,icc.h | 26 +
1 file changed, 26
Add common dt-bindings to replace internal macros.
Mike Tipton (2):
dt-bindings: interconnect: Add generic qcom bindings
interconnect: qcom: Don't redefine bucket/tag macros
drivers/interconnect/qcom/icc-rpmh.h| 18 ++
include/dt-bindings/interconnect/qcom,icc.h | 26
On 22-06-20, 08:28, Pierre-Louis Bossart wrote:
>
>
> On 6/22/20 1:58 AM, Vinod Koul wrote:
> > So we had some discussions of the stream states, so I thought it is a
> > good idea to document the state transitions, so add it documentation
> >
> > Signed-off-by: Vinod Koul
> > ---
> >
Add support for setting debounce on a line via the GPIO uAPI.
Where debounce is not supported by hardware, a software debounce is
provided.
Signed-off-by: Kent Gibson
---
The implementation of the software debouncer waits for the line to be
stable for the debounce period before determining if
Extend gpio-event-mon to support monitoring multiple lines.
This would require multiple lineevent requests to implement using uAPI V1,
but can be performed with a single line request using uAPI V2.
Signed-off-by: Kent Gibson
---
tools/gpio/gpio-event-mon.c | 41
Add support for debouncing monitored lines to gpio-event-mon.
Signed-off-by: Kent Gibson
---
tools/gpio/gpio-event-mon.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tools/gpio/gpio-event-mon.c b/tools/gpio/gpio-event-mon.c
index d8d692f67b9e..ec90e44389dc
Update all the GPIO tools to use uAPI V2 instead of uAPI V1.
The tools command lines and behaviour remain unchanged, although lsgpio
now reports additional information not available through V1, specifically
the edge detection and debounce configuration.
Signed-off-by: Kent Gibson
---
Add a build option to allow the removal of the CDEV v1 ABI.
Suggested-by: Bartosz Golaszewski
Signed-off-by: Kent Gibson
---
This patch is before the V2 implementation, and is non-functional until
that patch, as some parts of that patch would be written slightly
differently if removing V1 was
Update uAPI documentation to deprecate V1 structs and ioctls.
Signed-off-by: Kent Gibson
---
include/uapi/linux/gpio.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
index e4ed6f79e332..752d63f56b0d 100644
This is a patch for the HPB module.
The HPB module queries UFS for device information during initialization.
We added the export symbol to two functions in ufshcd.c to initialize
the HPB module.
The HPB module can be loaded or built-in as needed.
The mininum size of the memory pool used in the
Report the state of edge detection for a line in the gpioline_info_v2
returned by GPIO_GET_LINEINFO_V2_IOCTL, and indirectly for lines watched
by GPIO_GET_LINEINFO_WATCH_V2_IOCTL.
Signed-off-by: Kent Gibson
---
drivers/gpio/gpiolib-cdev.c | 14 ++
drivers/gpio/gpiolib.c | 2
Reset the timestamp field to 0 after using it in lineevent_irq_thread.
The timestamp is set by lineevent_irq_handler and is tested by
lineevent_irq_thread to determine if it is called from a nested theaded
interrupt.
lineevent_irq_thread is assuming that the nested, or otherwise, status
of the
Replace constant array sizes with a macro constant to clarify the source
of array sizes, provide a place to document any constraints on the size,
and to simplify array sizing in userspace if constructing structs
from their composite fields.
Signed-off-by: Kent Gibson
---
This change is not
Make the gpiolib-cdev module a build option. This allows the CDEV
interface to be removed from the kernel to reduce kernel size in
applications where is it not required, and provides the parent for
other other CDEV interface specific build options to follow.
Suggested-by: Bartosz Golaszewski
Remove pointless decrement of variable, and associated comment.
While i is used subsequently, it is re-initialized so this decrement
serves no purpose.
Signed-off-by: Kent Gibson
---
drivers/gpio/gpiolib-cdev.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpio/gpiolib-cdev.c
Hi Chun-Kuang,
On Sun, 2020-06-21 at 07:36 +0800, Chun-Kuang Hu wrote:
> Hi, Neal:
>
> Neal Liu 於 2020年6月20日 週六 上午11:18寫道：
> >
> > Hi Chun-Kuang,
> >
> > Thanks for your quick feedback.
> >
> > On Sat, 2020-06-20 at 00:25 +0800, Chun-Kuang Hu wrote:
> > > Hi, Neal:
> > >
> > > Neal Liu 於
Add implementation of the V2 uAPI up to parity with V1.
Signed-off-by: Kent Gibson
---
This patch only covers the V2 functionality that is a direct analogue of
the V1. New V2 functionality is added in subsequent patches.
The core of the implementation is the struct line, which is drawn from
Remove recalculation of offset from desc, where desc itself was calculated
from offset.
There is no benefit from for the desc -> hwgpio conversion in this
context. The only implicit benefit of the offset -> desc -> hwgpio is
the range check in the offset -> desc, but where desc is required you
Add a new version of the uAPI to address existing 32/64bit alignment
issues, add support for debounce and event sequence numbers, and provide
some future proofing by adding padding reserved for future use.
The alignment issue relates to the gpioevent_data, which packs to different
sizes on 32bit
Merge separate usage of test_bit/set_bit into test_and_set_bit to remove
the possibility of a race between the test and set.
Similarly test_bit and clear_bit.
In the existing code it is possible for two threads to race past the
test_bit and then set or clear the watch bit, and neither return
Rename numdescs to num_descs to be more consistent with the naming of
other counters and improve readability.
Signed-off-by: Kent Gibson
---
drivers/gpio/gpiolib-cdev.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/gpiolib-cdev.c
Rename priv to gcdev to improve readability.
The name "priv" indicates that the object is pointed to by
file->private_data, not what the object is actually is.
It is always used to point to a struct gpio_chardev_data so renaming
it to gcdev seemed as good as anything, and certainly clearer than
Make indentation consistent with other use to improve readability.
Signed-off-by: Kent Gibson
---
drivers/gpio/gpiolib-cdev.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index
Refactor the mapping from handle flags to desc flags into a helper
function.
The assign_bit is overkill where it is replacing the set_bit cases, as is
rechecking bits known to be clear in some circumstances, but the DRY
simplification more than makes up for any performance degradation,
especially
Rename 'filep' and 'filp' to 'file' to be consistent with other use
and improve readability.
Signed-off-by: Kent Gibson
---
The code was using both "filep" and "filp" and I flip flopped between
which one to change to until looking at code elsewhere in the kernel
where "struct file *file" is
Sort the includes of gpiolib-cdev.c to make it easier to identify if a
module is included and to avoid duplication.
Signed-off-by: Kent Gibson
---
drivers/gpio/gpiolib-cdev.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git
This patchset defines and implements adds a new version of the
GPIO CDEV uAPI to address existing 32/64bit alignment issues, add
support for debounce and event sequence numbers, and provide some
future proofing by adding padding reserved for future use.
The series can be partitioned into three
Move gpiolib-sysfs function declarations into their own header.
These functions are in gpiolib-sysfs.c, and are only required by gpiolib.c,
and so should be in a module header, not giolib.h.
This brings gpiolib-sysfs into line with gpiolib-cdev, and is another step
towards removing the sysfs
From: Gaurav Singh
Date: Sun, 21 Jun 2020 22:24:30 -0400
> arg cannot be NULL since its already being dereferenced
> before. Remove the redundant NULL check.
>
> Signed-off-by: Gaurav Singh
Applied, thank you.
From: Stephen Rothwell
Date: Tue, 23 Jun 2020 13:51:34 +1000
> I have added the following merge fix patch.
>
> From: Stephen Rothwell
> Date: Tue, 23 Jun 2020 13:43:06 +1000
> Subject: [PATCH] net/core/devlink.c: remove new uninitialized_var() usage
>
> Signed-off-by: Stephen Rothwell
On Mon, Jun 01, 2020 at 10:06:19AM +0800, peng@nxp.com wrote:
> From: Peng Fan
>
> The devices could be enumerated properly with aliases.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> diff --git
This patch is adding UFS feature layer to UFS core driver.
UFS Driver data structure (struct ufs_hba)
│
┌--┐
│ UFS feature │ <-- HPB module
│layer │ <-- other extended feature module
└--┘
Each extended UFS-Feature module has a bus of ufs-ext feature
On Mon, Jun 01, 2020 at 10:06:17AM +0800, peng@nxp.com wrote:
> From: Peng Fan
>
> Minor patchset to fix and update alias for i.MX8QXP
>
> Peng Fan (3):
> arm64: dts: imx8qxp: add alias for lsio MU
> arm64: dts: imx8qxp: add i2c aliases
> arm64: dts: imx8qxp: Add ethernet alias
This is a patch for parameters to be used for UFS features layer and HPB
module.
Signed-off-by: Daejun Park
---
drivers/scsi/ufs/ufs.h | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
index f8ab16f30fdc..ae557b8d3eba 100644
---
On 23/06/2020 12:43, Leonardo Bras wrote:
> On Tue, 2020-06-23 at 12:35 +1000, Alexey Kardashevskiy wrote:
>>> I am not sure if this is true in general, but in this device (SR-IOV
>>> VF) I am testing it will return 0 windows if the default DMA window is
>>> not deleted, and 1 after it's
Hi all,
After merging the kspp tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
net/core/devlink.c: In function 'devlink_nl_port_function_attrs_put':
net/core/devlink.c:586:3: warning: parameter names (without types) in function
declaration
586 | int
Hi Sasha,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.8-rc2 next-20200622]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git
From: Gaurav Singh
Date: Sun, 21 Jun 2020 11:30:17 -0400
> Fix check in ethtool_rx_flow_rule_create
>
> Signed-off-by: Gaurav Singh
Applied and queued up for -stable with the following Fixes: tag added:
Fixes: eca4205f9ec3 ("ethtool: add ethtool_rx_flow_spec to flow_rule structure
On Thu, May 28, 2020 at 12:53:16PM -0700, Tim Harvey wrote:
> The GW54xx has a PCIe based GbE as the 2nd ethernet device. The
> boot firmware will populate the local-mac-address field of the
> device aliased to ethernet1 thus adding the PCIe device to
> dt allows boot firmware to set its MAC
On Thu, May 28, 2020 at 12:53:03PM -0700, Tim Harvey wrote:
> The GW53xx has a PCIe based GbE as the 2nd ethernet device. The
> boot firmware will populate the local-mac-address field of the
> device aliased to ethernet1 thus adding the PCIe device to
> dt allows boot firmware to set its MAC
> From: Stephen Boyd
> Sent: Saturday, June 20, 2020 11:28 AM
> Subject: RE: [PATCH V2 3/9] clk: imx: Support building SCU clock driver as
> module
>
> Quoting Aisheng Dong (2020-06-17 18:58:51)
> > > From: Anson Huang
> > > > > +obj-$(CONFIG_MXC_CLK_SCU) += mxc-clk-scu.o
> > > >
> > > > Like
dev cannot be NULL here since its already being accessed
before. Remove the redundant null check.
Signed-off-by: Gaurav Singh
---
net/decnet/dn_route.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/decnet/dn_route.c b/net/decnet/dn_route.c
index
On Thu, May 28, 2020 at 02:43:43PM +, Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> The WDOG_ANY signal is connected to the RESET_IN signal of the SoM
> and baseboard. It is currently configured as push-pull, which means
> that if some external device like a programmer wants to assert
From: Christian Brauner
Date: Tue, 23 Jun 2020 01:43:11 +0200
> diff --git a/arch/sparc/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
> index db42b4fb3708..192f3a28a2b7 100644
> --- a/arch/sparc/kernel/syscalls.S
> +++ b/arch/sparc/kernel/syscalls.S
> @@ -86,19 +86,22 @@ sys32_rt_sigreturn:
>
On Wed, 2020-06-17 at 15:05 +0800, Weiyi Lu wrote:
> This series is based on v5.8-rc1
>
Hi Matthias,
Gentle ping. Many thanks.
> change since v15:
> - remove unneeded error log in [PATCH 06/11]
>
> changes since v14:
> - fix commit message typo
> - use property name "mediatek,smi" for smi
KCSAN report there's a data race risk while using nr_threads.
But according to the comment above it:
'
/*
* If multiple threads are within copy_process(), then this check
* triggers too late. This doesn't hurt, the check is only there
* to stop root fork bombs.
randconfig-a004-20200622
x86_64 randconfig-a002-20200622
x86_64 randconfig-a003-20200622
x86_64 randconfig-a005-20200622
x86_64 randconfig-a001-20200622
x86_64 randconfig-a006-20200622
i386 randconfig-a006-20200622
i386
The flow is allocated in qrtr_tx_wait, but not freed when qrtr node
is released. (*slot) becomes NULL after radix_tree_iter_delete is
called in __qrtr_node_release. The fix is to save (*slot) to a
vairable and then free it.
This memory leak is catched when kmemleak is enabled in kernel,
the
Hi,
>
> Hi,
>
> On 22/06/2020 10:03:25+, Johnson CH Chen (陳昭勳) wrote:
> > Hello all,
> >
> > This patch set uses MFD structure for DS1374 so that RTC and Watchdog
> > functions can be separately. Therefore, we can add more Watchdog
> > subfunctions here.
> >
> > A DS1374 MFD core driver
On 2020-06-22 05:42, Luis Chamberlain wrote:
> On Sat, Jun 20, 2020 at 11:07:43AM -0700, Bart Van Assche wrote:
>> On 2020-06-19 13:47, Luis Chamberlain wrote:
>>> We were only creating the request_queue debugfs_dir only
>>> for make_request block drivers (multiqueue), but never for
>>>
On Mon, Jun 22, 2020 at 10:33 PM Nick Desaulniers
wrote:
>
> On Mon, Jun 22, 2020 at 8:50 AM Sedat Dilek wrote:
> >
> > When building with LLVM_IAS=1 means using Clang's Integrated Assembly (IAS)
> > from LLVM/Clang >= v10.0.1-rc1+ instead of GNU/as from GNU/binutils
> > I see the following
When building with LLVM_IAS=1 means using Clang's Integrated Assembly (IAS)
from LLVM/Clang >= v10.0.1-rc1+ instead of GNU/as from GNU/binutils
I see the following breakage in Debian/testing AMD64:
:15:74: error: too many positional arguments
PRECOMPUTE 8*3+8(%rsp), %xmm1, %xmm2, %xmm3, %xmm4,
Fix a typo in gue.h
Signed-off-by: Aiden Leong
---
include/net/gue.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/net/gue.h b/include/net/gue.h
index 3a6595bfa641..e42402f180b7 100644
--- a/include/net/gue.h
+++ b/include/net/gue.h
@@ -21,7 +21,7 @@
* |
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