Bring the PLE(pause loop exit) logic to AMD svm driver.
We have noticed it help in situations where numerous pauses are generated
due to spinlock or other scenarios. Tested it with idle=poll and noticed
pause interceptions go down considerably.
Signed-off-by: Babu Moger
---
arch/x86/kvm/svm.c
zero and pause
intercept is enabled, a #VMEXIT is triggered. If advanced pause filtering
is supported and pause Filter Threshold field is set to zero, the filter
will operate in the simpler, count only mode.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h | 3 ++-
arch/x86/kvm/svm.c
On 7/6/2017 3:24 AM, Max Filippov wrote:
Hi Babu,
On Tue, Jul 4, 2017 at 10:19 AM, Babu Moger wrote:
Max, Do you have any concerns about xtensa?
no, not ATM. I still haven't got a chance to look closer at moving endianness
macros back to Kconfig for xtensa.
Thanks. Greg, Can you please
On 7/6/2017 9:33 AM, Greg KH wrote:
On Thu, Jul 06, 2017 at 09:28:06AM -0500, Babu Moger wrote:
On 7/6/2017 3:24 AM, Max Filippov wrote:
Hi Babu,
On Tue, Jul 4, 2017 at 10:19 AM, Babu Moger wrote:
Max, Do you have any concerns about xtensa?
no, not ATM. I still haven't got a chance
On 7/6/2017 10:51 AM, Greg KH wrote:
On Thu, Jul 06, 2017 at 10:28:03AM -0500, Babu Moger wrote:
On 7/6/2017 9:33 AM, Greg KH wrote:
On Thu, Jul 06, 2017 at 09:28:06AM -0500, Babu Moger wrote:
On 7/6/2017 3:24 AM, Max Filippov wrote:
Hi Babu,
On Tue, Jul 4, 2017 at 10:19 AM, Babu Moger
is not defined on big endian
architecture and also warn if it defined on little endian architectures.
Here is our original discussion
https://lkml.org/lkml/2017/5/24/620
Signed-off-by: Babu Moger
Suggested-by: Arnd Bergmann
Acked-by: Geert Uytterhoeven
---
include/linux/byteorder/big_endian.h
ded the choice statement for endianness selection for microblaze.
Updated the Makefile for microblaze(Suggested by Arnd Bergmann) to
properly compile for the correct format.
Updated acks.
v1 -> v2:
Updated the commit messages and acks.
Babu Moger (3):
arch: Define CPU_BIG_ENDIAN for all fixed big
/earlycon.c
drivers/tty/serial/serial_core.c
Be aware that this may cause regressions if someone has worked-around
problems in the above code already. Remove the work-around.
Here is our original discussion
https://lkml.org/lkml/2017/5/24/620
Signed-off-by: Babu Moger
Suggested-by: Arnd Bergmann
microblaze architectures can be configured for either little or
big endian formats. Add a choice option for the user to select the
correct endian format(default to big endian).
Also update the Makefile so toolchain can compile for the format
it is configured for.
Signed-off-by: Babu Moger
On 7/4/2017 4:09 AM, Geert Uytterhoeven wrote:
Hi Greg,
On Tue, Jul 4, 2017 at 10:04 AM, Greg KH wrote:
On Tue, Jul 04, 2017 at 09:15:55AM +0200, Geert Uytterhoeven wrote:
On Mon, Jul 3, 2017 at 4:58 PM, Greg KH wrote:
USB/PHY patches for 4.13-rc1
Heikki Krogerus (3):
usb: typec:
On 1/20/21 3:14 PM, Jim Mattson wrote:
> On Tue, Jan 19, 2021 at 3:45 PM Babu Moger wrote:
>>
>>
>>
>> On 1/19/21 5:01 PM, Jim Mattson wrote:
>>> On Mon, Sep 14, 2020 at 11:33 AM Babu Moger wrote:
>>>
>>>> Thanks Paolo. Te
On 1/20/21 3:45 PM, Babu Moger wrote:
>
>
> On 1/20/21 3:14 PM, Jim Mattson wrote:
>> On Tue, Jan 19, 2021 at 3:45 PM Babu Moger wrote:
>>>
>>>
>>>
>>> On 1/19/21 5:01 PM, Jim Mattson wrote:
>>>> On Mon, Sep 14, 2020 at 11:33 AM
On 1/19/21 5:45 PM, Sean Christopherson wrote:
> On Tue, Jan 19, 2021, Babu Moger wrote:
>>
>> On 1/19/21 12:31 PM, Sean Christopherson wrote:
>>> On Fri, Jan 15, 2021, Babu Moger wrote:
>>>> @@ -3789,7 +3792,10 @@ static __no_kcsan fastpath_t svm_
On 1/21/21 5:51 PM, Babu Moger wrote:
>
>
> On 1/20/21 9:10 PM, Babu Moger wrote:
>>
>>
>> On 1/20/21 3:45 PM, Babu Moger wrote:
>>>
>>>
>>> On 1/20/21 3:14 PM, Jim Mattson wrote:
>>>> On Tue, Jan 19, 2021 at 3:45 PM Babu Mog
On 1/20/21 9:10 PM, Babu Moger wrote:
>
>
> On 1/20/21 3:45 PM, Babu Moger wrote:
>>
>>
>> On 1/20/21 3:14 PM, Jim Mattson wrote:
>>> On Tue, Jan 19, 2021 at 3:45 PM Babu Moger wrote:
>>>>
>>>>
>>>>
>>>> On 1
On 1/19/21 12:31 PM, Sean Christopherson wrote:
> On Fri, Jan 15, 2021, Babu Moger wrote:
>> ---
>> arch/x86/include/asm/svm.h |4 +++-
>> arch/x86/kvm/svm/sev.c |4
>> arch/x86/kvm/svm/svm.c | 19 +++
>> 3 files chang
On 1/19/21 5:01 PM, Jim Mattson wrote:
> On Mon, Sep 14, 2020 at 11:33 AM Babu Moger wrote:
>
>> Thanks Paolo. Tested Guest/nested guest/kvm units tests. Everything works
>> as expected.
>
> Debian 9 does not like this patch set. As a kvm guest, it panics on a
&
.
v1:
https://lore.kernel.org/kvm/160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu/
Babu Moger (2):
x86/cpufeatures: Add the Virtual SPEC_CTRL feature
KVM: SVM: Add support for Virtual SPEC_CTRL
arch/x86/include/asm/cpufeatures.h |1 +
arch/x86/include/asm/svm.h
Newer AMD processors have a feature to virtualize the use of the
SPEC_CTRL MSR. Presence of this feature is indicated via CPUID
function 0x800A_EDX[20]: GuestSpecCtrl. When present, the
SPEC_CTRL MSR is automatically virtualized.
Signed-off-by: Babu Moger
Acked-by: Borislav Petkov
---
arch
, the guest will always see the proper value when it is read back.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h |4 +++-
arch/x86/kvm/svm/sev.c |4
arch/x86/kvm/svm/svm.c | 19 +++
3 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/arch/x86
1959784252237488867.stgit@bmoger-ubuntu/
Babu Moger (12):
KVM: SVM: Introduce vmcb_(set_intercept/clr_intercept/_is_intercept)
KVM: SVM: Change intercept_cr to generic intercepts
KVM: SVM: Change intercept_dr to generic intercepts
KVM: SVM: Modify intercept_exceptions to gen
This is in preparation for the future intercept vector additions.
Add new functions vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
using kernel APIs __set_bit, __clear_bit and test_bit espectively.
Signed-off-by: Babu Moger
---
arch/x86/kvm/svm/svm.h | 15 +++
1
Change intercept_cr to generic intercepts in vmcb_control_area.
Use the new vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
where applicable.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h | 42 --
arch/x86/kvm/svm/nested.c
the links below:
Link: https://www.amd.com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h |7 +++
arch/x86/kvm/svm/nested.c |3 ++-
arch/x86/kvm/trace.h
Modify intercept_dr to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
to set/clear/test the intercept_dr bits.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h | 36 ++--
arch/x86
Convert all the intercepts to one array of 32 bit vectors in
vmcb_control_area. This makes it easy for future intercept vector
additions. Also update trace functions.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 14 +++---
arch/x86/kvm/svm
host_intercept_exceptions is not used anywhere. Clean it up.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/nested.c |2 --
arch/x86/kvm/svm/svm.h|1 -
2 files changed, 3 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
index
Remove set_cr_intercept, clr_cr_intercept and is_cr_intercept. Instead
call generic svm_set_intercept, svm_clr_intercept an dsvm_is_intercep
tfor all cr intercepts.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 34 +-
arch/x86
Remove set_exception_intercept and clr_exception_intercept.
Replace with generic set_intercept and clr_intercept for these calls.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 20 ++--
arch/x86/kvm/svm/svm.h | 18 --
2 files
Modify intercept_exceptions to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept to
set/clear/test the intercept_exceptions bits.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 22
Handling of kvm_read/write_guest_virt*() errors can be moved to common
code. The same code can be used by both VMX and SVM.
Signed-off-by: Babu Moger
---
arch/x86/kvm/vmx/nested.c | 12 ++--
arch/x86/kvm/vmx/vmx.c| 29 +
arch/x86/kvm/vmx/vmx.h
INVPCID instruction handling is mostly same across both VMX and
SVM. So, move the code to common x86.c.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/vmx/vmx.c | 68 +-
arch/x86/kvm/x86.c | 78
com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/uapi/asm/svm.h |2 ++
arch/x86/kvm/svm/svm.c | 51 +++
2 files changed, 53
On 8/26/20 3:55 PM, Jim Mattson wrote:
> On Wed, Aug 26, 2020 at 12:14 PM Babu Moger wrote:
>>
>> Modify intercept_exceptions to generic intercepts in vmcb_control_area. Use
>> the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
> https://lore.kernel.org/lkml/159234483706.6230.13753828995249423191.stgit
> @bmoger-ubuntu/
> - Taken care of few comments from Jim Mattson.
> - KVM interceptions added only when tdp is off. No interceptions
> when tdp is on.
> - Reverted the fault priority to o
On 9/12/20 12:08 PM, Paolo Bonzini wrote:
> On 11/09/20 21:27, Babu Moger wrote:
>> The following series adds the support for PCID/INVPCID on AMD guests.
>> While doing it re-structured the vmcb_control_area data structure to
>> combine all the intercept vectors into on
Modify intercept_exceptions to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept to
set/clear/test the intercept_exceptions bits.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 22
Handling of kvm_read/write_guest_virt*() errors can be moved to common
code. The same code can be used by both VMX and SVM.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/vmx/nested.c | 12 ++--
arch/x86/kvm/vmx/vmx.c| 29 +
arch
Convert all the intercepts to one array of 32 bit vectors in
vmcb_control_area. This makes it easy for future intercept vector
additions. Also update trace functions.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 14 +++---
arch/x86/kvm/svm
Remove set_exception_intercept and clr_exception_intercept.
Replace with generic set_intercept and clr_intercept for these calls.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 20 ++--
arch/x86/kvm/svm/svm.h | 18 --
2 files
INVPCID instruction handling is mostly same across both VMX and
SVM. So, move the code to common x86.c.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/vmx/vmx.c | 68 +-
arch/x86/kvm/x86.c | 78
the links below:
Link: https://www.amd.com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h |7 +++
arch/x86/kvm/svm/nested.c |3 ++-
arch/x86/kvm/trace.h
Remove set_cr_intercept, clr_cr_intercept and is_cr_intercept. Instead
call generic svm_set_intercept, svm_clr_intercept an dsvm_is_intercep
tfor all cr intercepts.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 34 +-
arch/x86
host_intercept_exceptions is not used anywhere. Clean it up.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/nested.c |2 --
arch/x86/kvm/svm/svm.h|1 -
2 files changed, 3 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
index
Modify intercept_dr to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
to set/clear/test the intercept_dr bits.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 36
com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/uapi/asm/svm.h |2 ++
arch/x86/kvm/svm/svm.c | 51 +++
2 files changed, 53
tions added only when tdp is off. No interceptions
when tdp is on.
- Reverted the fault priority to original order in VMX.
v1:
https://lore.kernel.org/lkml/159191202523.31436.11959784252237488867.stgit@bmoger-ubuntu/
Babu Moger (12):
KVM: SVM: Introduce vmcb_(set_intercept/cl
This is in preparation for the future intercept vector additions.
Add new functions vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
using kernel APIs __set_bit, __clear_bit and test_bit espectively.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.h
Change intercept_cr to generic intercepts in vmcb_control_area.
Use the new vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
where applicable.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 42 --
arch
Sean, Your response did not land in my mailbox for some reason.
Replying using In-reply-to option.
>Hrm, is MSR_AMD64_VIRT_SPEC_CTRL only for SSBD? Should that MSR be renamed to
>avoid confusion with the new form of VIRT_SPEC_CTRL?
We can rename it to MSR_AMD64_VIRT_SSBD_SPEC_CTRL if that is
CH 2/2] KVM: SVM: Add support for Virtual SPEC_CTRL
>
> On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
> >
> > Newer AMD processors have a feature to virtualize the use of the
> > SPEC_CTRL MSR. When supported, the SPEC_CTRL MSR is automatically
> > virtualized and
On 12/10/20 3:36 PM, Jim Mattson wrote:
> On Thu, Dec 10, 2020 at 1:26 PM Babu Moger wrote:
>>
>> Hi Jim,
>>
>>> -Original Message-
>>> From: Jim Mattson
>>> Sent: Monday, December 7, 2020 5:06 PM
>>> To: Moger, Babu
On 12/7/20 5:22 PM, Jim Mattson wrote:
> On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
>>
>> Newer AMD processors have a feature to virtualize the use of the SPEC_CTRL
>> MSR. This feature is identified via CPUID 0x800A_EDX[20]. When present,
>> the SPE
On 12/7/20 5:06 PM, Jim Mattson wrote:
> On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
>>
>> Newer AMD processors have a feature to virtualize the use of the
>> SPEC_CTRL MSR. When supported, the SPEC_CTRL MSR is automatically
>> virtualized and no longer requi
On 12/9/20 5:11 PM, Jim Mattson wrote:
> On Wed, Dec 9, 2020 at 2:39 PM Babu Moger wrote:
>>
>>
>>
>> On 12/7/20 5:22 PM, Jim Mattson wrote:
>>> On Mon, Dec 7, 2020 at 2:38 PM Babu Moger wrote:
>>>>
>>>> Newer AMD processors ha
On 12/22/20 11:41 AM, Sean Christopherson wrote:
> On Tue, Dec 22, 2020, Babu Moger wrote:
>>
>> On 12/9/20 5:11 PM, Jim Mattson wrote:
>>> On Wed, Dec 9, 2020 at 2:39 PM Babu Moger wrote:
>>>>
>>>> On 12/7/20 5:22 PM, Jim Mattson wrote:
>&g
Newer AMD processors have a feature to virtualize the use of the
SPEC_CTRL MSR. Presence of this feature is indicated via CPUID
function 0x800A_EDX[20]: GuestSpecCtrl. When preset, the SPEC_CTRL
MSR is automatically virtualized.
Signed-off-by: Babu Moger
---
arch/x86/include/asm
MSR_AMD64_VIRT_SPEC_CTRL. But, it might
create even more confusion, so dropped the idea for now.
v1:
https://lore.kernel.org/kvm/160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu/
---
Babu Moger (2):
x86/cpufeatures: Add the Virtual SPEC_CTRL feature
KVM: SVM: Add support for Virtual SPEC_CTRL
this will no longer be an issue.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h |4 +++-
arch/x86/kvm/svm/svm.c | 29 +
2 files changed, 28 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index
oogle.com
> Subject: Re: [PATCH v2 2/2] KVM: SVM: Add support for Virtual SPEC_CTRL
>
> On 12/22/20 4:31 PM, Babu Moger wrote:
> > Newer AMD processors have a feature to virtualize the use of the
> > SPEC_CTRL MSR. A hypervisor may wish to impose speculation controls on
> jmatt...@google.com
> Subject: Re: [PATCH v2 2/2] KVM: SVM: Add support for Virtual SPEC_CTRL
>
> On Wed, Dec 30, 2020, Borislav Petkov wrote:
> > On Tue, Dec 22, 2020 at 04:31:55PM -0600, Babu Moger wrote:
> > > @@ -2549,7 +2559,10 @@ static int
Hi Cathy,
I was going to test these patches. But it did not apply on my tree.
Tried on kvm(https://git.kernel.org/pub/scm/virt/kvm/kvm.git) and
Mainline
(https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git). What
is your base tree?
thanks
Babu
> -Original Message-
> From:
that can be used to mask bits
within the CR3 value before being checked by kvm_set_cr3().
Fixes: a780a3ea628268b2 ("KVM: X86: Fix reserved bits check for MOV to CR3")
Signed-off-by: Babu Moger
---
arch/x86/include/asm/kvm_host.h |2 ++
arch/x86/kvm/svm/svm.c |6 ++
callback
function to detect the encryption bit and mask it during the check.
---
Babu Moger (2):
KVM: x86: Introduce mask_cr3_rsvd_bits to mask memory encryption bit
KVM:SVM: Mask SEV encryption bit from CR3 reserved bits
arch/x86/include/asm/kvm_host.h |2 ++
arch/x86/kvm/svm/svm.c
Add support to the mask_cr3_rsvd_bits() callback to mask the
encryption bit from the CR3 value when SEV is enabled.
Additionally, cache the encryption mask for quick access during
the check.
Fixes: a780a3ea628268b2 ("KVM: X86: Fix reserved bits check for MOV to CR3")
Signed-off-by:
On 11/12/20 2:32 AM, Paolo Bonzini wrote:
> On 12/11/20 01:28, Babu Moger wrote:
>> Add support to the mask_cr3_rsvd_bits() callback to mask the
>> encryption bit from the CR3 value when SEV is enabled.
>>
>> Additionally, cache the encryption mask for quick
kvm_x86_ops.vcpu_after_set_cpuid handler.
Fixes: a780a3ea628268b2 ("KVM: X86: Fix reserved bits check for MOV to CR3")
Signed-off-by: Babu Moger
---
arch/x86/include/asm/kvm_host.h |1 +
arch/x86/kvm/cpuid.c|2 ++
arch/x86/kvm/x86.c |2 +-
3 files
in kvm_vcpu_arch
to hold the reserved bits in cr3_lm_rsvd_bits.
v1:
https://lore.kernel.org/lkml/160514082171.31583.9995411273370528911.stgit@bmoger-ubuntu/
Babu Moger (2):
KVM: x86: Introduce cr3_lm_rsvd_bits in kvm_vcpu_arch
KVM:SVM: Update cr3_lm_rsvd_bits for AMD SEV guests
arch/x86
For AMD SEV guests, update the cr3_lm_rsvd_bits to mask
the memory encryption bit in reserved bits.
Signed-off-by: Babu Moger
---
arch/x86/kvm/svm/svm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 2f32fd09e259
Hi Reinette,
On 11/18/20 4:18 PM, Reinette Chatre wrote:
> Hi Babu,
>
> On 11/6/2020 12:14 PM, Babu Moger wrote:
>> When the AMD QoS feature CDP(code and data prioritization) is enabled
>> or disabled, the CDP bit in MSR _0C81 is written on one of the
>> cpu
re")
Signed-off-by: Babu Moger
---
v2: Taken care of Reinette's comments. Changed the field name to
arch_has_per_cpu_cfg to be bit more meaningful about the CPU scope.
Also fixed some wordings.
v1:
https://lore.kernel.org/lkml/160469365104.21002.2901190946502347327.stgit@bmoger-ubuntu/
; Subject: Re: [PATCH v2] x86/resctrl: Fix AMD L3 QOS CDP enable/disable
>
> Hi Babu,
>
> On 11/20/2020 9:25 AM, Babu Moger wrote:
> > When the AMD QoS feature CDP(code and data prioritization) is enabled
> > or disabled, the CDP bit in MSR _0C81 is written on
re")
Signed-off-by: Babu Moger
Reviewed-by: Reinette Chatre
---
v3: Fixed checkpatch suggestions. Addred Reviewed-by from Reinette.
v2: Taken care of Reinette's comments. Changed the field name to
arch_has_per_cpu_cfg to be bit more meaningful about the CPU scope.
Also fixed some
e")
Signed-off-by: Babu Moger
---
arch/x86/kernel/cpu/resctrl/core.c |3 +++
arch/x86/kernel/cpu/resctrl/internal.h |3 +++
arch/x86/kernel/cpu/resctrl/rdtgroup.c |9 +++--
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c
b
bmoger-ubuntu/
> - Taken care of few comments from Jim Mattson.
> - KVM interceptions added only when tdp is off. No interceptions
> when tdp is on.
> - Reverted the fault priority to original order in VMX.
>
> v1:
>
> https://lore.kernel.org/lkml/159191202523.314
the links below:
Link: https://www.amd.com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h |7 +++
arch/x86/kvm/svm/nested.c |3 ++-
arch/x86/kvm/trace.h
Convert all the intercepts to one array of 32 bit vectors in
vmcb_control_area. This makes it easy for future intercept vector
additions. Also update trace functions.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 14 +++---
arch/x86/kvm/svm
Change intercept_cr to generic intercepts in vmcb_control_area.
Use the new vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
where applicable.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h | 42 --
arch/x86/kvm/svm/nested.c
Modify intercept_exceptions to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept to
set/clear/test the intercept_exceptions bits.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/include/asm/svm.h | 22
Modify intercept_dr to generic intercepts in vmcb_control_area. Use
the generic vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
to set/clear/test the intercept_dr bits.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h | 36 ++--
arch/x86
This is in preparation for the future intercept vector additions.
Add new functions vmcb_set_intercept, vmcb_clr_intercept and vmcb_is_intercept
using kernel APIs __set_bit, __clear_bit and test_bit espectively.
Signed-off-by: Babu Moger
---
arch/x86/kvm/svm/svm.h | 15 +++
1
inal order in VMX.
v1:
https://lore.kernel.org/lkml/159191202523.31436.11959784252237488867.stgit@bmoger-ubuntu/
Babu Moger (12):
KVM: SVM: Introduce vmcb_set_intercept, vmcb_clr_intercept and
vmcb_is_intercept
KVM: SVM: Change intercept_cr to generic intercepts
KVM: SVM: Chang
Remove set_exception_intercept and clr_exception_intercept.
Replace with generic set_intercept and clr_intercept for these calls.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 20 ++--
arch/x86/kvm/svm/svm.h | 18 --
2 files
host_intercept_exceptions is not used anywhere. Clean it up.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/nested.c |2 --
arch/x86/kvm/svm/svm.h|1 -
2 files changed, 3 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
index
INVPCID instruction handling is mostly same across both VMX and
SVM. So, move the code to common x86.c.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/vmx/vmx.c | 68 +-
arch/x86/kvm/x86.c | 78
Remove set_cr_intercept, clr_cr_intercept and is_cr_intercept. Instead
call generic set_intercept, clr_intercept and is_intercept for all
cr intercepts.
Signed-off-by: Babu Moger
Reviewed-by: Jim Mattson
---
arch/x86/kvm/svm/svm.c | 34 +-
arch/x86/kvm/svm
com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger
---
arch/x86/include/uapi/asm/svm.h |2 ++
arch/x86/kvm/svm/svm.c | 51 +++
2 files changed, 53 insertions(+)
diff --git a/arch/x
Handling of kvm_read/write_guest_virt*() errors can be moved to common
code. The same code can be used by both VMX and SVM.
Signed-off-by: Babu Moger
---
arch/x86/kvm/vmx/nested.c | 12 ++--
arch/x86/kvm/vmx/vmx.c| 29 +
arch/x86/kvm/vmx/vmx.h
Cathy,
Thanks for the patches. It cleans up the code nicely.
But there are some issues with the patch. I was able to bring the L1 guest
with your patch. But when I tried to load L2 guest it crashed. I am
thinking It is mostly due to save/restore part of vmcb. Few comments below.
> -Original
e vmcb for the nested L2 guest
>
> On 9/18/20 11:16 AM, Babu Moger wrote:
> > Cathy,
> > Thanks for the patches. It cleans up the code nicely.
> > But there are some issues with the patch. I was able to bring the L1
> > guest with your patch. But when I tried to load
> -Original Message-
> From: Paolo Bonzini
> Sent: Tuesday, September 22, 2020 8:39 AM
> To: Sean Christopherson
> Cc: Moger, Babu ; vkuzn...@redhat.com;
> jmatt...@google.com; wanpen...@tencent.com; k...@vger.kernel.org;
> j...@8bytes.org; x...@kernel.org;
nel.org; linux-
> ker...@vger.kernel.org; mi...@redhat.com; b...@alien8.de; h...@zytor.com;
> t...@linutronix.de
> Subject: Re: [PATCH v6 04/12] KVM: SVM: Modify intercept_exceptions to
> generic intercepts
>
> On 22/09/20 21:11, Babu Moger wrote:
> >
> >
> >> -Origin
-ubuntu/
v1:
https://lore.kernel.org/kvm/160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu/
Babu Moger (2):
x86/cpufeatures: Add the Virtual SPEC_CTRL feature
KVM: SVM: Add support for Virtual SPEC_CTRL
arch/x86/include/asm/cpufeatures.h |1 +
arch/x86/include/asm/svm.h
Newer AMD processors have a feature to virtualize the use of the
SPEC_CTRL MSR. Presence of this feature is indicated via CPUID
function 0x800A_EDX[20]: GuestSpecCtrl. When present, the
SPEC_CTRL MSR is automatically virtualized.
Signed-off-by: Babu Moger
Acked-by: Borislav Petkov
---
arch
, the guest will always see the proper value when it is read back.
Signed-off-by: Babu Moger
---
arch/x86/include/asm/svm.h |4 +++-
arch/x86/kvm/svm/nested.c |2 ++
arch/x86/kvm/svm/svm.c | 27 ++-
3 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch
AMD's next generation of EPYC processors support the MPK (Memory
Protection Keys) feature. Update the dependency and documentation.
Signed-off-by: Babu Moger
Reviewed-by: Dave Hansen
---
v6:
- Removed X86_MEMORY_PROTECTION_KEYS. Just keeping the dependency
and doc update.
v5:
https
...@vger.kernel.org
Reported-by: Jim Mattson
Signed-off-by: Babu Moger
Signed-off-by: Paolo Bonzini
---
arch/x86/include/asm/kvm_host.h |1 +
arch/x86/kvm/vmx/vmx.c | 18 --
arch/x86/kvm/x86.c | 17 +
3 files changed, 18 insertions(+), 18
de needs the linear
> property to be true to configure this resource. AMD can set this
> and delay_linear to false. Intel can set arch_needs_linear
> to true to keep the existing "No support for non-linear MB domains"
> error message for affected platforms.
>
s
> will always be true on AMD CPUs as mba_sc cannot be enabled as
> is_mba_linear() is false.
>
> Removing this duplication means user-space visible behaviour and
> error messages are not validated or generated in different places.
>
> CC: Babu Moger
> Signed-off-by: J
ce properties arch_has_{empty,sparse}_bitmaps.
> Test these around the relevant parts of cbm_validate().
>
> Merging the validate calls causes AMD to gain the min_cbm_bits test
> needed for Haswell, but as it always sets this value to 1, it will
> never match.
>
> CC: Ba
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