Am Freitag, 19. September 2014, 19:48:26 schrieb
srv_hongzhou.y...@mediatek.com:
From: Hongzhou Yang hongzhou.y...@mediatek.com
Add devicetree bindings for Mediatek SoC pinctrl driver.
Signed-off-by: Hongzhou Yang hongzhou.y...@mediatek.com
---
Am Freitag, 12. September 2014, 18:54:55 schrieb Jianqun:
Add dt for rk3288 i2s controller, since i2s clock pins and data pins
default to be GPIO, this patch also add pinctrl to mux them.
Tested on RK3288 board.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
I've added this to my tree.
Hi Julien,
Am Dienstag, 18. November 2014, 12:10:43 schrieb Julien CHAUVEAU:
The parent clock for hclk_lcdc1 was set to aclk_cpu instead of hclk_cpu.
Signed-off-by: Julien CHAUVEAU julien.chauv...@neo-technologies.fr
thanks for catching this. I've applied it to my clk branch for 3.19
Heiko
Am Dienstag, 18. November 2014, 09:59:56 schrieb Doug Anderson:
Hi,
On Mon, Nov 17, 2014 at 1:14 PM, Mike Turquette mturque...@linaro.org
wrote:
Quoting Heiko Stübner (2014-11-14 10:06:47)
Hi Mike,
Am Donnerstag, 13. November 2014, 17:41:02 schrieb Mike Turquette:
Quoting Doug
Hi Jianqun,
Am Mittwoch, 19. November 2014, 16:09:27 schrieb Jianqun Xu:
Patch is from Sonny Rao sonny...@chromium.org
that line above should read exactly:
From: Sonny Rao sonny...@chromium.org
that way git will also set the author correctly when importing the patch mbox.
We need to claim
Am Dienstag, 18. November 2014, 15:49:55 schrieb Doug Anderson:
The rockchip pinctrl driver was using irq_gc_set_wake() as its
implementation of irq_set_wake() but was totally ignoring everything
that irq_gc_set_wake() did (which is to upkeep gc-wake_active).
Let's fix that by setting
Am Mittwoch, 19. November 2014, 09:54:13 schrieb Doug Anderson:
Hi,
On Tue, Nov 18, 2014 at 3:49 PM, Doug Anderson diand...@chromium.org
wrote:
+static void rockchip_irq_disable(struct irq_data *d)
+{
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ u32
Am Dienstag, 18. November 2014, 15:49:56 schrieb Doug Anderson:
The Rockchip pinctrl driver was only implementing the mask and
unmask operations though the hardware actually has two distinct
things: enable/disable and mask/unmask. It was implementing the
mask operations as a hardware
Hi James,
interestingly I only got the cover-letter, so had to find the other patches
through my list-archive :-) .
Am Mittwoch, 19. November 2014, 23:15:43 schrieb James Hogan:
Enable the common clock framework for the TZ1090 SoC, add a tz1090_clk
device tree file describing the clocks, and
Am Dienstag, 9. September 2014, 21:14:18 schrieb edubez...@gmail.com:
Hello,
On Tue, Sep 9, 2014 at 9:02 PM, Zhang Rui rui.zh...@intel.com wrote:
On Tue, 2014-09-09 at 11:09 -0400, Eduardo Valentin wrote:
Hello
On Tue, Sep 09, 2014 at 01:35:31PM +0200, Heiko Stübner wrote:
Am
Hi Mike,
Am Dienstag, 2. September 2014, 09:33:21 schrieb Heiko Stübner:
Am Montag, 1. September 2014, 17:26:29 schrieb Mike Turquette:
Quoting Heiko Stübner (2014-08-28 03:46:10)
On 32bit architectures, like ARM calculating the fractional rate will
do the multiplication before
Hi Kever,
Am Mittwoch, 10. September 2014, 18:05:53 schrieb Kever Yang:
basic rk3288 smp support
Signed-off-by: Heiko Stuebner he...@sntech.de
Signed-off-by: Kever Yang kever.y...@rock-chips.com
---
arch/arm/mach-rockchip/core.h| 1 +
arch/arm/mach-rockchip/platsmp.c | 60
Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
for temperature measurements. This so called tsadc does not contain any
active parts like temperature interrupts and only supports polling the
current temperature. The returned voltage can then be converted by a
suitable
Am Mittwoch, 10. September 2014, 21:30:15 schrieb Doug Anderson:
We should be able to talk to the PMIC at 400kHz. No need to talk at
the slow 100kHz.
As measured by ftrace (with a bunch of extra patches, since cpufreq
for rk808 hasn't landed yet):
before this change: cpu0_set_target() =
Hi Caesar,
Am Mittwoch, 10. September 2014, 10:49:05 schrieb Caesar Wang:
Hi Heiko,
在 2014年09月09日 19:37, Heiko Stübner 写道:
Am Mittwoch, 3. September 2014, 10:10:38 schrieb Caesar Wang:
Signed-off-by: Caesar Wang caesar.w...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 18
Am Montag, 1. September 2014, 17:26:29 schrieb Mike Turquette:
Quoting Heiko Stübner (2014-08-28 03:46:10)
On 32bit architectures, like ARM calculating the fractional rate will
do the multiplication before converting the value to u64 when it gets
assigned to ret, which can produce
Am Dienstag, 2. September 2014, 09:14:27 schrieb Doug Anderson:
We want to specify the input supplies to the rk808 regulator. This
patch series adds them to the driver. Note that the bindings are
based atop Chris's most recent version at
https://patchwork.kernel.org/patch/4817931/. If the
Am Montag, 1. September 2014, 17:07:43 schrieb Chris Zhong:
This is the initial version of the RK808 PMIC. This is a power management IC
for multimedia products.
It provides regulators that are able to supply power to processor cores
and other components. The chip provides other modules
Am Mittwoch, 3. September 2014, 10:10:37 schrieb Caesar Wang:
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng z...@rock-chips.com
Signed-off-by: Caesar Wang caesar.w...@rock-chips.com
---
Am Mittwoch, 3. September 2014, 00:20:58 schrieb Hartmut Knaack:
Heiko Stübner schrieb:
Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
for temperature measurements. This so called tsadc does not contain any
active parts like temperature interrupts and only
Am Donnerstag, 4. September 2014, 01:06:14 schrieb Chris Zhong:
Signed-off-by: Chris Zhong z...@rock-chips.com
Tested-by: Heiko he...@sntech.de
---
Changes in v8:
Adviced by Doug
- remove rk808_regulator_dts() function
- remove the check about client-dev.of_node
Changes in v7:
-
Am Mittwoch, 3. September 2014, 21:51:42 schrieb Chris Zhong:
This is the initial version of the RK808 PMIC. This is a power management IC
for multimedia products.
It provides regulators that are able to supply power to processor cores
and other components. The chip provides other modules
Am Dienstag, 19. August 2014, 18:21:08 schrieb Addy Ke:
This patch requires that https://patchwork.kernel.org/patch/4701721/
land in order to compile.
Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Addy Ke addy...@rock-chips.com
I've added the patch to my v3.18-next/dts
Am Donnerstag, 4. September 2014, 10:40:24 schrieb Dmitry Torokhov:
Hi Chris,
On Thu, Sep 04, 2014 at 09:12:38AM +0800, Chris Zhong wrote:
+ rk808_clkout-clk_data.clks = clk_table;
+ rk808_clkout-clk_data.clk_num = RK808_NR_OUTPUT;
+
+ return of_clk_add_provider(node,
Am Freitag, 21. November 2014, 11:08:47 schrieb Julien CHAUVEAU:
The USB HSIC PHY clock divider is set in the register RK2928_CLKSEL_CON(11).
Signed-off-by: Julien CHAUVEAU julien.chauv...@neo-technologies.fr
applied to my clk branch for 3.19
Thanks
Heiko
---
Am Freitag, 21. November 2014, 10:27:41 schrieb Julien CHAUVEAU:
In rk3188 clock branches, spdif_pre gate was set to RK2928_CLKGATE_CON(13)
bit 13. This appears to be a copy-paste error because such a register does
not exist. We correct it to RK2928_CLKGATE_CON(0) and find out that the
rk3188
Hi Sonny,
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
drivers/clk/rockchip/clk-rk3288.c | 3 ++-
Am Montag, 24. November 2014, 14:01:02 schrieb Romain Perier:
2014-11-24 13:58 GMT+01:00 Romain Perier romain.per...@gmail.com:
So I need to resend this patch which would only introduce an helper
function which checks for system-power-controller property (it would
also have a new commit
Hi Chris,
Am Samstag, 15. November 2014, 19:45:06 schrieb Chris Zhong:
This suspend patch is only support cut off the power of cpu and some
external devices, since we still lack power_domain driver, so the other
power rail of rk3288 need keep power on.
I have tested it on rk3288-evb board,
Hi Chris,
The subject above should reflect the pinctrl settings, something like:
ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808
Same for the description:
Add suspend-voltages and necessary pin-states for suspend on
rk3288-evb-rk808 boards. global_pwroff would be pulled high when
Am Freitag, 21. November 2014, 10:06:47 schrieb James Hogan:
On Thu, Nov 20, 2014 at 01:56:24PM +0100, Heiko Stübner wrote:
I don't know enough about your clock structure, but it looks quite a bit
like Mike's mail from May [0] may apply here too.
The register layout also suggests
Hi Chris,
Am Samstag, 15. November 2014, 19:45:07 schrieb Chris Zhong:
It's a basic version of suspend and resume for rockchip,
it only support RK3288 now.
please fold in both in the two patches from Doug
https://chromium-review.googlesource.com/#/c/231181/
Hi Caesar,
Am Montag, 24. November 2014, 16:18:12 schrieb Eduardo Valentin:
Hello Caesar,
On Mon, Nov 24, 2014 at 12:58:57PM +0800, Caesar Wang wrote:
This series patchs tested on rk3288 SDK board and pinky-v1,v2 board.
I believe the driver can be used on the rk3288-evb board.
Add
Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
for temperature measurements. This so called tsadc does not contain any
active parts like temperature interrupts and only supports polling the
current temperature. The returned voltage can then be converted by a
suitable
Am Montag, 15. September 2014, 09:59:23 schrieb Mark Brown:
On Sun, Sep 14, 2014 at 09:23:02PM +0200, Heiko Stuebner wrote:
There is a high potential of more than one of those regulators existing
on a board, so name the regulator according to the name provided in the
initdata instead of
Am Montag, 15. September 2014, 14:54:10 schrieb Mark Brown:
On Sun, Sep 14, 2014 at 09:23:03PM +0200, Heiko Stuebner wrote:
+Optional properties:
+ - fairchild,suspend-regulator: regulator number to use for suspend
voltages + possible values are either 0 or 1
I'm not sure what
Hi Kever,
Am Mittwoch, 17. September 2014, 09:03:37 schrieb Kever Yang:
Sonny,
On 09/17/2014 04:17 AM, Sonny Rao wrote:
On Tue, Sep 16, 2014 at 3:44 AM, Kever Yang kever.y...@rock-chips.com
wrote:
This patch add basic rk3288 smp support, cpu 1~3 are in wfe state
when get into kernel.
The vendor-id gathered from the dt match-data was cast to int but assigned
to an unsigned long, producing warnings on at least sparc, like
drivers/regulator/fan53555.c: In function 'fan53555_regulator_probe':
drivers/regulator/fan53555.c:373:16: warning: cast from pointer to integer
of
Hi Chris,
Am Mittwoch, 17. September 2014, 21:07:59 schrieb Chris Zhong:
Get voltage duty table from device tree might be better, other platforms
can also use this driver without any modify.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
drivers/regulator/Kconfig |1 -
Am Donnerstag, 18. September 2014, 21:49:38 schrieb Axel Lin:
Set di-regulator before dereference it.
Signed-off-by: Axel Lin axel@ingics.com
damn ... thanks for catching this :-)
Reviewed-by: Heiko Stuebner he...@sntech.de
---
drivers/regulator/fan53555.c | 2 +-
1 file changed, 1
Am Donnerstag, 18. September 2014, 21:48:48 schrieb Axel Lin:
Signed-off-by: Axel Lin axel@ingics.com
thanks for catching this silly mistake
Reviewed-by: Heiko Stuebner he...@sntech.de
---
drivers/regulator/fan53555.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
Am Montag, 29. September 2014, 14:17:38 schrieb Pankaj Dubey:
Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated syscon driver. However in
certain use cases it is desirable to make a device used with another
driver a syscon interface
Hi Chris,
Am Freitag, 7. November 2014, 21:49:33 schrieb Chris Zhong:
save and restore some clks, which might be changed in suspend.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug
Hi,
Am Dienstag, 4. November 2014, 17:15:32 schrieb Lee Jones:
Actually there is a better way still:
#ifdef CONFIG_OF IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
struct backlight_device *of_find_backlight_by_node(struct device_node
*node); #else
static inline struct backlight_device *
Hi Chris,
Am Freitag, 7. November 2014, 14:48:20 schrieb Kevin Hilman:
Chris Zhong z...@rock-chips.com writes:
RK3288 can shut down the cpu, gpu and other device controllers in suspend,
and it will pull the GLOBAL_PWROFF pin to high in the final stage of the
process of suspend, pull the
Am Dienstag, 11. November 2014, 08:53:13 schrieb Kevin Hilman:
Caesar Wang caesar.w...@rock-chips.com writes:
In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power mode.
The RK3288 PMU is dedicated for
Am Samstag, 8. November 2014, 01:44:56 schrieb Julien CHAUVEAU:
Unit addresses, whilst written in hex, don't contain a 0x prefix.
Signed-off-by: Julien CHAUVEAU julien.chauv...@neo-technologies.fr
added this to my v3.19-armsoc/dts branch
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Hi Mike,
Am Mittwoch, 12. November 2014, 16:40:46 schrieb Mike Turquette:
Seems fine to me. Just to be clear, Heiko will be picking up the
Rockchip clock patches and submitting a PR, correct? I believe last
merge window was the first time we did that for Rockchip and it went
well.
yep, I'm
Am Donnerstag, 13. November 2014, 21:20:25 schrieb Kever Yang:
Usually we assigned a clock to a default rate in dts,
there is a situation that the clock already initialized to the rate
we intend to set before kernel(hardware default or init in uboot etc).
For the PLLs we can get a rate from
Am Mittwoch, 12. November 2014, 13:38:45 schrieb Dmitry Torokhov:
Currently there is no driver owning these clocks and they have to stay
up for the system to function properly, so let's mark them as
CLK_IGNORE_UNUSED.
Without this patch we have trouble with suspend/resume and we have
Am Montag, 22. September 2014, 09:48:33 schrieb Doug Anderson:
@@ -196,6 +255,7 @@ static struct platform_driver gpio_charger_driver = {
.name = gpio-charger,
.owner = THIS_MODULE,
.pm = gpio_charger_pm_ops,
+
Am Montag, 22. September 2014, 19:55:16 schrieb jinkun.hong:
From: jinkun.hong jinkun.h...@rock-chips.com
Signed-off-by: Jack Dai jack@rock-chips.com
Signed-off-by: Wang Caesar caesar.w...@rock-chips.com
Signed-off-by: jinkun.hong jinkun.h...@rock-chips.com
---
Am Mittwoch, 24. September 2014, 21:36:34 schrieb Kever Yang:
This patch add some clock binding id for different modules
that under development and going to send upstream.
Signed-off-by: Kever Yang kever.y...@rock-chips.com
Reviewed-by: Heiko Stuebner he...@sntech.de
---
Am Mittwoch, 24. September 2014, 21:36:35 schrieb Kever Yang:
This patch use the new defined clock ID to initial the clock nodes.
This patch also add the clock nodes in PD_VIDEO.
Commit messages like this [two things the patch does, connected by
and/also] are normally a good indicator that
Hi Pankaj, Joachim,
Am Dienstag, 23. September 2014, 20:12:50 schrieb Joachim Eastwood:
On 22 September 2014 06:40, Pankaj Dubey pankaj.du...@samsung.com wrote:
Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated syscon driver.
Am Mittwoch, 24. September 2014, 13:21:57 schrieb Doug Anderson:
Hi,
On Thu, Aug 7, 2014 at 5:57 AM, Heiko Stübner he...@sntech.de wrote:
PLLs on Rockchip platforms report their locking state in an external
register situated in the General Register Files which is provided
through
Am Mittwoch, 24. September 2014, 20:35:10 schrieb Heiko Stübner:
Hi Pankaj, Joachim,
Am Dienstag, 23. September 2014, 20:12:50 schrieb Joachim Eastwood:
On 22 September 2014 06:40, Pankaj Dubey pankaj.du...@samsung.com wrote:
Currently a syscon entity can be only registered directly
Am Montag, 22. Dezember 2014, 10:47:29 schrieb Doug Anderson:
I was seeing cases where I was losing interrupts when inserting and
removing SD cards. Sometimes the card would get stuck in the
inserted state.
I believe that the problem was related to the code to handle the case
where we
, Heiko Stübner wrote:
Hi Roger,
the comments inline are a rough first review. I hope to get a clearer
picture
for the stuff I'm not sure about in v3 once the big issues are fixed.
Am Donnerstag, 27. November 2014, 10:52:08 schrieb Roger Chen:
This driver is based on stmmac driver
Hi Roger,
patches modifying the rockchip clock parts should have a subject like
clk: rockchip: .
Same for the following patch
Am Donnerstag, 27. November 2014, 10:52:46 schrieb Roger Chen:
Signed-off-by: Roger Chen roger.c...@rock-chips.com
---
Am Donnerstag, 30. Oktober 2014, 16:51:17 schrieb Julien CHAUVEAU:
Add aliases for UARTs on rk3066 and rk3188 in order to fix the numbering
scheme. This will keep the debug console on ttyS2 when UART 1 is disabled,
for example.
Signed-off-by: Julien CHAUVEAU
Am Mittwoch, 15. Oktober 2014, 10:22:59 schrieb Kever Yang:
rk3288 is qual-core CPU Soc, we enable the smp in this patch.
applied this series with Kevin's test-tag split to dts and soc branches for
3.19.
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Hi Chris,
Am Mittwoch, 29. Oktober 2014, 19:51:59 schrieb Chris Zhong:
support suspend/resume of pinctrl, it allows handling sleep mode
for hogged pins in pinctrl
I've now applied patches 1 and 2 of your series to my v3.19-pinctrl/next
branch and will be sending a pull request to LinusW
Hi Jaehoon,
Am Montag, 3. November 2014, 17:59:58 schrieb Jaehoon Chung:
Hi, Addy.
On 11/03/2014 10:20 AM, Addy Ke wrote:
The bit of sdio interrupt is 16 in designware implementation,
but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
number of slot0 in the SDIO interrupt
Commit de3d75dc2311 (backlight: Use of_find_backlight_by_node stub when
backlight class disabled) did not take into account that the backlight
class can also be compiled as module. Extend the check to prevent
redefinition warnings when the backlight device class is compiled as module.
Am Dienstag, 18. November 2014, 13:08:26 schrieb Alexandru M Stan:
For now all I have is the getter and setter for the phase, nothing that uses
it (that is ready). You can test the getter like this:
localhost ~ # cat /sys/kernel/debug/clk/clk_summary|grep sample -C 1
sclk_sdio1
Hi Roger, Kever,
Am Dienstag, 25. November 2014, 17:55:53 schrieb Kever Yang:
The Subject should use below prefix:
ARM: dts: rockchip: add gmac info for rk3288
On 11/25/2014 05:08 PM, Roger Chen wrote:
add gmac info in rk3288.dtsi for GMAC driver
Signed-off-by: Roger Chen
Am Dienstag, 25. November 2014, 16:40:59 schrieb Sergei Shtylyov:
Hello.
On 11/25/2014 12:08 PM, Roger Chen wrote:
add gmac info in rk3288.dtsi for GMAC driver
Signed-off-by: Roger Chen roger.c...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 59
Am Dienstag, 25. November 2014, 14:40:07 schrieb Grant Likely:
On Tue, 25 Nov 2014 12:28:25 +
, Romain Perier romain.per...@gmail.com
wrote:
It reverts commit a4b4e0461ec5 (of: Add standard property for poweroff
capability). As discussed on the mailing list, it makes more sense to
Hi Chris, Kever,
Am Mittwoch, 26. November 2014, 00:13:40 schrieb Kever Yang:
On 11/25/2014 05:37 PM, Chris Zhong wrote:
The maximum cpu frequency of rk3288 can up to 1.8Ghz, but the vdd_cpu need
set to 1.4v. I've tested these patches on rk3288 evb board.
I'm not sure why you need this
Mark,
Am Donnerstag, 20. November 2014, 09:46:34 schrieb Mark Yao:
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic crtc for rockchip is a VOP - Video Output
Hi Joerg, Dave,
Am Mittwoch, 26. November 2014, 09:12:56 schrieb Dave Airlie:
On 26 November 2014 at 02:38, Heiko Stübner he...@sntech.de wrote:
Mark,
Am Donnerstag, 20. November 2014, 09:46:34 schrieb Mark Yao:
This a series of patches is a DRM Driver for Rockchip Socs, add support
Am Dienstag, 25. November 2014, 16:13:02 schrieb Doug Anderson:
From: Jeff Chen c...@rock-chips.com
The DMC clocks need to be turned off at runtime, so we should have IDs
so we can export them.
Signed-off-by: Jeff Chen c...@rock-chips.com
[dianders: split into two patches; adjusted commit
Am Mittwoch, 26. November 2014, 10:49:17 schrieb Roger:
On 2014/11/25 22:39, Heiko Stübner wrote:
Am Dienstag, 25. November 2014, 16:40:59 schrieb Sergei Shtylyov:
Hello.
On 11/25/2014 12:08 PM, Roger Chen wrote:
add gmac info in rk3288.dtsi for GMAC driver
Signed-off-by: Roger
Hi Daniel,
Am Mittwoch, 26. November 2014, 12:51:08 schrieb Daniel Lezcano:
Hi Doug, Olof,
IIUC, it sounds like this patch is needed from some other patches in
arm-soc. Olof was proposing to take this patch through its tree to
facilitate the integration.
Olof, is it this patch you were
Am Mittwoch, 26. November 2014, 13:30:58 schrieb Daniel Lezcano:
On 11/26/2014 01:06 PM, Heiko Stübner wrote:
Hi Daniel,
Am Mittwoch, 26. November 2014, 12:51:08 schrieb Daniel Lezcano:
Hi Doug, Olof,
IIUC, it sounds like this patch is needed from some other patches in
arm-soc
Am Mittwoch, 26. November 2014, 13:49:57 schrieb Daniel Lezcano:
On 11/26/2014 01:48 PM, Heiko Stübner wrote:
Am Mittwoch, 26. November 2014, 13:30:58 schrieb Daniel Lezcano:
On 11/26/2014 01:06 PM, Heiko Stübner wrote:
Hi Daniel,
Am Mittwoch, 26. November 2014, 12:51:08 schrieb Daniel
Am Dienstag, 25. November 2014, 16:49:08 schrieb Doug Anderson:
Heiko,
On Tue, Nov 25, 2014 at 4:45 PM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 25. November 2014, 16:13:02 schrieb Doug Anderson:
From: Jeff Chen c...@rock-chips.com
The DMC clocks need to be turned off
Linus,
Am Mittwoch, 19. November 2014, 14:51:31 schrieb Doug Anderson:
These two patches fix some pinctrl issues on rockchip. The first
fixes a real issue where interrupts were being left on in
suspend/resume and waking the system up when they shouldn't. The
second fixes purely theoretical
Hi Sonny,
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
---
drivers/clk/rockchip/clk-rk3288.c | 3 ++-
Hi Doug,
Am Mittwoch, 26. November 2014, 15:05:53 schrieb Doug Anderson:
I'm no longer convinced that's a good idea, so we should just axe the
CLK_SET_RATE_PARENT.
If timing is working out well and Sonny isn't available to spin this
right now (it's Thanksgiving holidays here in the US), I
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao sonny...@chromium.org
applied to my clk branch after removing the CLK_SET_RATE_PARENT
Heiko
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Am Mittwoch, 26. November 2014, 19:47:10 schrieb Sonny Rao:
On Wed, Nov 26, 2014 at 3:32 PM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 18. November 2014, 23:15:19 schrieb Sonny Rao:
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec
Hi Daniel,
Am Mittwoch, 10. Dezember 2014, 20:36:17 schrieb Daniel Kurtz:
This driver adds HDMI to rockchip/drm. The fact that rockchip's hdmi
uses dw_hdmi is an implementation detail. I do not think that the names
used for rk3288-hdmi should include dw in them.
See inline for what I
Am Freitag, 12. Dezember 2014, 16:44:06 schrieb Romain Perier:
Hi,
2014-12-12 15:54 GMT+01:00 Julien CHAUVEAU
julien.chauv...@neo-technologies.fr:
This patch adds CLK_IGNORE_UNUSED flag to hclk_usb_peri, hclk_usbotg0 and
hclk_usbotg1 because these clocks must remain enabled to use the
Hi,
when trying linux-next for 20141210 on my rk3288 eval board I got errors
when ejecting sd cards. Especially a timeout for a command and following
this an rcu stall which essentially stops everything [0].
My way to reproduce the issue is:
- boot into an initramfs
- insert card
- remove card
-
Hi Kever,
Am Dienstag, 4. November 2014, 15:52:34 schrieb Kever Yang:
we are going to make a clock usage solution for rk3288:
1. CPLL and GPLL always not change after assign init;
2. NPLL default as 500MHz, may used for most scene;
3. NPLL may be changed by VOP(HDMI) clock for some special
Hi Julien,
Am Freitag, 7. November 2014, 16:19:49 schrieb Julien CHAUVEAU:
On RK3066, add pinctrl nodes for SPDIF, LCDC1, CIF0/1, HDMI and USB.
On RK3188, add pinctrl nodes for SPDIF, LCDC1, CIF and GPS.
Please don't bulk-add pinctrl settings nobody is using for the forseeable
future. There
Hi Mike,
Am Donnerstag, 13. November 2014, 17:41:02 schrieb Mike Turquette:
Quoting Doug Anderson (2014-11-13 15:27:32)
[...]
All of the above is to say that perhaps the solution to this problem
belongs in the driver. In the end we're talking about details for
correctly programming
Hi,
Am Freitag, 14. November 2014, 14:52:54 schrieb Alexandru M Stan:
The drive and sample phases are generated by dividing an upstream parent
clock by 2, this allows us to adjust the phase by 90 deg.
There's also an option to have up to 255 delay elements (40-80 picoseconds
long). This
Hi James,
Am Freitag, 14. November 2014, 15:32:09 schrieb James Hogan:
Commit 79c6ab509558 (clk: divider: add CLK_DIVIDER_READ_ONLY flag) in
v3.16 introduced the CLK_DIVIDER_READ_ONLY flag which caused the
recalc_rate() and round_rate() clock callbacks to be omitted.
However using this flag
Am Freitag, 14. November 2014, 16:32:25 schrieb Julien CHAUVEAU:
This enables user space access to the 3 PWM available on the Radxa Rock
headers.
Signed-off-by: Julien CHAUVEAU julien.chauv...@neo-technologies.fr
added to my v3.19-armsoc/dts branch
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Am Donnerstag, 13. November 2014, 15:19:21 schrieb Kever Yang:
According to rk3288 trm, the clk_usbphy480m_gate is locate at
bit 14 of CRU_CLKGATE5_CON register.
Signed-off-by: Kever Yang kever.y...@rock-chips.com
applied this to my clk branch.
Heiko
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Am Donnerstag, 13. November 2014, 16:11:49 schrieb Kever Yang:
According to rk3288 trm, the mux selector locate at bit[12:11]
of CRU_CLKSEL13_CON shows:
2'b00: select HOST0 USB pll clock (clk_otgphy1)
2'b01: select HOST1 USB pll clock (clk_otgphy2)
2'b10: select OTG USB pll clock
Am Montag, 17. November 2014, 09:56:08 schrieb Loic Poulain:
In certain suspend modes on certain boards the 8250 UART may lose
state when the device goes to suspend. If we're using
no_console_suspend this can cause lots of problems during resume.
Let's cache the basic UART config
Hi Roger,
the comments inline are a rough first review. I hope to get a clearer picture
for the stuff I'm not sure about in v3 once the big issues are fixed.
Am Donnerstag, 27. November 2014, 10:52:08 schrieb Roger Chen:
This driver is based on stmmac driver.
modification based on Giuseppe
Hi Mark,
Am Dienstag, 2. Dezember 2014, 17:13:20 schrieb Mark Yao:
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic crtc for rockchip is a VOP - Video Output
Hi Stefan,
Am Donnerstag, 18. Dezember 2014, 14:43:01 schrieb Stefan Hengelein:
So you actually tested the code I removed in the patch? can you
provide a configuration that compiles that piece of code?
Yep, one of my boards (Asus eeeReader DR-900) was actually able to transmit
stuff via the
Am Mittwoch, 10. Dezember 2014, 12:55:29 schrieb Doug Anderson:
It seems that ever since (536f6b9 mmc: dw_mmc: Reset DMA before
enabling IDMAC) landed upstream that SD cards have been very unhappy
on rk3288-evb. They were a little unhappy before that change, but
after that change they're
Am Freitag, 12. Dezember 2014, 22:05:52 schrieb Julien CHAUVEAU:
This patch adds CLK_IGNORE_UNUSED flag to hclk_usb_peri, hclk_usbotg0
and hclk_usbotg1 because these clocks must remain enabled to use the
USB controllers in host mode.
This fixes a regression introduced by commit 78eaf6095cc7
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