在 2017-11-08 18:56,Maxime Ripard 写道:
Hi,
On Tue, Nov 07, 2017 at 05:38:55PM +0100, Giulio Benetti wrote:
Board could be any with A20,
for example Olinuxino A20.
Or our Q027, S027 boards, but final dts still are not complete.
Therefore no upstream boards are using it right now, so we'll merge
在 2017-11-08 18:56,Maxime Ripard 写道:
Hi,
On Tue, Nov 07, 2017 at 05:38:55PM +0100, Giulio Benetti wrote:
Board could be any with A20,
for example Olinuxino A20.
Or our Q027, S027 boards, but final dts still are not complete.
Therefore no upstream boards are using it right now, so we'll merge
于 2017年11月7日 GMT+08:00 上午11:13:23, Chen-Yu Tsai 写到:
On Tue, Nov 7, 2017 at 6:39 AM, Martin Blumenstingl
wrote:
Hello,
recently I discovered that there are some X-Powers AXP chips that
support both, Allwinner's own "RSB" as well as the I2C
于 2017年11月7日 GMT+08:00 上午11:13:23, Chen-Yu Tsai 写到:
On Tue, Nov 7, 2017 at 6:39 AM, Martin Blumenstingl
wrote:
Hello,
recently I discovered that there are some X-Powers AXP chips that
support both, Allwinner's own "RSB" as well as the I2C ("TWSI" in the
datasheet) busses.
one chip that
在 2017-11-02 23:50,Maxime Ripard 写道:
On Thu, Nov 02, 2017 at 05:07:30PM +0800, Icenowy Zheng wrote:
> > + {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_pins_a>;
> > + vmmc-supply = <_vcc3v3>;
> > + bus-width = &
在 2017-11-02 23:50,Maxime Ripard 写道:
On Thu, Nov 02, 2017 at 05:07:30PM +0800, Icenowy Zheng wrote:
> > + {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_pins_a>;
> > + vmmc-supply = <_vcc3v3>;
> > + bus-width = &
在 2017-11-02 17:02,Maxime Ripard 写道:
Hi,
On Wed, Nov 01, 2017 at 05:38:14PM +0800, Icenowy Zheng wrote:
Banana Pi M2 Zero board is a H2+-based board by Sinovoip, with a form
factor and GPIO holes similar to Raspberry Pi Zero.
It features:
- Allwinner H2+ SoC
- Single-chip (16-bit) 512MiB DDR3
在 2017-11-02 17:02,Maxime Ripard 写道:
Hi,
On Wed, Nov 01, 2017 at 05:38:14PM +0800, Icenowy Zheng wrote:
Banana Pi M2 Zero board is a H2+-based board by Sinovoip, with a form
factor and GPIO holes similar to Raspberry Pi Zero.
It features:
- Allwinner H2+ SoC
- Single-chip (16-bit) 512MiB DDR3
在 2017-10-27 23:06,Icenowy Zheng 写道:
This patchset adds support for the SimpleFB on Allwinner SoCs with
"Display Engine 2.0".
PATCH 1 to PATCH 3 are DE2 CCU fixes for H3/H5 SoCs.
PATCH 4 adds the pipeline strings for DE2 SimpleFB.
PATCH 5 to 7 adds necessary device tree node
在 2017-10-27 23:06,Icenowy Zheng 写道:
This patchset adds support for the SimpleFB on Allwinner SoCs with
"Display Engine 2.0".
PATCH 1 to PATCH 3 are DE2 CCU fixes for H3/H5 SoCs.
PATCH 4 adds the pipeline strings for DE2 SimpleFB.
PATCH 5 to 7 adds necessary device tree node
在 2017-11-02 15:11,Stephen Boyd 写道:
On 10/09, Icenowy Zheng wrote:
于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Fri, Oct 06, 2017 at 06:33:31AM +, Icenowy Zheng wrote:
>> In the CCU of the Allwinner R40 SoC, there's a GMA
在 2017-11-02 15:11,Stephen Boyd 写道:
On 10/09, Icenowy Zheng wrote:
于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard
写到:
>On Fri, Oct 06, 2017 at 06:33:31AM +0000, Icenowy Zheng wrote:
>> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration
>register,
>>
to power the board and
the other features OTG functionality)
- Two keys, a reset and a GPIO-connected key.
- HDMI Type-C (miniHDMI) connector connected to the HDMI part of H2+.
- CSI connector to connect the camera sensor provided by Sinovoip.
Signed-off-by: Icenowy Zheng <icen...@aosc
to power the board and
the other features OTG functionality)
- Two keys, a reset and a GPIO-connected key.
- HDMI Type-C (miniHDMI) connector connected to the HDMI part of H2+.
- CSI connector to connect the camera sensor provided by Sinovoip.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts
The A64 SoC features two display pipelines, one has a LCD output, the
other has a HDMI output.
Add support for simplefb for these pipelines on A64 SoC.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 31 +++
The A64 SoC features two display pipelines, one has a LCD output, the
other has a HDMI output.
Add support for simplefb for these pipelines on A64 SoC.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 31 +++
1 file changed, 31 insertions
The A64 SoC features a DE2 CCU like the one in H5, but needs to claim a
section of SRAM (SRAM C) to be accessed.
Adds the device tree nodes for the SRAM controller and the DE2 CCU.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dts
The A64 SoC features a DE2 CCU like the one in H5, but needs to claim a
section of SRAM (SRAM C) to be accessed.
Adds the device tree nodes for the SRAM controller and the DE2 CCU.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 34
-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v2:
- Adds description of the situation when the SRAM is not claimed.
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
b/Documen
-by: Icenowy Zheng
---
Changes in v2:
- Adds description of the situation when the SRAM is not claimed.
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
b/Documentation/devicetree/bindings
The H3/H5 SoCs have a HDMI output and a TV Composite output.
Add simplefb nodes for these outputs.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/su
The H3/H5 SoCs have a HDMI output and a TV Composite output.
Add simplefb nodes for these outputs.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch
The DE2 CCU on Allwinner H5 SoC has a slightly different behavior than
the one on H3, so the compatible string is not set in the common DTSI
file.
Add the compatible string of H5 DE2 CCU in H5 DTSI file.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun
The DE2 CCU on Allwinner H5 SoC has a slightly different behavior than
the one on H3, so the compatible string is not set in the common DTSI
file.
Add the compatible string of H5 DE2 CCU in H5 DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4
1
As we're going to add simplefb support for Allwinner SoCs with DE2, add
suitable pipeline strings in the device tree binding.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v2:
- Adds Rob's ACK.
.../devicetree/bindings/di
The DE2 in H3/H5 has a clock control unit in it, and the behavior is
slightly different between H3 and H5.
Add the common parts in H3/H5 DTSI, and add the compatible string in H3
DTSI.
The compatible string of H5 DE2 CCU will be added in a separated patch.
Signed-off-by: Icenowy Zheng <i
As we're going to add simplefb support for Allwinner SoCs with DE2, add
suitable pipeline strings in the device tree binding.
Acked-by: Rob Herring
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Adds Rob's ACK.
.../devicetree/bindings/display/simple-framebuffer-sunxi.txt | 4
The DE2 in H3/H5 has a clock control unit in it, and the behavior is
slightly different between H3 and H5.
Add the common parts in H3/H5 DTSI, and add the compatible string in H3
DTSI.
The compatible string of H5 DE2 CCU will be added in a separated patch.
Signed-off-by: Icenowy Zheng
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index 2db5d4e00ea7..468d1abaf0ee 100644
--- a/drivers/
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index 2db5d4e00ea7..468d1abaf0ee 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-d
Allwinner H3 features a DE2 CCU like the one on A83T, however the
parent of the clocks is the DE module clock, not the PLL_DE clock.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 47
Allwinner H3 features a DE2 CCU like the one on A83T, however the
parent of the clocks is the DE module clock, not the PLL_DE clock.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 47
1 file changed, 47
the binding example's
compatible from A83T to H3 (as it specifies the DE module clock).
Fixes: ed74f8a8a679 ("dt-bindings: add binding for the Allwinner DE2 CCU")
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +++--
1
the binding example's
compatible from A83T to H3 (as it specifies the DE module clock).
Fixes: ed74f8a8a679 ("dt-bindings: add binding for the Allwinner DE2 CCU")
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +++--
1 file changed, 3 insert
CH 8 to 10 are for Allwinner A64 SoC to enable SimpleFB.
Icenowy Zheng (10):
dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3
clk: sunxi-ng: add support for Allwinner H3 DE2 CCU
clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU
dt-bindings: simplefb-sunxi: add pipelin
CH 8 to 10 are for Allwinner A64 SoC to enable SimpleFB.
Icenowy Zheng (10):
dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3
clk: sunxi-ng: add support for Allwinner H3 DE2 CCU
clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU
dt-bindings: simplefb-sunxi: add pipelin
From: Icenowy Zheng <icen...@aosc.xyz>
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: I
From: Icenowy Zheng
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng
---
Changes
Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A
ports, and it's connected to the USB1 port of the SoC.
Enable it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 13 +
1 file changed, 13 insertions(+)
Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A
ports, and it's connected to the USB1 port of the SoC.
Enable it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm
From: Icenowy Zheng <icen...@aosc.xyz>
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.xyz>
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ul
From: Icenowy Zheng
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 22 ++
1 file changed, 22 insertions
adds USB host ports support.
Icenowy Zheng (5):
ARM: sun8i: r40: add USB host port nodes for R40
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
ARM: sun8i: v40: enable
adds USB host ports support.
Icenowy Zheng (5):
ARM: sun8i: r40: add USB host port nodes for R40
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
ARM: sun8i: v40: enable
.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 7b5260
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +
1 file changed, 9 insertions(+)
diff
.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 7b52608cebe6..035599d870b9 100644
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot
A64's Display Engine 2.0 needs a section of SRAM (SRAM C) to be claimed.
Add binding for this.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bi
A64's Display Engine 2.0 needs a section of SRAM (SRAM C) to be claimed.
Add binding for this.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
Allwinner A64's DE2 needs to claim a section of SRAM (SRAM C) to work.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 32
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/drive
Allwinner A64's DE2 needs to claim a section of SRAM (SRAM C) to work.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 32
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i
Currently the rtl8723bs driver will print "nolinked power save enter"
and "nolinked power save leave" per minute if it's not connected to any
network.
These messages are meaningless and annoying to regular users.
Hide them when it's not debugging.
Signed-off-by: Icenowy Zh
Currently the rtl8723bs driver will print "nolinked power save enter"
and "nolinked power save leave" per minute if it's not connected to any
network.
These messages are meaningless and annoying to regular users.
Hide them when it's not debugging.
Signed-off-by: Icenowy
The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).
Add the device tree node for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/ar
The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).
Add the device tree node for it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi
于 2017年10月10日 GMT+08:00 上午5:04:07, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Sun, Oct 08, 2017 at 04:29:03AM +, Icenowy Zheng wrote:
>> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power
>output
>> (used by HDMI, SATA and USB)
于 2017年10月10日 GMT+08:00 上午5:04:07, Maxime Ripard
写到:
>On Sun, Oct 08, 2017 at 04:29:03AM +0000, Icenowy Zheng wrote:
>> On newer revisions of the Banana Pi M2 Ultra boards, the 5V power
>output
>> (used by HDMI, SATA and USB) is controller via a GPIO.
>>
&
于 2017年10月10日 GMT+08:00 上午5:03:40, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Sun, Oct 08, 2017 at 04:29:02AM +, Icenowy Zheng wrote:
>> From: Icenowy Zheng <icen...@aosc.xyz>
>>
>> Allwinner R40 SoC features a USB OTG port and two U
于 2017年10月10日 GMT+08:00 上午5:03:40, Maxime Ripard
写到:
>On Sun, Oct 08, 2017 at 04:29:02AM +0000, Icenowy Zheng wrote:
>> From: Icenowy Zheng
>>
>> Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
>>
>> Add support for the host ports
于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Fri, Oct 06, 2017 at 06:33:31AM +, Icenowy Zheng wrote:
>> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration
>register,
>> which is intended to be accessed b
于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard
写到:
>On Fri, Oct 06, 2017 at 06:33:31AM +0000, Icenowy Zheng wrote:
>> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration
>register,
>> which is intended to be accessed by the dwmac-sun8i driver. On SoCs
>
Allwinner R40 SoC has an AHCI SATA controller like the one in A10/A20,
but with a reset control and two dedicated VDD pins for this controller
(one 1.2v and one 2.5v).
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
drivers/ata/ahci_sunxi.c
generic platform AHCI
controller binding document.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 -
.../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++
2 files changed, 40 insertions(+), 1 deletion(-)
Allwinner R40 SoC has an AHCI SATA controller like the one in A10/A20,
but with a reset control and two dedicated VDD pins for this controller
(one 1.2v and one 2.5v).
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/ata/ahci_sunxi.c | 118
generic platform AHCI
controller binding document.
Signed-off-by: Icenowy Zheng
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 -
.../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++
2 files changed, 40 insertions(+), 1 deletion(-)
create mode 100644
Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A
ports, and it's connected to the USB1 port of the SoC.
Enable it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 13 +
1 file changed, 13 insertions(+)
Banana Pi M2 Berry has an on-board USB Hub that provides 4 USB Type-A
ports, and it's connected to the USB1 port of the SoC.
Enable it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +
1 file changed, 9 insertions(+)
diff
From: Icenowy Zheng <icen...@aosc.xyz>
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: I
.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 7b5260
From: Icenowy Zheng
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng
---
arch
.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 7b52608cebe6..035599d870b9 100644
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA
and USB) is controlled via a GPIO.
Add regulator node for it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot
From: Icenowy Zheng <icen...@aosc.xyz>
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng <icen...@aosc.xyz>
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ul
From: Icenowy Zheng
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 22 ++
1 file changed, 22 insertions
for the two boards, and
the fifth and sixth patch finally adds USB host ports support.
Icenowy Zheng (6):
phy: sun4i-usb: add support for R40 USB PHY
ARM: sun8i: r40: add USB host port nodes for R40
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator
for the two boards, and
the fifth and sixth patch finally adds USB host ports support.
Icenowy Zheng (6):
phy: sun4i-usb: add support for R40 USB PHY
ARM: sun8i: r40: add USB host port nodes for R40
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator
Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
Add support for it.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 1 +
drivers/phy/allwinner/phy-sun4i-usb.c | 12
2
Allwinner R40 features a USB PHY like the one in A64, but with 3 PHYs.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 1 +
drivers/phy/allwinner/phy-sun4i-usb.c | 12
2 files changed, 13 insertions
于 2017年10月8日 GMT+08:00 上午6:37:46, "Levin, Alexander (Sasha Levin)"
<alexander.le...@verizon.com> 写到:
>From: Icenowy Zheng <icen...@aosc.xyz>
>
>[ Upstream commit c429ceb1e18252122ba96b52e689dcf87103c186 ]
>
>As 64-bit Allwinner H5 SoC has the same DMA e
于 2017年10月8日 GMT+08:00 上午6:37:46, "Levin, Alexander (Sasha Levin)"
写到:
>From: Icenowy Zheng
>
>[ Upstream commit c429ceb1e18252122ba96b52e689dcf87103c186 ]
>
>As 64-bit Allwinner H5 SoC has the same DMA engine with H3, the DMA
>driver should be allowed to be built
于 2017年10月5日 GMT+08:00 下午2:58:01, Kalle Valo <kv...@codeaurora.org> 写到:
>Icenowy Zheng <icen...@aosc.io> writes:
>
>> 于 2017年10月4日 GMT+08:00 下午6:11:45, Maxime Ripard
>> <maxime.rip...@free-electrons.com> 写到:
>>>On Wed, Oct 04, 2017 at 10:02:48AM +00
于 2017年10月5日 GMT+08:00 下午2:58:01, Kalle Valo 写到:
>Icenowy Zheng writes:
>
>> 于 2017年10月4日 GMT+08:00 下午6:11:45, Maxime Ripard
>> 写到:
>>>On Wed, Oct 04, 2017 at 10:02:48AM +, Arend van Spriel wrote:
>>>> On 10/4/2017 11:03 AM, Icenowy Zheng wrote:
>
power, reset, and boot control buttons
This patch adds a dts file that enables UART, MMC and PMIC support.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v3:
- Added 3.3V vqmmc regulator for mmc2 (eMMC).
Changes in v2:
-
control buttons
This patch adds a dts file that enables UART, MMC and PMIC support.
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Added 3.3V vqmmc regulator for mmc2 (eMMC).
Changes in v2:
- Dropped the vcc5v0 regulator, as it's not used yet.
arch/arm/boot/dts
headphone jack
- red and green LEDs
- debug UART pins
- Raspberry Pi B+ compatible GPIO header
- power and reset buttons
This patch adds a dts file that enables UART, MMC and PMIC support.
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v2:
- Dropped the vcc5v0 regulator, a
headphone jack
- red and green LEDs
- debug UART pins
- Raspberry Pi B+ compatible GPIO header
- power and reset buttons
This patch adds a dts file that enables UART, MMC and PMIC support.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Dropped the vcc5v0 regulator, as it's not used yet
00 MP2
GPU. It retains most if not all features from the A20, while adding
some new features, such as MIPI DSI output, or updating various
hardware blocks, such as DE 2.0.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Icenowy Zheng <icen...@aosc.io>
---
Changes in v3:
. It retains most if not all features from the A20, while adding
some new features, such as MIPI DSI output, or updating various
hardware blocks, such as DE 2.0.
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Dropped all max-frequency properties in MMC nodes.
Changes in v2
: Add board dts file for Banana Pi M2 Ultra
Icenowy Zheng (1):
ARM: dts: sun8i: Add board dts file for Banana Pi M2 Berry
arch/arm/boot/dts/Makefile| 4 +-
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 178 ++
arch/arm/boot/dts/sun8i-r40.dtsi
: Add board dts file for Banana Pi M2 Ultra
Icenowy Zheng (1):
ARM: dts: sun8i: Add board dts file for Banana Pi M2 Berry
arch/arm/boot/dts/Makefile| 4 +-
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 178 ++
arch/arm/boot/dts/sun8i-r40.dtsi
As we need to register a regmap on the R40 CCU, there needs to be a
device structure bound to the CCU device node.
Rewrite the R40 CCU driver initial code to make it a proper platform
driver, thus we will have a platform device bound to it.
Signed-off-by: Icenowy Zheng <icen...@aosc
As we need to register a regmap on the R40 CCU, there needs to be a
device structure bound to the CCU device node.
Rewrite the R40 CCU driver initial code to make it a proper platform
driver, thus we will have a platform device bound to it.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng
There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
the syscon part, in the CCU of R40 SoC.
Export a regmap of the CCU.
Read access is not restricted to all registers, but only the GMAC
register is allowed to be written.
Signed-off-by: Icenowy Zheng <icen...@aosc
There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
the syscon part, in the CCU of R40 SoC.
Export a regmap of the CCU.
Read access is not restricted to all registers, but only the GMAC
register is allowed to be written.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi
patch does the conversion of the driver to a platform driver,
and the second patch adds the regmap.
Icenowy Zheng (2):
clk: sunxi-ng: r40: rewrite init code to a platform driver
clk: sunxi-ng: r40: export a regmap to access the GMAC register
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 69
patch does the conversion of the driver to a platform driver,
and the second patch adds the regmap.
Icenowy Zheng (2):
clk: sunxi-ng: r40: rewrite init code to a platform driver
clk: sunxi-ng: r40: export a regmap to access the GMAC register
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 69
于 2017年10月4日 GMT+08:00 下午6:11:45, Maxime Ripard
<maxime.rip...@free-electrons.com> 写到:
>On Wed, Oct 04, 2017 at 10:02:48AM +, Arend van Spriel wrote:
>> On 10/4/2017 11:03 AM, Icenowy Zheng wrote:
>> >
>> >
>> > 于 2017年10月4日 GMT+08:00 下午5:02
于 2017年10月4日 GMT+08:00 下午6:11:45, Maxime Ripard
写到:
>On Wed, Oct 04, 2017 at 10:02:48AM +, Arend van Spriel wrote:
>> On 10/4/2017 11:03 AM, Icenowy Zheng wrote:
>> >
>> >
>> > 于 2017年10月4日 GMT+08:00 下午5:02:17, Kalle Valo
>写到:
>> > >
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