The MMC unit on Octeon cn7890 differs in that it has multiple
interrupts. Requires a lock for the interrupt handler. DMA addresses
have a dedicated 64 bit register now, so use that when available.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers
Add Support for the scatter-gather DMA available in the
ThunderX MMC units. Up to 16 DMA requests can be processed
together.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium-mmc.c | 104 -
drivers/mmc/host/cavium-mmc.h | 16 +
drivers
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..ead1e89 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3041,6 +3041,14 @@ S: Supported
lock for all MMC devices is required because the host
controller is shared.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/cavium-mmc.c | 988 ++
drivers/mmc/host/cavium-mmc.h | 178
2 f
Add support for switching to DDR mode for eMMC devices.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium-mmc.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/cavium-mmc.c b/drivers/mmc/host/cavium-mmc.c
index fb6e1c1..e340b95 100644
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson
CC: Rob Herring
CC: Mark Rutland
CC: devicet...@vger.kernel.org
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
Acked-by: Rob Herring
---
.../devicetree/bindings
lock for all MMC devices is required because the host
controller is shared.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/cavium.c | 982 ++
drivers/mmc/host/cavium.h | 192 +
2 files cha
Add support for switching to DDR mode for eMMC devices.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/cavium.c b/drivers/mmc/host/cavium.c
index eebb387..d842b69 100644
--- a/drivers/mmc
/linux-kernel@vger.kernel.org/msg1295316.html
v9: http://marc.info/?l=linux-mmc=147431759215233=2
Cheers,
Jan
---
Jan Glauber (6):
dt-bindings: mmc: Add Cavium SOCs MMC bindings
mmc: cavium: Add core MMC driver for Cavium SOCs
mmc: cavium: Add MMC PCI driver for ThunderX SOCs
mmc
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c776906..25c3009 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3041,6 +3041,14 @@ S: Supported
Add Support for the scatter-gather DMA available in the
ThunderX MMC units. Up to 16 DMA requests can be processed
together.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium-thunderx.c | 5 +-
drivers/mmc/host/cavium.c | 104 +++--
drivers/mmc
Add a platform driver for ThunderX ARM SOCs.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium-thunderx.c | 195 +
drivers/mmc/host/cavium.h | 7 ++
4
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson
CC: Rob Herring
CC: Mark Rutland
CC: devicet...@vger.kernel.org
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
Acked-by: Rob Herring
---
.../devicetree/bindings
e system]
>
> url:
> https://github.com/0day-ci/linux/commits/Jan-Glauber/Cavium-MMC-driver/20170401-055302
> config: sparc64-allmodconfig (attached as .config)
> compiler: sparc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
> reproduce:
> wget
> https://raw.githubu
On Fri, Mar 03, 2017 at 12:47:06PM +0100, Ulf Hansson wrote:
> On 6 February 2017 at 14:39, Jan Glauber wrote:
> > Add description of Cavium Octeon and ThunderX SOC device tree bindings.
> >
> > CC: Ulf Hansson
> > CC: Rob Herring
> > CC: Mark Rutland
&
Hi Herbert,
this series adds support for hardware accelerated compression & decompression
as found on ThunderX (arm64) SOCs. I've been reviewing this driver internally
for some time and would like to get feedback on the RFC to see if this goes
into the right direction and to see if there are any
From: Mahipal Challa
Add statistics for compression/decompression hardware offload
under debugfs.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto/cavium/zip/zip_deflate.c | 10 ++
drivers/crypto/cavium/zip/zip_inflate.c | 12
and decompression (RFC 2395 and ANSI X3.241-1994)
- ADLER32 and CRC32 checksums for ZLIB (RFC 1950) and GZIP (RFC 1952)
The ZIP engine is presented as a PCI device. It supports DMA and
scatter-gather.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto
From: Mahipal Challa
This contains changes for adding compression/decompression h/w offload
functionality for both DEFLATE and LZS.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto/cavium/zip/Makefile | 5 +-
drivers/crypto/cavium
On Tue, Jan 24, 2017 at 09:56:55AM +0100, Ulf Hansson wrote:
> On 21 January 2017 at 11:59, Jan Glauber wrote:
> > Extend mmc_of_parse to get the device node pointer as an
> > additional argument instead of using the device node of the
> > mmc device.
> >
&
Hi Wolfram,
we want to add ACPI support to the ThunderX i2c driver
because it is meant for servers and some distributions
require ACPI there. The changes are small but I'll post
a new version of the remaining patches shortly.
Thanks,
Jan
On Mon, May 02, 2016 at 07:35:40PM +0200, Jan Glauber
driver on MIPS
- Re-ordered some thunderx probe functions for readability
- Fix missing of_irq.h and i2c-smbus.h includes
- Use IS_ENABLED for CONFIG options
Thanks,
Jan
-
Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSI-X. The
clock rates can be set via device tree or ACPI.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
Initialize booleon values with true instead of 1.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index e95ee5c..140f0d1 100644
--- a/drivers
Sort include files alphabetically to reduce probability of merge
conflicts.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon-core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon-core.c
b/drivers/i2c/busses/i2c-octeon
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Add SMBUS alert interrupt support. For now only device tree is
supported for specifying the alert. In case of ACPI an error
is returned.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6
drivers/i2c/busses/i2c-thunderx-core.c | 51
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Functions are slightly re-ordered but no other changes are included.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c
The i2c Octeon and ThunderX drivers are maintained by Cavium.
While at it fix the whitespace errors of the next entry.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
MAINTAINERS | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile| 2 +-
drivers/i2c
On Mon, Apr 18, 2016 at 01:19:31PM +0100, Will Deacon wrote:
> On Mon, Apr 18, 2016 at 09:43:33AM +0200, Jan Glauber wrote:
> > On Fri, Apr 15, 2016 at 12:37:06PM +0100, Will Deacon wrote:
> > > You can remove stop_lock altogether now, right? I also wonder whether
> > >
Mark,
are these patches still queued or should I repost them?
--Jan
On Mon, Apr 04, 2016 at 01:03:13PM +0200, Jan Glauber wrote:
> Hi Mark,
>
> can you have a look at these patches?
>
> Thanks,
> Jan
>
> 2016-03-09 17:21 GMT+01:00 Jan Glauber :
>
> Thi
On Tue, Apr 19, 2016 at 04:06:08PM +0100, Mark Rutland wrote:
> On Wed, Mar 09, 2016 at 05:21:03PM +0100, Jan Glauber wrote:
> > Provide "uncore" facilities for different non-CPU performance
> > counter units. Based on Intel/AMD uncore pmu support.
> >
> > The
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c | 799 +
drivers/i2c/busses/i2c-cavium.h
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile| 2 +-
drivers/i2c
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSIX and the
clock is taken from device tree.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's
achievable, and much better than the worst-case 100 bytes/sec before.
While at it remove the debug print from the low-level wait function.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 55
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Just sorting the functions to be consistent with the other
read/write variants.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 78 -
1 file changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 53
From: David Daney
cn78xx has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 131
1 file changed, 120 insertions(+), 11
SMBUS QUICK never worked for the read case, because EINVAL was returned
for a zero length message. The hardware does not support SMBUS QUICK
messages so disable the support and remove the zero length check.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 5 +
1 file changed
: Add workaround for broken irqs on CN3860
Jan Glauber (10):
i2c: octeon: Improve error status checking
i2c: octeon: Use i2c recovery framework
i2c: octeon: Remove I2C_FUNC_SMBUS_QUICK support
dt-bindings: i2c: Add Octeon cn78xx TWSI
i2c: octeon: Move read function before write
i2c
er receive mode until the last byte is
requested. The state check needs to consider if this bit was set.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 129 +---
1 file changed, 106 insertions(+), 23 deletions(-)
diff --git a/drivers/i2c/
the
xfer debug message (i2c core already provides a debug message
for this).
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 160
1 file changed, 97 insertions(+), 63 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c
From: Peter Swain
Add helper function that reads back a value after writing to
make sure the write is finished and use it in octeon_i2c_write_int().
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 9 +++--
1 file changed, 7 insertions(+), 2
plus one interrupt per transferred byte. Since the interrupts are costly
using the HLC improves the performance. Also, the HLC provides improved
error handling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 345
On Mon, Apr 25, 2016 at 11:44:29PM +0200, Wolfram Sang wrote:
> On Mon, Apr 25, 2016 at 04:33:34PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > Use High-Level Controller (HLC) when possible. The HLC can read/write
> > up to 8 bytes and is completely o
On Tue, Apr 26, 2016 at 12:16:22AM +0200, Wolfram Sang wrote:
> On Mon, Apr 25, 2016 at 04:33:32PM +0200, Jan Glauber wrote:
> > SMBUS QUICK never worked for the read case, because EINVAL was returned
> > for a zero length message. The hardware does not support SMBUS QUICK
> >
On Tue, Apr 26, 2016 at 07:58:45AM +0200, Jan Glauber wrote:
> On Tue, Apr 26, 2016 at 12:16:22AM +0200, Wolfram Sang wrote:
> > On Mon, Apr 25, 2016 at 04:33:32PM +0200, Jan Glauber wrote:
> > > SMBUS QUICK never worked for the read case, because EINVAL was returned
>
On Mon, Apr 25, 2016 at 02:19:07PM +0100, Will Deacon wrote:
> On Mon, Apr 25, 2016 at 02:02:22PM +0200, Jan Glauber wrote:
> > On Mon, Apr 25, 2016 at 12:22:07PM +0100, Will Deacon wrote:
> > > On Mon, Apr 04, 2016 at 02:19:54PM +0200, Jan Glauber wrote:
> >
On Tue, Apr 26, 2016 at 09:36:20AM +0200, Wolfram Sang wrote:
>
> > > Yes, I thought briefly about splitting SMBUS_QUICK into read-write
> > > variants too. To me the question is if this feature is still used on
> > > modern
> > > devices or if this is more a relict of the past. I don't know
-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index 9f11e19..e8a65f5 100644
--- a/drivers/i2c/busses/i2c-octeon.c
+++ b/drivers/i2c/busses/i2c
On Tue, Apr 26, 2016 at 11:17:59PM +0200, Wolfram Sang wrote:
> On Mon, Apr 25, 2016 at 04:33:38PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > CN3860 does not interrupt the CPU when the i2c status changes. If
> > we get a timeout, and see the status has
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 53
On Tue, Apr 26, 2016 at 02:53:54PM +0100, Will Deacon wrote:
[...]
> >
> > That sounds like a good compromise.
> >
> > So I could do the following:
> >
> > 1) In the uncore setup check for CONFIG_NUMA, if set use the NUMA
> >information to determine the device node
> >
> > 2) If
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile| 2 +-
drivers/i2c
-smbus.h includes
- Use IS_ENABLED for CONFIG options
Jan
-
Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c: octeon: Split the driver into two parts
i2c: thunderx: Add i2c driver for ThunderX SOC
i2c: thunderx: Add smbus alert
Initialize booleon values with true instead of 1.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index e95ee5c..140f0d1 100644
--- a/drivers
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSIX and the
clock is taken from device tree.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Sort include files alphabetically to reduce probability of merge
conflicts.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon-core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon-core.c
b/drivers/i2c/busses/i2c-octeon
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Functions are slightly re-ordered but no other changes are included.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c
The i2c Octeon and ThunderX drivers are maintained by Cavium.
While at it fix the whitespace errors of the next entry.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
MAINTAINERS | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b
device limit
- trimmed include files
Feedback welcome!
Jan
-
Jan Glauber (5):
arm64/perf: Basic uncore counter support for Cavium ThunderX
arm64/perf: Cavium ThunderX L2C TAD uncore support
arm64/perf: Cavium ThunderX L2C CBC uncore support
Support counters of the L2 Cache tag and data units.
Also support pass2 added/modified counters by checking MIDR.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 6 +-
drivers/perf/uncore/uncore_cavium.h
Support for the OCX transmit link counters.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore/uncore_cavium_ocx_tlk.c | 380
Support counters of the L2 cache crossbar connect.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore/uncore_cavium_l2c_cbc.c | 237
Support counters on the DRAM controllers.
Also support pass2 added counters by checking MIDR.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore
id is used to group devices by node
so counters on one node can be merged. The NUMA node can be selected
via a new sysfs node attribute.
Without NUMA support all devices will be on node 0.
4) All counters are 64 bit wide without overflow interrupts.
Signed-off-by: Jan Glauber
---
drivers/per
On Fri, Feb 12, 2016 at 05:36:59PM +, Mark Rutland wrote:
> On Fri, Feb 12, 2016 at 05:55:06PM +0100, Jan Glauber wrote:
[...]
> > +int thunder_uncore_event_init(struct perf_event *event)
> > +{
> > + struct hw_perf_event *hwc = >hw;
> > +
On Tue, Feb 16, 2016 at 03:12:53PM +, Will Deacon wrote:
> On Tue, Feb 16, 2016 at 09:00:15AM +0100, Jan Glauber wrote:
> > On Mon, Feb 15, 2016 at 08:04:04PM +, Will Deacon wrote:
> >
> > [...]
> >
> > > On Wed, Feb 03, 2016 at
for chips with broken irqs
Jan Glauber (2):
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c: add Octeon cn78xx TWSI
Peter Swain (2):
i2c-octeon: Flush TWSI writes with readback
i2c-octeon: Faster operation when IFLG signals late
.../devicetree/bindings/i2c/i2c-octeon.txt
Cleanup only without functional change.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 156 ++--
1 file changed, 136 insertions(+), 20
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c
nal read
msgs too.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 583 ++--
1 file changed, 504 insertions(+), 79 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
in
On Mon, Feb 15, 2016 at 08:06:13PM +, Will Deacon wrote:
> On Mon, Feb 15, 2016 at 07:40:37PM +, Will Deacon wrote:
> > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote:
> > > The implemented Cortex A57 events are not A57 specific.
> > > They are
On Thu, Feb 18, 2016 at 11:24:29AM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 10:13:07AM +0100, Jan Glauber wrote:
> > On Mon, Feb 15, 2016 at 08:06:13PM +, Will Deacon wrote:
> > > On Mon, Feb 15, 2016 at 07:40:37PM +, Will Deacon wrote:
> > > > On W
ARMv8.1 increases the PMU event number space to 16 bit so increase
the EVTYPE mask.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index c68fa98
Add a compatible string for the Cavium ThunderX PMU.
Signed-off-by: Jan Glauber
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt
b
compile errors
Changes to v1:
- renamed thunderx dt pmu binding to thunder
Jan
Jan Glauber (5):
arm64/perf: Rename Cortex A57 events
arm64/perf: Add Cavium ThunderX PMU support
arm64: dts: Add Cavium ThunderX specific PMU
arm64
counter always sets the upper
32 bits so overflow interrupts are generated as before.
Original patch from Andrew Pinksi
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel
The implemented Cortex A57 events are strictly-speaking not
A57 specific. They are ARM recommended implementation defined events
and can be found on other ARMv8 SOCs like Cavium ThunderX too.
Therefore rename these events to allow using them in other
implementations too.
Signed-off-by: Jan
icache prefetch counters
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 69 +-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 2adbcb5..0ed05f6 100644
On Thu, Feb 18, 2016 at 05:34:28PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> > With the long cycle counter bit (LC) disabled the cycle counter is not
> > working on ThunderX SOC (ThunderX only implements Aarch64).
>
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
ceive mode until the last byte is
requested. The state check needs to consider if this bit was set.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 125 +---
1 file changed, 103 insertions(+), 22 deletions(-)
diff --git a/drivers/i2c/busses/i2
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Convert the adapter timeout to 2 ms independently of depending on CONFIG_HZ.
CONFIG_HZ is 100 for MIPS Cavium-Octeon so the timeout value is not changed.
Also set retries to 5 to improve robustness.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 3 ++-
1 file changed, 2
Just sorting the functions to be consistent with the other
read/write variants.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 78 -
1 file changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c
From: David Daney
cn78xx has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 131
1 file changed, 120 insertions(+), 11
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