set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: gre...@linuxfoundation.org; a...@arndb.de; devicet...@vger.kernel.org;
> j...@resnulli.us; system-sw-
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Thursday, August 3, 2017 5:36 PM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: kbuild-...@01.org; gre...@linuxfoundation.org; a...@arndb.de; linux-
> ker...@vger.k
> -Original Message-
> From: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] On
> Behalf Of Arnd Bergmann
> Sent: Tuesday, August 15, 2017 2:16 PM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: gregkh <gre...@linuxfoundation.org>;
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (3):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
doccumentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx
families JTAG mast
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v2->v3
Comments pointed by Rob Herring <r...@kernel.org>
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v2->v3
v1->v2
Comments pointed by Greg KH <gre...@linuxfoundation.org>
- change license type from GPLv2/BSD to GPLv2
Comments pointed by Neil Armstrong <narmstr...@baylibre.co
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
drivers/jtag/Kconfig | 13 +
drivers/jtag/Makefile |1 +
drivers/jtag/jtag-aspeed.c | 802
3 files changed, 816 insertions(+),
TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (2):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation/ioctl/ioctl-number.txt |2 +
MAINTAINERS |8 +
TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (2):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
.../devicetree/bindings/jtag/aspeed-jtag.txt | 27 +
Documentation/ioctl/ioctl-n
-by: Jiri Pirko <j...@resnulli.us>
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
---
v1->v2
Comments pointed by Greg KH <gre...@linuxfoundation.org>
- change license type from GPLv2/BSD to GPLv2
Comments pointed by Neil Armstrong <narmstr...@baylibre.com&g
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
---
v1->v2
Comments pointed by Greg KH <gre...@linuxfoundation.org>
- Change license type from GPLv2/BSD to GPLv2
- Change type of variables which crossed user/kernel to __type
- Remove "default n" from Kconfig
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v5->v6
v4->v5
Comments pointed by Arnd Bergmann <a...@arndb.de>
- Added HAS_IOMEM dependence in Kconfig to avoid
"undefined reference to `devm_ioremap_resource'&q
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v5->v6
Comments poin
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v3->v4
Comments pointed by Arnd Bergmann <a...@arndb.de>
- change transaction pointer tdio type to __u64
- change internal status type from enum to __u32
v2->v3
v1->v2
Comme
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
V3->v4
Comments poin
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
V8->v9
Comments pointed by Arnd Bergmann <a...@arndb.de>
- add *data parameter to xfer function prototype
v7->v8
Comments pointed by Joe
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v8->v9
v7->v8
Com
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
---
v8->v9
v7->v8
v6->v7
Comments pointed by Pavel Machek <pa...@ucw.cz>
- Added jtag-cdev documentation to Documentation/ABI/testing folder
---
Documenta
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v7->v8
v6->v7
Comments pointed by Pavel Machek <pa...@ucw.cz>
- Added jtag-cdev documentation to Document
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Arnd Bergm
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v7->v8
Comments pointed by Arnd Bergmann <a...@arndb.de>
- aspeed_jtag_init replace goto to return;
- change input variables type from
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
> -Original Message-
> From: geert.uytterhoe...@gmail.com [mailto:geert.uytterhoe...@gmail.com]
> On Behalf Of Geert Uytterhoeven
> Sent: Thursday, September 28, 2017 12:02 PM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: Greg KH <gre...@linuxfou
> -Original Message-
> From: geert.uytterhoe...@gmail.com [mailto:geert.uytterhoe...@gmail.com]
> On Behalf Of Geert Uytterhoeven
> Sent: Thursday, September 28, 2017 11:33 AM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: Greg KH <gre...@linuxfou
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v4->v5
Comments pointed by Arnd Bergmann <a...@arndb.de>
- Added HAS_IOMEM dependence in Kconfig to avoid
"undefined reference to `devm_ioremap_resource'" error,
because
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v4->v5
V3->v4
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
---
v6->v7
Notifications from kbuild test robot <l...@intel.com>
- Add include to jtag-asapeed.c
v5->v6
v4->v5
Comments pointed by Arnd Bergmann <a...@arndb.de>
- Added HAS_IOM
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
---
v6->v7
Comments pointed by Pavel Machek <pa...@ucw.cz>
- Added jtag-cdev documentation to Documentation/ABI/testing folder
---
Documentation/ABI/testing/j
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
V6->v7
Comments poin
Thnaks for point
Best Regards,
Oleksandr Shamray
> -Original Message-
> From: Philippe Ombredanne [mailto:pombreda...@nexb.com]
> Sent: Thursday, November 30, 2017 10:21 AM
> To: Kun Yi <ku...@google.com>
> Cc: Oleksandr Shamray <oleksan...@mellanox.com>
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v13->v14
Comments pointed by Philippe Ombredanne <pombreda...@nexb.com>
- Change style of head block comment from /**/ to //
v12->v1
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v13->v14
v12->
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v13->v14
v12->v13
v11->v12
Tobias Klauser <tklau...@distanz.ch>
- rename /Documentation/ABI/testing/jat
> -Original Message-
> From: Chip Bilbrey [mailto:c...@bilbrey.org]
> Sent: Monday, November 6, 2017 12:33 AM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: gre...@linuxfoundation.org; a...@arndb.de; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v11->v12
Comments pointed by Chip Bilbrey <c...@bilbrey.org>
- Remove access mode from xfer and idle transactions
- Add new ioctl JTAG_SI
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v11->v12
v10->v
ic driver.
Oleksandr Shamray (4):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx
families JTAG master driver
Documentation: jtag: Add ABI documentation
Document
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v11->v12
Tobias Klauser <tklau...@distanz.ch>
- rename /Documentation/ABI/testing/jatg-dev -> jtag-dev
- Typ
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v10->v11
v9->v10
V8->v9
Comments pointed by Arnd Bergmann <a...@arndb.de>
- add *data parameter to xfer function prototype
v7->
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v10->v11
v9->v10
Fixes added by Oleksandr:
- change jtag-cdev to jtag-dev in documentation
- update Kernel Versio
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v10->v11
v9->v1
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Hi,
Thanks for review>
> -Original Message-
> From: Chip Bilbrey [mailto:c...@bilbrey.org]
> Sent: Monday, November 6, 2017 12:33 AM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: gre...@linuxfoundation.org; a...@arndb.de; linux-
> ker...@vge
> -Original Message-
> From: Kun Yi [mailto:ku...@google.com]
> Sent: Thursday, November 30, 2017 12:51 AM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: gre...@linuxfoundation.org; a...@arndb.de; system-sw-low-level
> <system-sw-low-le...@mellanox.com&g
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v12->v13
v11->v12
Tobias Klauser <tklau...@distanz.ch>
- rename /Documentation/ABI/testing/jatg-dev -> j
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v12->v13
v11->v12
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v12->v13
Comments pointed by Philippe Ombredanne <pombreda...@nexb.com>
- Change jtag-aspeed.c licence type to
SPDX-License-Identifier:
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v9->v10
V8->v9
Comments pointed by Arnd Bergmann <a...@arndb.de>
- add *data parameter to xfer function prototype
v7->v8
Comment
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v9->v10
- change jtag-cdev to jtag-dev in documentation
- update Kernel Version and Date in jtag-dev documentation;
v
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v9->v10
v8->v9
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Friday, October 20, 2017 5:54 PM
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: a...@arndb.de; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; devicet...
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
Acked-by: Philippe Ombredanne <pombreda...@nexb.com>
Acked-by: Joel Stanley <j...@jms.id.au>
---
v19->v20
Notifications from kbuild test ro
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v19->v20
Comments pointed by Randy Dunlap <rdun...@infradead.org>
- Fix JTAG doccumentation
v18->v19
Pa
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v19->v20
v18->v
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v18-v19
Pavel Machek <pa...@ucw.cz>
- Added JTAG doccumentation to Documentation/jtag
v17->v18
v16->v17
v1
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
__u8 reset;
__u8 endstate;
__u8 tck;
};
You can see usage example on
https://github.com/mellanoxbmc/mellanox-bmc-tools/tree/master/mlnx_cpldprog
Best Regards,
Oleksandr Shamray
> -----Original Message-
> From: Florian Fainelli [mailto:f.f
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
Acked-by: Philippe Ombredanne <pombreda...@nexb.com>
Acked-by: Joel Stanley <j...@jms.id.au>
---
v18->v19
v17->v18
v16->v17
v1
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v17->v19
v17-&
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v19->v20
Comments pointed by Randy Dunlap <rdun...@infradead.org>
- Fix JTAG doccumentation
v18->v19
Pa
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v19->v20
v18->v
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
Acked-by: Philippe Ombredanne <pombreda...@nexb.com>
Acked-by: Joel Stanley <j...@jms.id.au>
---
v19->v20
Notifications from kbuild test ro
Hi Andy.
Thanks for review.
Please read my answers inline.
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: 16 мая 2018 г. 0:00
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: Greg Kroah-Hartman <gre...@linuxfounda
Hi Andy.
Thanks for review.
Please read my answers inline.
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: 16 мая 2018 г. 0:22
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: Greg Kroah-Hartman <gre...@linuxfounda
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray
Signed-off-by: Jiri Pirko
Acked-by: Rob Herring
---
v21->v22
v20->v21
v19->v20
v18->v19
v17->v18
v16->v17
v15->v16
Comments po
Hi Greg.
Thanks for your review.
Please see my comments inline.
Best Regards,
Oleksandr Shamray
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: 28 мая 2018 г. 15:35
> To: Oleksandr Shamray <oleksan...@mellanox.com>
> Cc: a...@a
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v21->v22
Comments pointed by Randy Dunlap <rdun...@infradead.org>
- fix spell in ABI doccumentation
v20-
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Added document that describe the ABI for JTAG class drivrer
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
v21->v22
Comments pointed by Randy Dunlap <rdun...@infradead.org>
- fix spell in ABI doccumentation
v20-
frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <olek
-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
Acked-by: Philippe Ombredanne <pombreda...@nexb.com>
Acked-by: Joel Stanley <j...@jms.id.au>
---
v21->v22
Comments pointed by Andy Shev
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksan...@mellanox.com>
Signed-off-by: Jiri Pirko <j...@mellanox.com>
Acked-by: Rob Herring <r...@kernel.org>
---
v21->v22
v20->v2
ster scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
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