[PATCH v3 6/9] irqchip: Add the ingenic-tcu-intc driver

This simple driver handles the IRQ chip of the TCU (Timer Counter Unit) of the JZ47xx Ingenic SoCs. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/irqchip/Kconfig | 6 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-ingenic-tcu.c

Re: [PATCH v6 15/15] MIPS: ingenic: Initial GCW Zero support

Hi Philippe, Le dim. 7 janv. 2018 à 17:18, Philippe Ombredanne <pombreda...@nexb.com> a écrit : On Fri, Jan 5, 2018 at 7:25 PM, Paul Cercueil <p...@crapouillou.net> wrote: The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused handheld game console, successfully

[PATCH v3 5/9] doc: dt-bindings: Add doc for the Ingenic TCU timers driver

Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) timers driver from devicetree. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- .../devicetree/bindings/timer/ingenic,tcu.txt | 35 ++ 1 file changed, 35 insertions(+) creat

[PATCH v3 9/9] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers

Add myself as maintainer for the ingenic-tcu-intc interrupt controller driver, the ingenic-tcu-clocks clock driver, and the ingenic-tcu clocksource driver. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) v2: No chan

[PATCH v3 7/9] clk: ingenic: Add JZ47xx TCU clocks driver

channel (plus one for the watchdog and one for the OS timer) that can be used by other drivers. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/clk/ingenic/Makefile | 2 +- drivers/clk/ingenic/tcu.c| 319 +++ 2 files change

[PATCH v3 2/9] dt-bindings: ingenic: Add DT bindings for TCU clocks

This header provides clock numbers for the ingenic,tcu DT binding. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Reviewed-by: Rob Herring <r...@kernel.org> --- include/dt-bindings/clock/ingenic,tcu.h | 23 +++ 1 file changed, 23 insertions(+) create mode 10

[PATCH v3 4/9] doc: dt-bindings: Add doc for the Ingenic TCU clocks driver

Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) clocks driver from devicetree. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- .../bindings/clock/ingenic,tcu-clocks.txt | 36 ++ 1 file changed, 36 insertions(+) creat

Re: [PATCH v7 11/14] MIPS: ingenic: Initial JZ4770 support

Hi James, Le mer. 17 janv. 2018 à 22:28, James Hogan <james.ho...@mips.com> a écrit : On Tue, Jan 16, 2018 at 04:48:01PM +0100, Paul Cercueil wrote: Provide just enough bits (clocks, clocksource, uart) to allow a kernel to boot on the JZ4770 SoC to a initramfs userspace. Sign

[PATCH v7 05/14] dt-bindings: clock: Add jz4770-cgu.h header

This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4770-cgu driver. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> --- include

[PATCH v7 08/14] MIPS: ingenic: Use common cmdline handling code

From: Paul Burton jz4740_init_cmdline appends all arguments from argv (in fw_arg1) to arcs_cmdline, up to argc (in fw_arg0). The common code in fw_init_cmdline will do the exact same thing when run on a system where fw_arg0 isn't a pointer to kseg0 (it'll also set _fw_envp

[PATCH v7 09/14] MIPS: platform: add machtype IDs for more Ingenic SoCs

Add a machtype ID for the JZ4780 SoC, which was missing, and one for the newly supported JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmku...@gmail.com> Reviewed-by: James Hogan <jho...@kernel.org> --- arc

[PATCH v7 10/14] MIPS: ingenic: Detect machtype from SoC compatible string

Previously, the mips_machtype variable was always initialized to MACH_INGENIC_JZ4740 even if running on different SoCs. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/jz4740/prom.c | 1 - arch/mips/jz4740/setup.c | 22 +++--- 2 files changed, 19 inse

[PATCH v7 13/14] devicetree/bindings: Add GCW vendor prefix

Game Consoles Worldwide, mostly known under the acronym GCW, is the creator of the GCW Zero open-source video game system. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1

[PATCH v7 14/14] MIPS: ingenic: Initial GCW Zero support

The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused handheld game console, successfully kickstarted in ~2012, running Linux. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Mathieu Malaterre <ma...@debian.org> Acked-by: Philippe Ombredanne <pombr

[PATCH v7 04/14] clk: ingenic: Add code to enable/disable PLLs

This commit permits the PLLs to be dynamically enabled and disabled when their children clocks are enabled and disabled. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingeni

[PATCH v7 11/14] MIPS: ingenic: Initial JZ4770 support

Provide just enough bits (clocks, clocksource, uart) to allow a kernel to boot on the JZ4770 SoC to a initramfs userspace. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmku...@gmail.com> --- arch/mips/boot/dts/ingenic/jz477

[PATCH v7 12/14] MIPS: JZ4770: Work around config2 misreporting associativity

From: Maarten ter Huurne According to config2, the associativity would be 5-ways, but the documentation states 4-ways, which also matches the documented L2 cache size of 256 kB. Signed-off-by: Maarten ter Huurne Reviewed-by: James Hogan

[PATCH v7 00/14] JZ4770 and GCW0 patchset

Hi Ralf, Here is the V7 of my JZ4770 and GCW0 patch series. What changed from V6: - In patch 10/14 I reverted a change that prevented the system name/model from being correctly initialized - The patch dealing with the MMC DMA hardware issue has been dropped, since we couldn't reproduce the

[PATCH v7 02/14] clk: ingenic: Fix recalc_rate for clocks with fixed divider

-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) v2: No changes v3: No changes v4: No changes v5: No changes v6: No changes v7: No changes diff --git a/drivers/clk/ing

[PATCH v7 03/14] clk: ingenic: support PLLs with no bypass bit

The second PLL of the JZ4770 does not have a bypass bit. This commit makes it possible to support it with the current common CGU code. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.c | 3 ++- drivers

[PATCH v7 06/14] clk: Add Ingenic jz4770 CGU driver

Add support for the clocks provided by the CGU in the Ingenic JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Signed-off-by: Maarten ter Huurne <maar...@treewalker.org> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/Makefile | 1 + d

[PATCH v7 07/14] MIPS: Setup boot_command_line before plat_mem_setup

From: Paul Burton Platforms using DT will typically call __dt_setup_arch from plat_mem_setup. This in turn calls early_init_dt_scan. When CONFIG_CMDLINE is set, this leads to its value being copied into boot_command_line by early_init_dt_scan_chosen. If this happens before

[PATCH v7 01/14] clk: ingenic: Use const pointer to clk_ops in struct

The CGU common code does not modify the pointed clk_ops structure, so it should be marked as const. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.h| 2 +- drivers/clk/ingenic/jz4780-cgu.c | 2

Re: [PATCH v6 10/15] MIPS: ingenic: Detect machtype from SoC compatible string

Hi James, Le mer. 10 janv. 2018 à 23:27, James Hogan <james.ho...@mips.com> a écrit : On Fri, Jan 05, 2018 at 07:25:08PM +0100, Paul Cercueil wrote: Previously, the mips_machtype variable was always initialized to MACH_INGENIC_JZ4740 even if running on different SoCs. Signed-off-by

Re: [PATCH v6 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers

Hi James, Le jeu. 11 janv. 2018 à 0:20, James Hogan <james.ho...@mips.com> a écrit : On Fri, Jan 05, 2018 at 07:25:11PM +0100, Paul Cercueil wrote: [...] + +/* + * We have seen MMC DMA transfers read corrupted data from SDRAM when a burst + * interval ends at physical address 0x10

[PATCH v4 04/15] clk: ingenic: Add code to enable/disable PLLs

This commit permits the PLLs to be dynamically enabled and disabled when their children clocks are enabled and disabled. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/clk/ingenic/cgu.c | 89 +++ 1 file changed, 74 insertions(

[PATCH v4 02/15] clk: ingenic: Fix recalc_rate for clocks with fixed divider

-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) v2: No changes v3: No changes v4: No changes diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index ab393637f7b0..a2e73a6d60fd 100644 --- a/drivers/clk/i

[PATCH 1/3] serial: core: Make uart_parse_options take const char* argument

The pointed string is never modified from within uart_parse_options, so it should be marked as const in the function prototype. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/tty/serial/serial_core.c | 5 +++-- include/linux/serial_core.h | 2 +- 2 files chan

[PATCH v4 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers

From: Maarten ter Huurne We have seen MMC DMA transfers read corrupted data from SDRAM when a burst interval ends at physical address 0x1000. To avoid this problem, we remove the final page of low memory from the memory map. Signed-off-by: Maarten ter Huurne

[PATCH v4 07/15] MIPS: Setup boot_command_line before plat_mem_setup

From: Paul Burton Platforms using DT will typically call __dt_setup_arch from plat_mem_setup. This in turn calls early_init_dt_scan. When CONFIG_CMDLINE is set, this leads to its value being copied into boot_command_line by early_init_dt_scan_chosen. If this happens

[PATCH v4 12/15] MIPS: JZ4770: Work around config2 misreporting associativity

From: Maarten ter Huurne According to config2, the associativity would be 5-ways, but the documentation states 4-ways, which also matches the documented L2 cache size of 256 kB. Signed-off-by: Maarten ter Huurne --- arch/mips/mm/sc-mips.c | 9

[PATCH v4 10/15] MIPS: ingenic: Add machine info for supported boards

This makes sure that 'mips_machtype' will be initialized to the SoC version used on the board. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/Kconfig | 1 + arch/mips/jz4740/Makefile | 2 +- arch/mips/jz4740/boards.c | 16 arch/mips/jz4740/s

[PATCH v4 11/15] MIPS: ingenic: Initial JZ4770 support

Provide just enough bits (clocks, clocksource, uart) to allow a kernel to boot on the JZ4770 SoC to a initramfs userspace. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/boot/dts/ingenic/jz4770.dtsi | 210 + arch/mips/jz4740/K

[PATCH v4 08/15] MIPS: ingenic: Use common cmdline handling code

From: Paul Burton jz4740_init_cmdline appends all arguments from argv (in fw_arg1) to arcs_cmdline, up to argc (in fw_arg0). The common code in fw_init_cmdline will do the exact same thing when run on a system where fw_arg0 isn't a pointer to kseg0 (it'll also set

[PATCH v4 09/15] MIPS: platform: add machtype IDs for more Ingenic SoCs

Add a machtype ID for the JZ4780 SoC, which was missing, and one for the newly supported JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/include/asm/bootinfo.h | 2 ++ 1 file changed, 2 insertions(+) v2: No change v3: No change v4: No change diff --git

[PATCH v4 15/15] MIPS: ingenic: Initial GCW Zero support

The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused handheld game console, successfully kickstarted in ~2012, running Linux. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/boot/dts/ingenic/Makefile | 1 + arch/mips/boot/dts/ingenic/gcw0.dt

[PATCH v4 03/15] clk: ingenic: support PLLs with no bypass bit

The second PLL of the JZ4770 does not have a bypass bit. This commit makes it possible to support it with the current common CGU code. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/clk/ingenic/cgu.c | 3 ++- drivers/clk/ingenic/cgu.h | 2 ++ 2 files changed, 4 insertions

[PATCH v4 06/15] clk: Add Ingenic jz4770 CGU driver

Add support for the clocks provided by the CGU in the Ingenic JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Signed-off-by: Maarten ter Huurne <maar...@treewalker.org> --- drivers/clk/ingenic/Makefile | 1 + drivers/clk/ingenic/jz4770

[PATCH 0/3] Ingenic JZ4770 and earlycon support

Hi Greg, list, I split this set of 3 patches from another patchset that was sent to the MIPS mailing list (JZ4770 & GCW0 patchset) but never merged. That's why patch 2/3 already has an ACK from Rob. Cheers, - Paul Cercueil

[PATCH 3/3] serial: 8250_ingenic: Parse earlycon options

ly console for a baudrate of 57600 bps, no parity, and 8 bits per baud. This patches implements parsing of this configuration string in the 8250_ingenic driver, which previously just ignored it. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/tty/serial/8250/8250_ingenic.c | 12

[PATCH 2/3] serial: 8250_ingenic: Add support for the JZ4770 SoC

The JZ4770 SoC's UART is no different from the other JZ SoCs, so this commit simply adds the ingenic,jz4770-uart compatible string. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/serial/ingenic,

[PATCH v4 01/15] clk: ingenic: Use const pointer to clk_ops in struct

The CGU common code does not modify the pointed clk_ops structure, so it should be marked as const. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.h| 2 +- drivers/clk/ingenic/jz4780-cgu.c | 2

[PATCH v4 00/15] Ingenic JZ4770 and GCW Zero support

on top of v4.15-rc5. Regards, -Paul Cercueil

[PATCH v4 05/15] dt-bindings: clock: Add jz4770-cgu.h header

This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4770-cgu driver. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- include/dt-bindings/clock/jz4770-cgu.h | 57 ++ 1 file changed, 57 inse

[PATCH v4 14/15] devicetree/bindings: Add GCW vendor prefix

Game Consoles Worldwide, mostly known under the acronym GCW, is the creator of the GCW Zero open-source video game system. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1

[PATCH 1/7] watchdog: JZ4740: Disable clock after stopping counter

Previously, the clock was disabled first, which makes the watchdog component insensitive to register writes. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/watchdog/jz4740_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/jz4740_w

[PATCH 0/7] jz4740 watchdog driver & platform cleanups

Hi, This patchset is meant to drop the platform code that handles the system reset, since the watchdog driver can be used for this task. Some fixes and cleanups are also included. Thanks, -Paul Cercueil

[PATCH 6/7] MIPS: qi_lb60: Enable the jz4740-wdt driver

The watchdog is an useful piece of hardware, so there's no reason not to enable it. This commit enables the Kconfig option in the qi_lb60 defconfig. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/configs/qi_lb60_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff

[PATCH 5/7] MIPS: jz4780: dts: Fix watchdog node

- The previous node requested a memory area of 0x100 bytes, while the driver only manipulates four registers present in the first 0x10 bytes. - The driver requests for the "rtc" clock, but the previous node did not provide any. Signed-off-by: Paul Cercueil <p...@crapouillou.n

[PATCH 4/7] MIPS: jz4740: dts: Add bindings for the jz4740-wdt driver

Also remove the watchdog platform_device from platform.c, since it wasn't used anywhere anyway. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/boot/dts/ingenic/jz4740.dtsi | 8 arch/mips/jz4740/platform.c| 16 2 files chan

[PATCH 3/7] watchdog: JZ4740: Register a restart handler

The watchdog driver can restart the system by simply configuring the hardware for a timeout of 0 seconds. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/watchdog/jz4740_wdt.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/watchdog/jz4740_wdt.c b/d

[PATCH 7/7] MIPS: jz4740: Drop old platform reset code

This work is now performed by the watchdog driver directly. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/jz4740/reset.c | 31 --- 1 file changed, 31 deletions(-) diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c index 67780c

[PATCH 2/7] watchdog: jz4740: Use devm_* functions

- Use devm_clk_get instead of clk_get - Use devm_watchdog_register_device instead of watchdog_register_device Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/watchdog/jz4740_wdt.c | 27 --- 1 file changed, 8 insertions(+), 19 deletions(-) diff

Re: [PATCH 2/7] watchdog: jz4740: Use devm_* functions

Hi Guenter, Le jeu. 28 déc. 2017 à 18:48, Guenter Roeck <li...@roeck-us.net> a écrit : On 12/28/2017 08:29 AM, Paul Cercueil wrote: - Use devm_clk_get instead of clk_get - Use devm_watchdog_register_device instead of watchdog_register_device Signed-off-by: Paul Cercu

Re: [PATCH 2/7] watchdog: jz4740: Use devm_* functions

Le jeu. 28 déc. 2017 à 21:19, Guenter Roeck <li...@roeck-us.net> a écrit : On 12/28/2017 11:59 AM, Paul Cercueil wrote: Hi Guenter, Le jeu. 28 déc. 2017 à 18:48, Guenter Roeck <li...@roeck-us.net> a écrit : On 12/28/2017 08:29 AM, Paul Cercueil wrote: - Use devm_clk

Re: [PATCH v5 10/15] MIPS: ingenic: Add machine info for supported boards

Hi PrasannaKumar, Le mar. 2 janv. 2018 à 17:02, PrasannaKumar Muralidharan <prasannatsmku...@gmail.com> a écrit : Hi Paul, On 2 January 2018 at 20:38, Paul Cercueil <p...@crapouillou.net> wrote: This makes sure that 'mips_machtype' will be initialized to the SoC version used

[PATCH v5 07/15] MIPS: Setup boot_command_line before plat_mem_setup

From: Paul Burton Platforms using DT will typically call __dt_setup_arch from plat_mem_setup. This in turn calls early_init_dt_scan. When CONFIG_CMDLINE is set, this leads to its value being copied into boot_command_line by early_init_dt_scan_chosen. If this happens

[PATCH v5 06/15] clk: Add Ingenic jz4770 CGU driver

Add support for the clocks provided by the CGU in the Ingenic JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Signed-off-by: Maarten ter Huurne <maar...@treewalker.org> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/Makefile | 1 + d

[PATCH v5 04/15] clk: ingenic: Add code to enable/disable PLLs

This commit permits the PLLs to be dynamically enabled and disabled when their children clocks are enabled and disabled. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingeni

[PATCH v5 09/15] MIPS: platform: add machtype IDs for more Ingenic SoCs

Add a machtype ID for the JZ4780 SoC, which was missing, and one for the newly supported JZ4770 SoC. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/include/asm/bootinfo.h | 2 ++ 1 file changed, 2 insertions(+) v2: No change v3: No change v5: No change diff --git

Re: [PATCH v2 5/8] MIPS: jz4740: dts: Add bindings for the jz4740-wdt driver

Hi PrasannaKumar, Le mar. 2 janv. 2018 à 17:37, PrasannaKumar Muralidharan <prasannatsmku...@gmail.com> a écrit : Hi Paul, On 30 December 2017 at 19:21, Paul Cercueil <p...@crapouillou.net> wrote: Also remove the watchdog platform_device from platform.c, since it wasn't u

[PATCH v5 03/15] clk: ingenic: support PLLs with no bypass bit

The second PLL of the JZ4770 does not have a bypass bit. This commit makes it possible to support it with the current common CGU code. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.c | 3 ++- drivers

[PATCH] platform/x86: silead_dmi: Add entry for the Teclast X98 Plus II

Add touchscreen platform data for the Teclast X98 Plus II tablet. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- drivers/platform/x86/silead_dmi.c | 24 1 file changed, 24 insertions(+) diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platfo

[PATCH v5 11/15] MIPS: ingenic: Initial JZ4770 support

Provide just enough bits (clocks, clocksource, uart) to allow a kernel to boot on the JZ4770 SoC to a initramfs userspace. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/boot/dts/ingenic/jz4770.dtsi | 212 + arch/mips/jz4740/K

[PATCH v5 15/15] MIPS: ingenic: Initial GCW Zero support

The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused handheld game console, successfully kickstarted in ~2012, running Linux. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/boot/dts/ingenic/Makefile | 1 + arch/mips/boot/dts/ingenic/gcw0.dt

[PATCH v5 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers

From: Maarten ter Huurne We have seen MMC DMA transfers read corrupted data from SDRAM when a burst interval ends at physical address 0x1000. To avoid this problem, we remove the final page of low memory from the memory map. Signed-off-by: Maarten ter Huurne

[PATCH v5 14/15] devicetree/bindings: Add GCW vendor prefix

Game Consoles Worldwide, mostly known under the acronym GCW, is the creator of the GCW Zero open-source video game system. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1

[PATCH v5 10/15] MIPS: ingenic: Add machine info for supported boards

This makes sure that 'mips_machtype' will be initialized to the SoC version used on the board. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- arch/mips/Kconfig | 1 + arch/mips/jz4740/Makefile | 2 +- arch/mips/jz4740/boards.c | 12 arch/mips/jz4740/setup.c

[PATCH v5 12/15] MIPS: JZ4770: Work around config2 misreporting associativity

From: Maarten ter Huurne According to config2, the associativity would be 5-ways, but the documentation states 4-ways, which also matches the documented L2 cache size of 256 kB. Signed-off-by: Maarten ter Huurne --- arch/mips/mm/sc-mips.c | 9

[PATCH v5 08/15] MIPS: ingenic: Use common cmdline handling code

From: Paul Burton jz4740_init_cmdline appends all arguments from argv (in fw_arg1) to arcs_cmdline, up to argc (in fw_arg0). The common code in fw_init_cmdline will do the exact same thing when run on a system where fw_arg0 isn't a pointer to kseg0 (it'll also set

[PATCH v5 05/15] dt-bindings: clock: Add jz4770-cgu.h header

This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4770-cgu driver. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- include/dt-bindings/clock/jz477

[PATCH v5 02/15] clk: ingenic: Fix recalc_rate for clocks with fixed divider

-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) v2: No changes v3: No changes v4: No changes v5: No changes diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic

[PATCH v5 01/15] clk: ingenic: Use const pointer to clk_ops in struct

The CGU common code does not modify the pointed clk_ops structure, so it should be marked as const. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Stephen Boyd <sb...@codeaurora.org> --- drivers/clk/ingenic/cgu.h| 2 +- drivers/clk/ingenic/jz4780-cgu.c | 2

Re: [PATCH v2 4/6] clk: ingenic: Add JZ47xx TCU clocks driver

Hi, [...] + +static void __init ingenic_tcu_init(struct device_node *np, + enum ingenic_version id) +{ + struct ingenic_tcu *tcu; + size_t i, nb_clks; + int ret = -ENOMEM; + + if (id >= ID_JZ4770) + nb_clks = (JZ4770_CLK_LAST -

Re: [PATCH v2 5/6] clocksource: Add a new timer-ingenic driver

Hi, Le mer. 3 janv. 2018 à 22:08, Rob Herring <r...@kernel.org> a écrit : On Mon, Jan 01, 2018 at 03:33:43PM +0100, Paul Cercueil wrote: This driver will use the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs to provide the kernel with a clocksource and timers. Sign

Re: [PATCH v2 3/6] irqchip: Add the ingenic-tcu-intc driver

Hi, Le mer. 3 janv. 2018 à 21:58, Rob Herring <r...@kernel.org> a écrit : On Mon, Jan 01, 2018 at 03:33:41PM +0100, Paul Cercueil wrote: This simple driver handles the IRQ chip of the TCU (Timer Counter Unit) of the JZ47xx Ingenic SoCs. Signed-off-by: Paul Cercueil <p...@crapou

[PATCH v2 1/6] mfd: syscon: Add ingenic-tcu.h header

This header contains macros for the registers that are present in the regmap shared by all the drivers related to the TCU (Timer Counter Unit) of the Ingenic JZ47xx SoCs. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- include/linux/mfd/syscon/ingenic-tcu.

[PATCH v2 6/6] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers

Add myself as maintainer for the ingenic-tcu-intc interrupt controller driver, the ingenic-tcu-clocks clock driver, and the ingenic-tcu clocksource driver. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINT

[PATCH v2 4/6] clk: ingenic: Add JZ47xx TCU clocks driver

channel (plus one for the watchdog and one for the OS timer) that can be used by other drivers. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- .../bindings/clock/ingenic,tcu-clocks.txt | 35 +++ drivers/clk/ingenic/Makefile | 2 +- drivers/clk/i

[PATCH v2 5/6] clocksource: Add a new timer-ingenic driver

This driver will use the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs to provide the kernel with a clocksource and timers. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- .../devicetree/bindings/timer/ingenic,tcu.txt | 35 +++ drivers/clocksource/K

[PATCH v2 3/6] irqchip: Add the ingenic-tcu-intc driver

This simple driver handles the IRQ chip of the TCU (Timer Counter Unit) of the JZ47xx Ingenic SoCs. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- .../bindings/interrupt-controller/ingenic,tcu.txt | 32 + drivers/irqchip/Kconfig| 6 + drivers/i

[PATCH v2 2/6] dt-bindings: ingenic: Add DT bindings for TCU clocks

This header provides clock numbers for the ingenic,tcu DT binding. Signed-off-by: Paul Cercueil <p...@crapouillou.net> --- include/dt-bindings/clock/ingenic,tcu.h | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 include/dt-bindings/clock/ingenic,tcu.h v

[PATCH v2] platform/x86: silead_dmi: Add entry for the Teclast X98 Plus II

Add touchscreen platform data for the Teclast X98 Plus II tablet. Signed-off-by: Paul Cercueil <p...@crapouillou.net> Acked-by: Hans de Goede <hdego...@redhat.com> --- drivers/platform/x86/silead_dmi.c | 24 1 file changed, 24 insertions(+) v2: Rebased on

Re: [PATCH v3 01/18] doc: dt-bindings: jz4780-dma: Update bindings to reflect driver changes

Hi, Le mer. 25 juil. 2018 à 1:35, Rob Herring a écrit : On Sat, Jul 21, 2018 at 01:06:26PM +0200, Paul Cercueil wrote: The driver is now compatible with four SoCs: JZ4780, JZ4770, JZ4725B and JZ4740. What the driver supports is irrelevant to the binding. That's just informative. But I

Re: [PATCH v3 07/18] dmaengine: dma-jz4780: Add support for the JZ4770 SoC

Hi Vinod, Le mar. 24 juil. 2018 à 15:32, Vinod a écrit : On 21-07-18, 13:06, Paul Cercueil wrote: +static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma, + unsigned int chn) right justified and aligned with preceding please. While adding new code to a existing

[PATCH 7/7] gpio: ingenic: Remove driver

The pinctrl-ingenic driver is now handling the GPIO chips directly. Signed-off-by: Paul Cercueil --- .../devicetree/bindings/gpio/ingenic,gpio.txt | 46 --- drivers/gpio/Kconfig | 11 - drivers/gpio/Makefile | 1 - drivers/gpio

[PATCH 5/7] pinctrl: ingenic: Add support for the JZ4725B

Add support for the JZ4725B and compatible SoCs from Ingenic. Signed-off-by: Paul Cercueil --- .../bindings/pinctrl/ingenic,pinctrl.txt | 2 + drivers/pinctrl/pinctrl-ingenic.c | 99 ++ 2 files changed, 101 insertions(+) diff --git

[PATCH 2/7] pinctrl: ingenic: Mark probe function as __init

By using platform_driver_probe() instead of platform_driver_register(), we can mark the ingenic_pinctrl_probe() function as __init. Signed-off-by: Paul Cercueil --- drivers/pinctrl/pinctrl-ingenic.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl

[PATCH 4/7] pinctrl: ingenic: Implement .get_direction for GPIO chips

This allows to read from debugfs whether the GPIOs requested are set as input or output. Signed-off-by: Paul Cercueil --- drivers/pinctrl/pinctrl-ingenic.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl

[PATCH 6/7] pinctrl: ingenic: Drop dependency on MACH_INGENIC

Depending on MACH_INGENIC prevent us from creating a generic kernel that works on more than one MIPS board. Instead, we just depend on MIPS being set. Signed-off-by: Paul Cercueil --- drivers/pinctrl/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl

[PATCH 3/7] pinctrl: ingenic: Merge GPIO functionality

Merge the code of the gpio-ingenic driver into the pinctrl-ingenic driver. The reason behind this, is that the same hardware block handles both pin config / muxing and GPIO. Signed-off-by: Paul Cercueil --- .../bindings/pinctrl/ingenic,pinctrl.txt | 38 ++- drivers/pinctrl/Kconfig

[PATCH 1/7] pinctrl: ingenic: Probe driver at subsys_initcall

Using postcore_initcall() makes the driver try to initialize way too early. Signed-off-by: Paul Cercueil --- drivers/pinctrl/pinctrl-ingenic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index

[PATCH v4 07/18] dmaengine: dma-jz4780: Add support for the JZ4770 SoC

The JZ4770 SoC has two DMA cores, each one featuring six DMA channels. The major change is that each channel's clock can be enabled or disabled through register writes. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 61

[PATCH v4 08/18] dmaengine: dma-jz4780: Add support for the JZ4740 SoC

The JZ4740 SoC has a single DMA core starring six DMA channels. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Reviewed-by: PrasannaKumar Muralidharan --- drivers/dma/dma-jz4780.c | 6 ++ 1 file changed, 6 insertions(+) v2: The documentation update is now in patch 01/17 v3

[PATCH v4 04/18] dmaengine: dma-jz4780: Separate chan/ctrl registers

-specific registers and one memory resource for the core-specific registers, we can support the JZ4770, by initializing the driver once per DMA core with different addresses. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 112

[PATCH v4 03/18] dmaengine: dma-jz4780: Avoid hardcoding number of channels

As part of the work to support various other Ingenic JZ47xx SoC versions, which don't feature the same number of DMA channels per core, we now deduce the number of DMA channels available from the devicetree compatible string. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre

[PATCH v4 12/18] dmaengine: dma-jz4780: Simplify jz4780_dma_desc_residue()

From: Daniel Silsby Simple cleanup, no changes to actual logic here. Signed-off-by: Daniel Silsby Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 15 +-- 1 file changed, 5 insertions(+), 10 deletions(-) v2: No change v3: No change

[PATCH v4 17/18] MIPS: JZ4770: DTS: Add DMA nodes

Add the two devicetree nodes for the two DMA cores of the JZ4770 SoC, disabled by default, as currently there are no clients for the DMA driver (until the MMC driver and/or others get a devicetree node). Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Acked-by: Paul Burton --- arch

[PATCH v4 11/18] dmaengine: dma-jz4780: Add missing residue DTC mask

of the DTCn hardware reg are automatically masked this way. Signed-off-by: Daniel Silsby Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) v2: No change v3: No change v4: Add my Signed-off-by diff

[PATCH v4 02/18] dmaengine: dma-jz4780: Return error if not probed from DT

The driver calls clk_get() with the clock name set to NULL, which means that the driver could only work when probed from devicetree. From now on, we explicitly require the driver to be probed from devicetree. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780

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