Hi Jacek,
All looks make sense. I'll keep following up.
Sean
On Wed, 2017-02-08 at 22:00 +0100, Jacek Anaszewski wrote:
> Hi Sean,
>
> Thanks for the update. Some nitpicking below.
>
> On 02/08/2017 03:19 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang &l
e find my comments in the code below.
>
> On 01/23/2017 04:54 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > MT6323 PMIC is a multi-function device that includes
> > LED function. It allows attaching upto 4 LEDs which can
&g
On Wed, 2017-01-18 at 16:42 -0600, Rob Herring wrote:
> On Wed, Jan 18, 2017 at 4:23 PM, Rob Herring <r...@kernel.org> wrote:
> > On Fri, Jan 13, 2017 at 03:35:38PM +0800, sean.w...@mediatek.com wrote:
> >> From: Sean Wang <sean.w...@mediatek.com>
> >
Date: Wed, 21 Sep 2016 16:17:20 +0200, Andrew Lunn <and...@lunn.ch> wrote:
>On Wed, Sep 21, 2016 at 02:16:30PM +0800, Sean Wang wrote:
>> Date: Tue, 20 Sep 2016 21:37:58 +0200, Andrew Lunn <and...@lunn.ch> wrote:
>> >On Tue, Sep 20, 2016 at 03:59:20PM +0800
Date: Thu, 22 Sep 2016 19:48:47 +0300, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
>On 09/22/2016 07:16 PM, sean.w...@mediatek.com wrote:
>
>> From: Sean Wang <sean.w...@mediatek.com>
>>
>> fix typo in mediatek-net.txt and add phy-mode "trg
Date: Thu, 22 Sep 2016 14:30:53 +0300, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
>>Hello.
>
>On 9/22/2016 5:33 AM, sean.w...@mediatek.com wrote:
>
>> From: Sean Wang <sean.w...@mediatek.com>
>>
>> adds PHY-mode "trgmii"
Date: Thu, 22 Sep 2016 14:28:36 +0300, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
>Hello.
>
>On 9/22/2016 5:33 AM, sean.w...@mediatek.com wrote:
>
>> From: Sean Wang <sean.w...@mediatek.com>
>>
>> Add the dts property for the capability
Hi Rob,
thanks for your effort for reviewing. I added comments inline.
On Mon, 2017-01-09 at 12:32 -0600, Rob Herring wrote:
> On Fri, Jan 06, 2017 at 12:06:23AM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Th
will remove it from dtsi in the next version
Sean
On Sat, 2017-01-14 at 11:32 +0100, John Crispin wrote:
> Hi Erin,
>
> small comment inline
>
> On 13/01/2017 09:42, Erin Lo wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add ethernet devi
; > > +
> > > > + /* Enable interrupt after proper hardware
> > > > +* setup and IRQ handler registration
> > > > +*/
> > > > + if (clk_prepare_enable(ir->clk)) {
> > > > + dev_err(dev, "try to enable ir_clk failed\n");
> > > &
okay, I will continue to work based on your changes unless someone else
has concerns
On Wed, 2017-01-11 at 07:45 +0900, Andi Shyti wrote:
> Hi Sean,
>
> >include/linux/compiler.h:253:8: sparse: attribute 'no_sanitize_address':
> > unknown attribute
> > >> drivers/media/rc/mtk-cir.c:215:41:
On Sun, 2017-01-08 at 21:16 +, Sean Young wrote:
> Hi Sean,
>
> On Fri, Jan 06, 2017 at 03:31:25PM +0800, Sean Wang wrote:
> > On Thu, 2017-01-05 at 17:12 +, Sean Young wrote:
> > > On Fri, Jan 06, 2017 at 12:06:24AM +0800, sean.w...@mediatek.com wrote:
> &g
Hi Sean,
Thanks for your effort for code reviewing. I add comments inline.
On Thu, 2017-01-05 at 17:12 +, Sean Young wrote:
> Hi Sean,
>
> Some review comments.
>
> On Fri, Jan 06, 2017 at 12:06:24AM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang &l
Hi Andi,
Thank for your reminder. I will refine the code based on your work.
to have elegant code and easy error handling.
Sean
On Fri, 2017-01-06 at 12:43 +0900, Andi Shyti wrote:
> Hi Sean,
>
> > + ir->rc = rc_allocate_device();
>
> Yes, you should use devm_rc_allocate_device(...)
>
>
t; + if (clk_prepare_enable(ir->clk)) {
> > + dev_err(dev, "try to enable ir_clk failed\n");
> > + ret = -EINVAL;
> > + goto exit_clkdisable_clk;
> > + }
> > +
> > + mtk_irq_disable(ir, MTK_IRINT_EN);
> > +
> > +
Hi Andrew,
The purpose for the regmap table registered is to
provide a way which helps us to look up a specific
register on the switch through regmap-debugfs.
And not all ranges of register is defined
so I only include the meaningful ones in a sparse way
for the table.
Sean
On
Hi Andrew,
Add comment as below inline
On Fri, 2017-03-24 at 15:02 +0100, Andrew Lunn wrote:
> Hi Sean
>
> > + regmap = devm_regmap_init(ds->dev, NULL, priv,
> > + _regmap_config);
> > + if (IS_ERR(regmap))
> > + dev_warn(priv->dev, "phy regmap
Hi Andrew
On Fri, 2017-03-24 at 15:19 +0100, Andrew Lunn wrote:
> On Tue, Mar 21, 2017 at 05:35:10PM +0800, sean.w...@mediatek.com wrote:
>
> Hi Sean
>
> > + /* Lower Tx Driving */
> > + for (i = 0 ; i < 6 ; i++)
>
> Could MT7530_CPU_PORT be used here?
>
I should create meaningful
Hi Florian,
Thank for taking your time on reviewing. Add comment as inline.
On Wed, 2017-03-22 at 11:39 -0700, Florian Fainelli wrote:
> On 03/21/2017 02:35 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > MT7530 is a 7-po
Hi PrasannaKumar,
Add my comments inline
On Thu, 2017-04-13 at 14:09 +0530, PrasannaKumar Muralidharan wrote:
> Hi Sean,
>
> Mostly looks good, have few minor comments.
>
> On 13 April 2017 at 12:35, wrote:
> > +static bool mtk_rng_wait_ready(struct hwrng *rng, bool
iatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > This patch adds support for hardware random generator on MT7623 SoC
> > and should also work on other similar Mediatek SoCs. Currently,
> > the driver is already tested successfully with r
On Mon, 2017-03-13 at 17:36 +0100, Andrew Lunn wrote:
> > +- mediatek,reset-pin: Phandle to the pinctrl node used for the reset. Which
> > + must be required if the property mediatek,mcm of specified as
> > + "disabled". See
> > + Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
On Mon, 2017-03-13 at 13:00 +0100, Matthias Brugger wrote:
>
> On 03/03/17 14:56, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > This patch adds documentation for devicetree bindings
> > for LED support as the subnode of MT6
On Mon, 2017-03-13 at 09:35 -0700, Florian Fainelli wrote:
> On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add the support for the 4-bytes tag for DSA port distinguishing inserted
> > allowing receivin
On Mon, 2017-03-13 at 12:59 -0400, Vivien Didelot wrote:
> Hi Sean,
>
> sean.w...@mediatek.com writes:
>
> > + mtk_tag[1] = (1 << p->port) & MTK_HDR_XMIT_DP_BIT_MASK;
>
> This won't apply, the port index in now stored in p->dp->index.
>
> Thanks,
>
> Vivien
Hi Vivien,
It seems
On Tue, 2017-03-14 at 00:11 +0100, Andrew Lunn wrote:
> > +static int
> > +mt7530_setup(struct dsa_switch *ds)
> > +{
> > + struct mt7530_priv *priv = ds->priv;
> > + int ret, i, phy_mode;
> > + u8 cpup_mask = 0;
> > + u32 id, val;
> > + struct regmap *regmap;
> > +
> > + /* Make sure
On Mon, 2017-03-13 at 09:47 -0700, Florian Fainelli wrote:
> On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add device-tree binding for Mediatek MT7530 switch.
> >
> > Cc: devicet...@vger.kernel.o
raw mode for more compatibility with different protocols
> > as previously SoC did. Before adding support to MT7622 SoC, extra
> > code refactor is done since there're major differences in register and
> > field definition from the previous SoC.
> >
> > Sean Wang (4)
On Wed, 2017-08-02 at 09:47 +0800, Yingjoe Chen wrote:
> On Mon, 2017-07-31 at 15:36 +0800, sean.w...@mediatek.com wrote:
> <...>
> > diff --git a/arch/arm/boot/dts/mt7623-evb.dts
> > b/arch/arm/boot/dts/mt7623-evb.dts
> > index b60b41c..0686ad7 100644
> > --- a/arch/arm/boot/dts/mt7623-evb.dts
>
in
alphabetical order. Thanks for Ryder to catch.
Sean
On Thu, 2017-08-03 at 16:29 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediatek.com>
>
> The bananapi-r2 board has an SD-card controller and built-in
> EMMC storage so enables those devices in th
On Thu, 2017-08-03 at 12:03 +0200, Matthias Brugger wrote:
> Hi Sean,
>
> On 08/03/2017 10:38 AM, Sean Wang wrote:
> > Hi, Matthias,
> >
> > Ryder and me tried to make the patch better, so the delivery is made in
> > v3, including add missing pin state for mm
On Fri, 2017-08-04 at 11:59 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediatek.com>
>
> The bananapi-r2 board has an SD-card controller and built-in
> EMMC storage so enables those devices in the devicetree. Also
> cleanup nodes in alphabetical order
On Tue, 2017-08-15 at 12:50 +0100, Mark Brown wrote:
> On Tue, Aug 15, 2017 at 05:09:14PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > add dt-binding document for MediaTek MT6380 PMIC
>
> Please use subject lines refle
On Tue, 2017-08-15 at 21:08 +0800, Jun Gao wrote:
> From: Jun Gao
>
> Add MT7622 i2c binding to binding file and change the compatible
> information formats of all SoCs to the same.
>
> Signed-off-by: Jun Gao
> ---
>
On Tue, 2017-08-15 at 21:08 +0800, Jun Gao wrote:
> From: Jun Gao
>
> Add i2c compatible for MT7622. Compare to MT8173 i2c controller,
> MT7622 limits message numbers to 255, and does not support 4GB
> DMA mode.
>
> Signed-off-by: Jun Gao
you seemed
Hi, Weiyi
for patch 5 to 9, you should re-base to the latest the Matthias tree
which has some changes around scpsys since Linux v4.13-rc1
Sean
On Tue, 2017-08-15 at 14:42 +0800, weiyi...@mediatek.com wrote:
> This patch set is composed of clock control (PATCH 1-4) and scpsys control
On Mon, 2017-07-24 at 13:22 -0500, Rob Herring wrote:
> On Tue, Jul 18, 2017 at 05:49:22PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > add dt-binding document for MediaTek MT6380 PMIC
> >
> > Signed-off-by
On Thu, 2017-08-10 at 11:27 -0500, Rob Herring wrote:
> On Thu, Aug 03, 2017 at 01:05:22AM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Document the devicetree bindings for MediaTek BTIF controller
> > which could
On Tue, 2017-07-18 at 14:31 +0100, Mark Brown wrote:
> On Tue, Jul 18, 2017 at 05:49:23PM +0800, sean.w...@mediatek.com wrote:
>
> > + if (!info->modeset_mask) {
> > + dev_err(>dev, "regulator %s doesn't support set_mode\n",
> > + info->desc.name);
> > +
ected as a slave to the SoC using MediaTek PMIC wrapper which
> > is the common interface connecting with Mediatek made various PMICs.
> >
> > Signed-off-by: Chenglin Xu <chenglin...@mediatek.com>
> > Signed-off-by: Sean Wang <sean.w...@mediatek.com>
> &g
On Thu, 2017-08-10 at 12:43 -0500, Rob Herring wrote:
> On Fri, Aug 04, 2017 at 03:14:07PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > This updates dt-binding documentation for MediaTek MT7622 and
> > MT7623 SoC. For
On Sat, 2017-06-24 at 00:43 +0800, Sean Wang wrote:
> On Fri, 2017-06-23 at 17:14 +0100, Mark Brown wrote:
> > On Fri, Jun 23, 2017 at 11:56:05PM +0800, Sean Wang wrote:
> > > On Tue, 2017-06-06 at 19:22 +0100, Mark Brown wrote:
> >
> > > > > +
Hi, Gustavo
It indeed is useless at the current time point.
but actually I will add new SoC support to the driver in the next week,
which requires the variable match :-(
Sean
On Fri, 2017-07-07 at 15:23 -0500, Gustavo A. R. Silva wrote:
> Remove useless local variables _match_,
On Fri, 2017-07-07 at 09:30 +0200, Jean Delvare wrote:
> Hi Sean,
>
> On ven., 2017-07-07 at 11:56 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > MT2701/MT7623 is a 32-bit ARMv7 based quad-core (4 * Cortex-A7) with
>
On Wed, 2017-07-12 at 16:17 -0700, Stephen Boyd wrote:
> On 07/11, sean.w...@mediatek.com wrote:
> > diff --git a/drivers/clk/mediatek/clk-cpumux.c
> > b/drivers/clk/mediatek/clk-cpumux.c
> > index edd8e69..c6a3a1a 100644
> > --- a/drivers/clk/mediatek/clk-cpumux.c
> > +++
On Wed, 2017-07-12 at 16:50 +0200, Andrew Lunn wrote:
> > +static int mtk_clk_enable(struct mtk_eth *eth)
> > +{
> > + int clk, ret;
> > +
> > + for (clk = 0; clk < MTK_CLK_MAX ; clk++) {
> > + if (eth->clks[clk]) {
> > + ret = clk_prepare_enable(eth->clks[clk]);
>
On Mon, 2017-07-17 at 15:38 +0200, Andrew Lunn wrote:
> On Mon, Jul 17, 2017 at 06:06:22PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > The patch adds the supplements in the dt-binding document for MediaTek
> > M
Hi, Viresh
I missed to add Acks from Rob for patch 2 and 3 since we sent out almost
at the same time. Do I need to resend again for this or the series is
okay for you?
Sean
On Mon, 2017-07-10 at 22:23 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediat
On Wed, 2017-07-19 at 00:01 +0800, Yingjoe Chen wrote:
> On Tue, 2017-07-18 at 17:49 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Signed-off-by: Chenglin Xu <chenglin...@mediatek.com>
> > Signed-off-by: Sean
break;
> - }
>
> if (skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC) {
> bytes[mac] += skb->len;
Acked-by: Sean Wang <sean.w...@mediatek.com>
Hi, Matthias
just a gentle ping on this
Sean
On Wed, 2017-06-21 at 15:49 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediatek.com>
>
> Fixed binding violation and also updated related binding documentation to
> reflect the reset signals the
Hi, Matthias
just a gentle ping on this
Sean
On Sat, 2017-06-17 at 01:06 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediatek.com>
>
> Changes since v4:
> - redefine the two dummy clocks with the correct frequency
> which is 25MHz an
On Thu, 2017-07-27 at 16:39 +0200, Matthias Brugger wrote:
>
> On 05/25/2017 06:02 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add support for the Bananapi R2 (BPI-R2) development board from
> > BIPAI KEJI. Detailed h
Hi, Matthias
Except for patch 1, 2 and 3; the others are entirely related to
pmic-wrapper driver all belonged to mtk soc code and
are they all good enough to be ready going through your tree?
Sean
On Tue, 2017-07-18 at 17:49 +0800, sean.w...@mediatek.com wrote:
> From: Sean W
al
> > power dissipation.
> >
> > Signed-off-by: Chen Zhong <chen.zh...@mediatek.com>
> > Signed-off-by: Sean Wang <sean.w...@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-scpsys.c | 81
> > +
On Wed, 2017-08-02 at 20:14 +0300, Andy Shevchenko wrote:
> On Thu, 2017-08-03 at 01:05 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > This patchset introduces the support for MediaTek BTIF controller.
> >
> >
Hi Matthias,
Appreciate your help on reviewing. Add my comments inline
On Mon, 2017-05-15 at 09:53 +0200, Matthias Brugger wrote:
>
> On 12/05/17 09:56, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Because there
On Tue, 2017-05-09 at 16:03 +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, May 1, 2017 at 2:58 PM, Sean Wang <sean.w...@mediatek.com> wrote:
> > On Fri, 2017-04-28 at 15:37 -0500, Rob Herring wrote:
> >> On Wed, Apr 26, 2017 at 05:26:13PM +0800, sean.w...@mediatek.com
On Mon, 2017-05-01 at 10:10 +0200, John Crispin wrote:
>
> On 01/05/17 09:54, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > mt7623 pinctrl hardware can be compatible with mt2701 driver,
> > so the patch lets the pi
1:56:53PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Changes since v1:
> > - update the bindings with the specific "mediatek,mt7622-rng"
> > instead of the generic one as "mediatek,generic-rng"
&
Hi Mark,
appreciate your effort on reviewing those patches
we'll make next version following your suggestion, here also adding some
comments as inline to explain what thoughts in mind
On Tue, 2017-06-06 at 19:22 +0100, Mark Brown wrote:
> On Sat, Jun 03, 2017 at 01:55:44AM +0800,
On Fri, 2017-06-23 at 17:14 +0100, Mark Brown wrote:
> On Fri, Jun 23, 2017 at 11:56:05PM +0800, Sean Wang wrote:
> > On Tue, 2017-06-06 at 19:22 +0100, Mark Brown wrote:
>
> > > > + return (regval & info->desc.enable_mask) ?
> > &g
On Tue, 2017-06-20 at 16:59 +0200, Torsten Duwe wrote:
> On Tue, Jun 20, 2017 at 10:21:17PM +0800, Sean Wang wrote:
> > Hi Herbert,
> >
> > thanks for effort reviewing on those patches.
> >
> > By the way, also loop in Torsten
> >
> > Could you
Hi Michael and Stephen
Just a gentle ping on this one :)
Cheers, Sean
On Fri, 2017-05-05 at 23:26 +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang <sean.w...@mediatek.com>
>
> This patch adds CPU multiplexer clocks which are essential for Mediatek
> cpufreq dr
On Mon, 2017-05-29 at 17:09 +0200, Matthias Brugger wrote:
>
> On 29/05/17 14:56, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > For more readability and maintenance, all the clock related DT
> > nodes for mt7622 SoC
On Thu, 2017-06-08 at 15:52 +0200, Matthias Brugger wrote:
>
> On 31/05/17 19:29, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > add basic nodes into the mt7622.dtsi for the system
> > bring-up which includes ARM CPU, G
On Tue, 2017-06-06 at 13:07 +0200, Matthias Brugger wrote:
>
> On 31/05/17 20:44, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add the generic binding for allowing the support of RNG on MediaTek SoCs
> > such as MT762
On Wed, 2017-06-07 at 15:25 +0200, Matthias Brugger wrote:
>
> On 07/06/17 15:20, Sean Wang wrote:
> > On Tue, 2017-06-06 at 13:07 +0200, Matthias Brugger wrote:
> >>
> >> On 31/05/17 20:44, sean.w...@mediatek.com wrote:
> >>> From: Sean Wang <sean.w
On Thu, 2017-06-15 at 18:04 +0200, Matthias Brugger wrote:
>
> On 14/06/17 18:11, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > add basic nodes into the mt7622.dtsi for the system
> > bring-up which includes ARM CPU, G
On Fri, 2017-06-09 at 10:22 +0200, Matthias Brugger wrote:
>
> On 01/06/17 08:08, Erin Lo wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add ethernet device node for MT2701
> >
> > Signed-off-by: Sean Wang <sean.w...@mediatek.com>
On Mon, 2017-05-08 at 09:48 +0530, Viresh Kumar wrote:
> On 05-05-17, 23:26, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > The old place is Documentation/devicetree/bindings/clock/ that would
> > let people hard to find how t
On Mon, 2017-05-08 at 09:50 +0530, Viresh Kumar wrote:
> On 05-05-17, 23:26, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Update binding document to reflect the lastest driver logic and
>
> The bindings don't follow the dri
y 1, 2017 at 1:58 AM, Sean Wang <sean.w...@mediatek.com> wrote:
> > On Fri, 2017-04-28 at 15:37 -0500, Rob Herring wrote:
> >> On Wed, Apr 26, 2017 at 05:26:13PM +0800, sean.w...@mediatek.com wrote:
> >> > From: Sean Wang <sean.w...@mediatek.com>
> >&g
Hi Jean,
Appreciate your reviewing and suggestion. I added my comment inline.
On Sat, 2017-05-06 at 10:00 +0200, Jean Delvare wrote:
> Hi Sean,
>
> On Fri, 5 May 2017 23:26:12 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
>
On Fri, 2017-04-28 at 10:01 +0200, Linus Walleij wrote:
> On Wed, Apr 26, 2017 at 11:25 AM, <sean.w...@mediatek.com> wrote:
>
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > mt7623 pinctrl driver can be compatible with mt2701 one,
> > so the
On Fri, 2017-04-28 at 15:30 -0500, Rob Herring wrote:
> On Wed, Apr 26, 2017 at 05:26:09PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > There are 2 versions of the SoC. MT7623N is almost identical to MT7623A
> > b
On Fri, 2017-04-28 at 15:37 -0500, Rob Herring wrote:
> On Wed, Apr 26, 2017 at 05:26:13PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Banana Pi team in Sinovoip Co., Limited which are dedicated to
> > design and
Hi, Masahiro
For maintainability, I felt it's better if we use the same way to
register nvmem as that most drivers does under nvmem usually using
static structure. Otherwise, they should also be changed to use the
one-time data in stack to avoid extra bytes to keep them.
Sean
On Mon,
Hi, Masahiro
On Thu, 2017-09-21 at 11:09 +0900, Masahiro Yamada wrote:
> Hi Sean,
>
>
> 2017-09-21 1:32 GMT+09:00 Sean Wang <sean.w...@mediatek.com>:
> > Hi, Masahiro
> >
> > For maintainability, I felt it's better if we use the same way to
> > regi
the base address into driver private data.
>
> Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
Acked-by: Sean Wang <sean.w...@mediatek.com>
> ---
>
> drivers/nvmem/mtk-efuse.c | 26 +-
> 1 file changed, 17 insertions(+),
On Mon, 2017-10-02 at 13:21 +0200, Arnd Bergmann wrote:
> On Tue, Sep 26, 2017 at 8:00 AM, Jean Delvare <jdelv...@suse.de> wrote:
> > On Thu, 21 Sep 2017 17:01:05 +0800, sean.w...@mediatek.com wrote:
> >> From: Sean Wang <sean.w...@mediatek.com>
> >>
>
On Tue, 2017-10-10 at 20:00 +0200, Matthias Brugger wrote:
>
> On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > pwrap initialization is highly associated with the base SoC, so
> > update here for allow
On Fri, 2017-10-13 at 16:07 +0200, Matthias Brugger wrote:
>
> On 10/13/2017 11:41 AM, Sean Wang wrote:
> > On Tue, 2017-10-10 at 20:00 +0200, Matthias Brugger wrote:
> >>
> >> On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote:
> >>> From: Sean Wang
On Thu, 2017-10-05 at 10:52 +0200, Jean Delvare wrote:
> Hi Sean,
>
> On Thu, 5 Oct 2017 11:17:49 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
Hi Alexandre,
Thanks for your valuable suggestions on the driver.
I added comments inline and will have following-ups in the next version
Sean
On Thu, 2017-10-12 at 23:20 +0200, Alexandre Belloni wrote:
> Hi,
>
> On 22/09/2017 at 11:33:15 +0800, sean.w...@mediatek.com wrote:
> > diff
work on MT7622.
> >
> > Signed-off-by: Chenglin Xu <chenglin...@mediatek.com>
> > Signed-off-by: Chen Zhong <chen.zh...@mediatek.com>
> > Signed-off-by: Sean Wang <sean.w...@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-
On Mon, 2017-10-16 at 16:17 +0800, Sean Wang wrote:
> Hi Alexandre,
>
> Thanks for your valuable suggestions on the driver.
>
> I added comments inline and will have following-ups in the next version
>
> Sean
>
> On Thu, 2017-10-12 at 23:20 +0200, Alex
On Tue, 2017-09-26 at 07:55 +0200, Jean Delvare wrote:
> On Thu, 21 Sep 2017 16:46:35 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
> > the inde
On Sun, 2017-08-27 at 22:00 +0300, Matthias Brugger wrote:
>
> On 08/19/2017 09:06 PM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Document the devicetree bindings in 8250.txt for MediaTek BTIF
> > controller which cou
On Tue, 2017-10-10 at 12:02 +0200, Matthias Brugger wrote:
>
> On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
> > and also add ex
On Tue, 2017-10-10 at 11:38 +0200, Matthias Brugger wrote:
>
> On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Some regulators such as MediaTek MT6380 also has to be written in
> > 32-bit mode. So the
On Wed, 2017-10-18 at 21:32 +0800, Yingjoe Chen wrote:
> On Tue, 2017-10-17 at 17:40 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add device-tree binding for MediaTek SoC based RTC
> >
> > Cc: devicet...@vger.
Hi, both
On Wed, 2017-10-18 at 14:57 +0200, Alexandre Belloni wrote:
> On 18/10/2017 at 19:12:06 +0800, Yingjoe Chen wrote:
> > On Tue, 2017-10-17 at 17:40 +0800, sean.w...@mediatek.com wrote:
> > > From: Sean Wang <sean.w...@mediatek.com>
> > >
> > > Th
On Wed, 2017-10-18 at 17:52 +0800, Yingjoe Chen wrote:
> On Tue, 2017-10-17 at 17:40 +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > This patch introduces the driver for the RTC on MT7622 SoC.
> >
> > Signed-of
On Thu, 2017-10-19 at 11:02 +0200, Alexandre Belloni wrote:
> On 19/10/2017 at 10:55:49 +0800, Sean Wang wrote:
> > Hi, both
> >
> > On Wed, 2017-10-18 at 14:57 +0200, Alexandre Belloni wrote:
> > > On 18/10/2017 at 19:12:06 +0800, Yingjoe Chen wrote:
> > &
nodes in dts with mt7623 to
use mt2701-mmc fallbacks instead of mt8135-mmc ones.
Tested-by: Sean Wang <sean.w...@mediatek.com>
[1] http://forum.banana-pi.org/c/Banana-Pi-BPI-R2
On Mon, 2017-10-16 at 09:46 +0800, Chaotian Jing wrote:
> mt2701/mt2712 has 12bit clock div, which is not c
On Tue, 2017-11-28 at 09:20 -0600, Rob Herring wrote:
> On Tue, Nov 28, 2017 at 11:49:59AM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add devicetree bindings for MediaTek MT7622 pinctrl driver.
> >
>
On Thu, 2017-11-30 at 20:06 -0600, Rob Herring wrote:
> On Wed, Nov 29, 2017 at 06:10:35PM +0800, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add the devicetree binding for MT7623 SoC using MT2701 as the fallback.
> >
&
Hi, Zhi
The patch have already got merged in 4.15 rc1 as
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=424268c7494c2ae24c95565b9047bbf30309e88a
Sean
On Mon, 2017-11-13 at 20:39 +0800, Zhi Mao wrote:
> Hi Thierry,
>
> Just have a ping for this patch.
>
On Thu, 2017-12-14 at 12:16 +0100, Matthias Brugger wrote:
> Hi Ulf,
>
> On 12/07/2017 07:43 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang <sean.w...@mediatek.com>
> >
> > Add the devicetree binding for MT7623 SoC using MT2701 as the fallback.
> &
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