On 19.07.2016 23:17, Bjorn Helgaas wrote:
On Thu, Jun 02, 2016 at 10:41:00AM +0200, Tomasz Nowicki wrote:
This series bases on pending ACPI PCI support for ARM64:
https://lkml.org/lkml/2016/5/30/468
Quirk handling relies on an idea of matching MCFG OEM ID and OEM revision
(the ones from
On 19.09.2016 17:45, Bjorn Helgaas wrote:
On Fri, Sep 09, 2016 at 09:24:06PM +0200, Tomasz Nowicki wrote:
ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
compliant with ECAM standard. It uses non-standard configuration space
accessors (see pci_thunder_pem_ops) and
On 19.09.2016 20:09, Bjorn Helgaas wrote:
On Fri, Sep 09, 2016 at 09:24:05PM +0200, Tomasz Nowicki wrote:
thunder-pem driver stands for being ACPI based PCI host controller.
However, there is no standard way to describe its PEM-specific register
ranges in ACPI tables. Thus we add
On 20.09.2016 15:08, Bjorn Helgaas wrote:
On Tue, Sep 20, 2016 at 09:06:23AM +0200, Tomasz Nowicki wrote:
On 19.09.2016 17:45, Bjorn Helgaas wrote:
On Fri, Sep 09, 2016 at 09:24:06PM +0200, Tomasz Nowicki wrote:
ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
On 06/15/2016 01:04 PM, Lorenzo Pieralisi wrote:
On Mon, Jun 13, 2016 at 04:41:07PM +0200, Tomasz Nowicki wrote:
IORT shows representation of IO topology for ARM based systems.
It describes how various components are connected together on
parent-child basis e.g. PCI RC -> SMMU -> ITS. Al
ng
- code style improvements
v2 -> v3
- rebased on top of 4.4
- fixes and improvements for redistributor init via GICC structures
- fixes as per kbuild reports
v1 -> v2
- rebased on top of 4.4-rc4
- use pci_msi_domain_get_msi_rid for requester ID to device ID translation
Tomasz Nowicki (8):
ACPI
for finding PCI device domain and its RID translation
(pci_msi_domain_get_msi_rid and pci_msi_domain_get_msi_rid calls).
Signed-off-by: Tomasz Nowicki
Acked-by: Marc Zyngier
---
drivers/pci/msi.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/msi.c b
final translation
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/Kconfig | 3 +
drivers/acpi/Makefile | 1 +
drivers/acpi/bus.c| 2 +
drivers/acpi/iort.c | 220 ++
include/linux/iort.h | 30 +++
5 files changed, 256 insertions(+)
initialization to separate function.
Signed-off-by: Tomasz Nowicki
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3-its.c | 57
1 file changed, 34 insertions(+), 23 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
corresponding
IRQ domain.
Since IORT is prepared to describe MSI domain on a per-device basis,
use existing IORT helpers and implement two calls:
1. iort_msi_map_rid() to map MSI RID for a device
2. iort_get_device_domain() to find domain token for a device
Signed-off-by: Tomasz Nowicki
---
drivers/acpi
: Tomasz Nowicki
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 44
1 file changed, 44 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
index d2c2496..ae7221c 100644
--- a/drivers
.
Signed-off-by: Tomasz Nowicki
Acked-by: Marc Zyngier
---
drivers/irqchip/Kconfig | 1 +
drivers/irqchip/irq-gic-v3-its.c | 59 +++-
2 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index
al
variable and drop the parameter from its_probe_one. Users can refer to it
in more convenient way then.
Signed-off-by: Hanjun Guo
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its.c | 65 ++
drivers/irqchip/irq-gic-v3.c | 7 ++--
include/li
Firmware agnostic code lands in common functions which do necessary
domain initialization based on unique domain handler. DT specific
code goes to DT specific init call.
Signed-off-by: Tomasz Nowicki
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 44
Hi Bjorn,
On 21.09.2016 21:18, Bjorn Helgaas wrote:
On Wed, Sep 21, 2016 at 11:58:22AM -0700, Duc Dang wrote:
On Wed, Sep 21, 2016 at 11:04 AM, Bjorn Helgaas wrote:
On Wed, Sep 21, 2016 at 03:05:49PM +0100, Lorenzo Pieralisi wrote:
The existing x86 practice is to use PNP0C02 devices for th
On 05.09.2016 04:25, Bjorn Helgaas wrote:
On Mon, Aug 08, 2016 at 03:05:39PM +0200, Tomasz Nowicki wrote:
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite accessors
set. Algorithm traverses available quirk list
On 05.09.2016 04:34, Bjorn Helgaas wrote:
On Mon, Aug 08, 2016 at 03:05:41PM +0200, Tomasz Nowicki wrote:
Add infrastructure to support ThunderX PEM specific PCI configuration space
access for ACPI based PCI host controller. This involves:
1. New initialization call thunder_pem_cfg_init() to
On 05.09.2016 04:22, Bjorn Helgaas wrote:
On Mon, Aug 08, 2016 at 03:05:38PM +0200, Tomasz Nowicki wrote:
pci_acpi_setup_ecam_mapping() is not really ARM64 specific so move it out
of arch/arm64/ directory. In preparation for adding MCFG quirk handling
extend pci_acpi_setup_ecam_mapping
On 06.09.2016 13:29, Rafael J. Wysocki wrote:
On Tue, Sep 6, 2016 at 12:22 PM, Tomasz Nowicki wrote:
Hi Thomas,
On 06.09.2016 11:50, Thomas Gleixner wrote:
On Tue, 6 Sep 2016, Tomasz Nowicki wrote:
-static int __init its_pci_msi_init(void)
+static int __init its_pci_msi_init_one(struct
, Tomasz Nowicki wrote:
On 06.09.2016 12:20, Thomas Gleixner wrote:
On Tue, 6 Sep 2016, Tomasz Nowicki wrote:
+/**
+ * iort_get_device_domain() - Find MSI domain related to a device
+ * @dev: The device.
+ * @req_id: Requester ID for the device.
+ *
+ * Returns: the MSI domain for this device, NULL
tables support
in this place e.g. GTDT table.
Signed-off-by: Tomasz Nowicki
Reviewed-by: Hanjun Guo
Reviewed-by: Lorenzo Pieralisi
---
drivers/acpi/Kconfig| 4 +
drivers/acpi/Makefile | 2 +
drivers/acpi/arm64/Kconfig | 6 ++
drivers/acpi/arm64/Makefile | 1 +
drivers/acpi
corresponding
IRQ domain.
Since IORT is prepared to describe MSI domain on a per-device basis,
use existing IORT helpers and implement two calls:
1. iort_msi_map_rid() to map MSI RID for a device
2. iort_get_device_domain() to find domain token for a device
Signed-off-by: Tomasz Nowicki
Reviewed-by: Hanjun
On 07.09.2016 13:58, Tomasz Nowicki wrote:
For ITS, MSI functionality consists on building domain stack and
during that process we need to reference to domain stack components
e.g. before we create new DOMAIN_BUS_PCI_MSI domain we need to specify
its DOMAIN_BUS_NEXUS parent domain. In order to
On 02.09.2016 13:52, Fu Wei wrote:
> Hi Tomasz,
>
> On 11 August 2016 at 18:06, Tomasz Nowicki wrote:
>> IORT shows representation of IO topology for ARM based systems.
>> It describes how various components are connected together on
>> parent-child basis e.g. PCI RC -&
On 13.09.2016 00:47, Duc Dang wrote:
On Mon, Sep 12, 2016 at 3:24 PM, Duc Dang wrote:
On Fri, Sep 9, 2016 at 12:24 PM, Tomasz Nowicki wrote:
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite CFG accessors
Hi Liu,
On 13.09.2016 04:36, Dongdong Liu wrote:
Hi Tomasz
在 2016/9/10 3:24, Tomasz Nowicki 写道:
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite CFG
accessors
set and configuration space range.
In first
On 13.09.2016 00:24, Duc Dang wrote:
On Fri, Sep 9, 2016 at 12:24 PM, Tomasz Nowicki wrote:
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite CFG accessors
set and configuration space range.
In first place
will be used for platforms free from quirks.
Signed-off-by: Tomasz Nowicki
Signed-off-by: Dongdong Liu
Signed-off-by: Christopher Covington
---
drivers/pci/host/Makefile | 1 +
drivers/pci/host/mcfg-quirks.c | 86 ++
drivers/pci/host/mcfg-quirks.h
pci_config_window,
instead of just a pointer.
Signed-off-by: Tomasz Nowicki
To: Jayachandran C
---
arch/arm64/kernel/pci.c | 2 +-
drivers/pci/ecam.c | 6 +++---
include/linux/pci-ecam.h | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel
obtain hardcoded addresses for
PEM specific register ranges
3. New quirk entry (for common quirk array) which identifies platform and
calls thunder_pem_cfg_init() from [1]
Signed-off-by: Tomasz Nowicki
---
drivers/pci/host/mcfg-quirks.c | 7 +++
drivers/pci/host/mcfg-quirks.h | 4
host controller we still use pci_generic_ecam_ops.
Signed-off-by: Tomasz Nowicki
---
arch/arm64/kernel/pci.c | 41 ++---
drivers/acpi/pci_mcfg.c | 40
include/linux/pci-acpi.h | 3 +++
3 files changed, 45 insertions(+
config accessors.
Signed-off-by: Tomasz Nowicki
---
arch/arm64/kernel/pci.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index 2e7bed4..aa734bd 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -139,8
last patch presents quirk handling mechanism usage for
ThunderX PEM driver.
v4 -> v5
- rebase against v4.8-rc1
- rework to exact MCFG OEM ID, TABLE ID, rev match
- use memcmp instead of strncmp
- no substring match
- fix typos and dmesg message
Tomasz Nowicki (5):
PCI: Embed pci_ecam_ops
On 08.08.2016 17:34, Mark Salter wrote:
On Mon, 2016-08-08 at 15:05 +0200, Tomasz Nowicki wrote:
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite accessors
set. Algorithm traverses available quirk list (static
Hi Jeremy,
I did second round of review and have some more comments, please see below:
On 12.10.2017 21:48, Jeremy Linton wrote:
ACPI 6.2 adds a new table, which describes how processing units
are related to each other in tree like fashion. Caches are
also sprinkled throughout the tree and desc
Hi John,
On 19.10.2017 12:25, John Garry wrote:
On 19/10/2017 06:18, Tomasz Nowicki wrote:
Summary:
I'm not at all happy with this specification's attempt to leave out
pieces of information which make parsing things more deterministic. In
this case I'm happy to demote the mes
Hi,
On 17.10.2017 17:22, Jeremy Linton wrote:
Hi,
On 10/17/2017 08:25 AM, Tomasz Nowicki wrote:
Hi Jeremy,
I did second round of review and have some more comments, please see
below:
On 12.10.2017 21:48, Jeremy Linton wrote:
ACPI 6.2 adds a new table, which describes how processing units
On 18.10.2017 07:39, Tomasz Nowicki wrote:
Hi,
On 17.10.2017 17:22, Jeremy Linton wrote:
Hi,
On 10/17/2017 08:25 AM, Tomasz Nowicki wrote:
Hi Jeremy,
I did second round of review and have some more comments, please see
below:
On 12.10.2017 21:48, Jeremy Linton wrote:
ACPI 6.2 adds a new
On 18.10.2017 19:30, Jeremy Linton wrote:
On 10/18/2017 05:24 AM, Tomasz Nowicki wrote:
On 18.10.2017 07:39, Tomasz Nowicki wrote:
Hi,
On 17.10.2017 17:22, Jeremy Linton wrote:
Hi,
On 10/17/2017 08:25 AM, Tomasz Nowicki wrote:
Hi Jeremy,
I did second round of review and have some more
On 08.06.2015 17:14, Lorenzo Pieralisi wrote:
On Mon, Jun 08, 2015 at 03:57:38AM +0100, Hanjun Guo wrote:
[...]
Why can't we make use of the ECAM implementation used by
pci-host-generic
and drivers/pci/access.c?
We had that question when I had posted MMCFG patch set separately,
please see:
h
On 26.05.2015 14:49, Hanjun Guo wrote:
From: Tomasz Nowicki
- fix typo
- improve explanation
- add reference to the related document
Signed-off-by: Tomasz Nowicki
Signed-off-by: Hanjun Guo
Tested-by: Suravee Suthikulpanit
---
arch/x86/include/asm/pci_x86.h | 9 ++---
1 file changed
On 26.08.2015 19:49, Lukasz Anaczkowski wrote:
v3:
() Fixed entries counting
() Added missing acpi_table_parse_entries definition
() acpi_parse_entries() now returns sum of all matching
entries
v2: Fixed ARM64 syntax error
From the ACPI spec:
"Logical processors with API
On 01.09.2015 14:07, Anaczkowski, Lukasz wrote:
From: Tomasz Nowicki [mailto:tomasz.nowi...@linaro.org]
Sent: Tuesday, September 1, 2015 10:03 AM
To fix this, each LAPIC/X2APIC entry from MADT table needs to be
handled at the same time when processing it, thus adding
acpi_subtable_proc
Hi Marc,
On 13.10.2015 13:51, Marc Zyngier wrote:
Since we now have a generic data structure to express an
interrupt specifier, convert all hierarchical irqchips that
are OF based to use a fwnode_handle as part of their alloc
and xlate (which becomes translate) callbacks.
As most of these drive
On 14.10.2015 17:31, Marc Zyngier wrote:
On 14/10/15 16:26, Tomasz Nowicki wrote:
Hi Marc,
On 13.10.2015 13:51, Marc Zyngier wrote:
Since we now have a generic data structure to express an
interrupt specifier, convert all hierarchical irqchips that
are OF based to use a fwnode_handle as part
eries:
Acked-by: Tomasz Nowicki
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On 31.08.2015 13:01, Tomasz Nowicki wrote:
On 08.06.2015 17:14, Lorenzo Pieralisi wrote:
On Mon, Jun 08, 2015 at 03:57:38AM +0100, Hanjun Guo wrote:
[...]
Why can't we make use of the ECAM implementation used by
pci-host-generic
and drivers/pci/access.c?
We had that question when
On 07.09.2015 08:58, Tomasz Nowicki wrote:
Hi Marc,
On 04.09.2015 19:06, Marc Zyngier wrote:
IRQ controllers and timers are the two types of device the kernel
requires before being able to use the device driver model.
ACPI so far lacks a proper probing infrastructure similar to the one
we
On 07.09.2015 16:04, Anaczkowski, Lukasz wrote:
From: Tomasz Nowicki [mailto:tomasz.nowi...@linaro.org]
Sent: Tuesday, September 1, 2015 3:37 PM
On 01.09.2015 14:07, Anaczkowski, Lukasz wrote:
From: Tomasz Nowicki [mailto:tomasz.nowi...@linaro.org]
Sent: Tuesday, September 1, 2015 10:03 AM
Hi Lorenzo,
On 08.09.2015 17:07, Lorenzo Pieralisi wrote:
Hi Tomasz,
On Mon, Sep 07, 2015 at 10:59:44AM +0100, Tomasz Nowicki wrote:
On 31.08.2015 13:01, Tomasz Nowicki wrote:
On 08.06.2015 17:14, Lorenzo Pieralisi wrote:
On Mon, Jun 08, 2015 at 03:57:38AM +0100, Hanjun Guo wrote
Hi Suravee,
On 15.10.2015 01:25, Suravee Suthikulpanit wrote:
This patch introduces gicv2m_acpi_init(), which uses information
in MADT GIC MSI frames structure to initialize GICv2m driver.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Hanjun Guo
---
drivers/irqchip/irq-gic-v2m.c | 9
On 15.10.2015 08:15, Tomasz Nowicki wrote:
Hi Suravee,
[...]
Moreover, seems we need to add irq_domain_free_fwnode to gicv2m_teardown():
static void gicv2m_teardown(void)
{
struct v2m_data *v2m, *tmp;
list_for_each_entry_safe(v2m, tmp, &v2m_nodes, entry) {
+st
From: Hanjun Guo
The gic_root_node defined in ITS driver is not actually
used, and the ITS driver seems will not use it in the
future, so just remove it.
Signed-off-by: Hanjun Guo
---
drivers/irqchip/irq-gic-v3-its.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/irqchip/irq-gic
://git.linaro.org/leg/acpi/acpi.git pci-acpi-upstream
This has been tested on Cavium ThunderX 1 socket board.
Hanjun Guo (1):
irqchip / GICv3: remove gic root node in ITS
Tomasz Nowicki (9):
irqchip / GICv3: Refactor gic_of_init() for GICv3 driver
irqchip / GICv3: Add ACPI support for GICv3
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/Kconfig| 3 +
drivers/acpi/Makefile | 1 +
drivers/acpi/iort.c | 326
drivers/irqchip/Kconfig | 1 +
include/linux/iort.h| 38 ++
5 files changed, 369 insertions(+)
creat
later patches.
Signed-off-by: Tomasz Nowicki
Signed-off-by: Hanjun Guo
---
drivers/irqchip/irq-gic-v3-its.c | 56 +++-
1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index
ed in the following patches.
Signed-off-by: Tomasz Nowicki
Signed-off-by: Hanjun Guo
---
drivers/irqchip/irq-gic-v3.c | 142 +++
1 file changed, 142 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index e146e20..0d
Isolate hardware abstraction (FDT) code to gic_of_init().
Rest of the logic goes to gic_init_bases() and expects well
defined data to initialize GIC properly. The same solution
is used for GICv2 driver.
This is needed for ACPI initialization later.
Signed-off-by: Tomasz Nowicki
Signed-off-by
there which
belong to __init section as well.
Signed-off-by: Hanjun Guo
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 9640e4d
Firmware agnostic code lands in separate function which do necessary
domain initialization based on unequal domain handler.
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 43 +---
1 file changed, 28 insertions(+), 15 deletions(-)
diff
After refactoring DT code, we let ACPI to build ITS PCI MSI domain
and do requester ID to device ID translation using IORT table.
We have now full PCI MSI domain stack, thus we can enable ITS initialization
from GICv3 core driver for ACPI scenario.
Signed-off-by: Tomasz Nowicki
---
drivers
Signed-off-by: Hanjun Guo
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3-its.c | 78 +++---
drivers/irqchip/irq-gic-v3.c | 6 +--
include/linux/irqchip/arm-gic-v3.h | 2 +-
3 files changed, 50 insertions(+), 36 deletions(-)
diff --git a
it with GICR base address in GICC
structures in that case.
Signed-off-by: Hanjun Guo
Signed-off-by: Tomasz Nowicki
---
drivers/irqchip/irq-gic-v3.c | 98
1 file changed, 89 insertions(+), 9 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b
On 15.10.2015 15:22, Lorenzo Pieralisi wrote:
On Mon, Sep 14, 2015 at 03:55:50PM +0100, Tomasz Nowicki wrote:
[...]
Well, I still have not figured out whether on arm64 the raw accessors
required by ACPICA make sense.
So either arm64 relies on the generic MCFG based raw read and writes
or we
On 10/15/2015 06:26 PM, Marc Zyngier wrote:
On 15/10/15 15:34, Tomasz Nowicki wrote:
Of course your help in testing is welcomed. Also please have a look at
my GICv3/ITS patches, they are important for ACPI PCI.
Where is the dependency? ACPI/PCI should really be standalone.
There are no
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill duplicated arch specific code for IA64 and x86. It may
also help ARM64 in future.
Reviewed-by: Lorenzo Pie
On 21.10.2015 13:02, Liviu Dudau wrote:
On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface acpi_pci_root_create() and related data
structures to create PCI root bus for ACPI PCI host bridges. It will
be used to kill
On 21.10.2015 13:42, Lorenzo Pieralisi wrote:
On Wed, Oct 21, 2015 at 01:27:33PM +0200, Tomasz Nowicki wrote:
On 21.10.2015 13:02, Liviu Dudau wrote:
On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
On 14.10.2015 08:29, Jiang Liu wrote:
Introduce common interface
On 10/24/2015 12:20 PM, Hanjun Guo wrote:
On 2015/10/15 22:05, Tomasz Nowicki wrote:
After refactoring DT code, we let ACPI to build ITS PCI MSI domain
and do requester ID to device ID translation using IORT table.
We have now full PCI MSI domain stack, thus we can enable ITS initialization
W dniu 09.12.2014 o 22:50, Bjorn Helgaas pisze:
On Mon, Dec 8, 2014 at 12:13 AM, Tomasz Nowicki
wrote:
What would be next steps regarding this patch set? I am not sure we have
reached a consensus on weak vs #ifdef choice.
I work through the list at
https://patchwork.ozlabs.org/project/linux
W dniu 03.12.2014 o 22:22, Luck, Tony pisze:
From: "Chen, Gong"
Some BIOSes utilize PCI MMCFG space read/write opertion to trigger
specific errors. EINJ will report errors as below when hitting such
cases:
APEI: Can not request [mem 0x83f990a0-0x83f990a3] for APEI EINJ Trigger
registers
It i
W dniu 24.11.2014 o 11:41, Arnd Bergmann pisze:
On Friday 21 November 2014 11:08:25 Bjorn Helgaas wrote:
On Fri, Nov 21, 2014 at 01:24:52PM +0100, Arnd Bergmann wrote:
On Thursday 20 November 2014 21:00:17 Myron Stowe wrote:
On Thu, Nov 20, 2014 at 3:26 PM, Bjorn Helgaas wrote:
That's inte
Hi Bjorn,
Any comments before I post next version ?
Regards,
Tomasz
On 11.03.2015 15:12, Tomasz Nowicki wrote:
MCFG ACPI table and PCI ECAM standard have no arch dependencies so it can be
used across all architectures. Currently MMCONFIG related code resides in
arch/x86 directories. This
MCFG can be used perfectly for all architectures which support ACPI.
ACPI mandates MCFG to describe PCI config space ranges which means
we should use MMCONFIG accessors by default.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/mcfg.c | 20
1 file changed, 20 insertions
- fix typo
- improve explanation
- add reference to the related document
Signed-off-by: Tomasz Nowicki
---
arch/x86/include/asm/pci_x86.h | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index fa1195d
-by: Tomasz Nowicki
---
arch/x86/pci/acpi.c| 2 +-
arch/x86/pci/mmconfig-shared.c | 72 +-
arch/x86/pci/mmconfig_32.c | 16 ++--
arch/x86/pci/numachip.c| 4 +-
drivers/acpi/mcfg.c| 20 ++---
drivers/pci/ecam.c |
resource list
- map regions
- add regions to iomem_resource
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/mcfg.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/acpi/mcfg.c b/drivers/acpi/mcfg.c
index a9338df9..787defe 100644
--- a/drivers/acpi/mcfg.c
+++ b
pci.c and arch/x86/pci/numachip.c
- rework Kconfig logic
v2 -> v3 changes:
- rebase patch set v2 to v4.0-rc1
v1 -> v2 changes:
- use generic readb/readw etc. accessors instead of AMD Fam10h workaround
- separate ACPI and ECAM code
- improve ECAM code naming
Tomasz Nowicki (9):
x86, pci: C
Host which want to take advantage of ECAM generic goodness
should select CONFIG_PCI_ECAM_GENERIC. Otherwise, machines like 32bits x86,
are obligated to provide own low-level ECAM calls.
Signed-off-by: Tomasz Nowicki
---
arch/x86/Kconfig | 1 +
arch/x86/pci/Makefile | 4
used nowhere.
At the same time, we need pci_parse_mcfg been global so acpi_parse_mcfg
can be used perfectly here.
Signed-off-by: Tomasz Nowicki
---
arch/x86/Kconfig | 3 +
arch/x86/include/asm/pci_x86.h | 33 -
arch/x86/pci/acpi.c| 1 +
arch/x86/pci/mmconfig
to mmconfig_shared.c so it becomes common for both and
mmconfig_64.c turns out to be purely arch agnostic.
Signed-off-by: Tomasz Nowicki
---
arch/x86/pci/mmconfig-shared.c | 10 --
arch/x86/pci/mmconfig_32.c | 10 ++
arch/x86/pci/mmconfig_64.c | 11 ++-
include
on to iomem_resource has its own lock, no need to wrap it into mutex
4. insertion to mmconfig list can be done as the final step in separate
function (candidate for further refactoring) and needs another mmconfig
lookup to avoid race condition.
Signed-off-by: Tomasz Nowicki
---
arch/x86/pci/mmc
>From now on, readb()/writeb()/etc. generic calls are used as default
approach. Special MMIO accessors are registered for AMD Fam10h CPUs only.
Signed-off-by: Tomasz Nowicki
---
arch/x86/include/asm/pci_x86.h | 8 +++
arch/x86/pci/mmconfig-shared.c |
On 26.05.2015 19:08, Will Deacon wrote:
On Tue, May 26, 2015 at 01:49:18PM +0100, Hanjun Guo wrote:
From: Tomasz Nowicki
ECAM standard and MCFG table are architecture independent and it makes
sense to share common code across all architectures. Both are going to
corresponding files - ecam.c
On 18.02.2014 16:26, Rafael J. Wysocki wrote:
On Tuesday, February 18, 2014 11:21:39 AM Tomasz Nowicki wrote:
On 18.02.2014 02:02, Rafael J. Wysocki wrote:
On Monday, February 10, 2014 02:00:11 PM Tomasz Nowicki wrote:
Whenever we register ISA interrupt or not, we need to free the IRQ routing
On 15.02.2014 02:05, Rafael J. Wysocki wrote:
On Monday, February 10, 2014 02:00:10 PM Tomasz Nowicki wrote:
This commit enables ISA-specific code if and only if CONFIG_{E}ISA is set
in the kernel configuration so that we do not have to maintain
acpi_isa_irq_to_gsi() function for
This commit moves ISA-specific code to separate function and makes that
function depend on CONFIG_{E}ISA so that we do not have to maintain
acpi_isa_irq_to_gsi() function for architectures which do not support ISA.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/pci_irq.c | 35
On 19.02.2014 17:11, Rafael J. Wysocki wrote:
On Wednesday, February 19, 2014 11:35:22 AM Tomasz Nowicki wrote:
This commit moves ISA-specific code to separate function and makes that
function depend on CONFIG_{E}ISA so that we do not have to maintain
acpi_isa_irq_to_gsi() function for
This commit moves ISA-specific code to separate function and makes that
function depend on CONFIG_{E}ISA so that we do not have to maintain
acpi_isa_irq_to_gsi() function for architectures which do not support ISA.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/pci_irq.c | 36
Hi Lorenzo,
W dniu 22.01.2014 12:54, Lorenzo Pieralisi pisze:
On Fri, Jan 17, 2014 at 12:24:58PM +, Hanjun Guo wrote:
[...]
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index bd9bbd0..2210353 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -
Hi Lorenzo,
W dniu 24.01.2014 13:53, Lorenzo Pieralisi pisze:
Hi Hanjun,
On Fri, Jan 24, 2014 at 09:09:40AM +, Hanjun Guo wrote:
On 2014?01?23? 23:56, Tomasz Nowicki wrote:
Hi Lorenzo,
W dniu 22.01.2014 12:54, Lorenzo Pieralisi pisze:
On Fri, Jan 17, 2014 at 12:24:58PM +, Hanjun
On 15.09.2014 18:42, Catalin Marinas wrote:
On Mon, Sep 15, 2014 at 05:16:21PM +0100, Jon Masters wrote:
On 09/15/2014 11:01 AM, Catalin Marinas wrote:
On Fri, Sep 12, 2014 at 03:00:12PM +0100, Hanjun Guo wrote:
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index 5b3546b..98
On 01/17/14 15:15, Arnd Bergmann wrote:
On Friday 17 January 2014, Hanjun Guo wrote:
+/* Parked Address in ACPI GIC structure */
+static u64 parked_address[NR_CPUS];
Please use the per_cpu infrastructure rather than NR_CPUS long arrays.
Actually, per_cpu areas are initialized a bit later. If w
On 18.02.2014 02:02, Rafael J. Wysocki wrote:
On Monday, February 10, 2014 02:00:11 PM Tomasz Nowicki wrote:
Whenever we register ISA interrupt or not, we need to free the IRQ routing
table entry.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/pci_irq.c |1 +
1 file changed, 1
On 13.05.2014 22:11, Borislav Petkov wrote:
On Wed, Apr 09, 2014 at 05:14:34PM +0200, Tomasz Nowicki wrote:
Till now __flush_tlb_one was used for unmapping virtual memory which
is x86 specific function. Replace it with more generic
flush_tlb_kernel_range.
Signed-off-by: Tomasz Nowicki
On 14.05.2014 14:48, Will Deacon wrote:
On Wed, May 14, 2014 at 01:45:07PM +0100, Catalin Marinas wrote:
On Wed, May 14, 2014 at 01:35:42PM +0100, Will Deacon wrote:
On Wed, May 14, 2014 at 01:32:27PM +0100, Tomasz Nowicki wrote:
On 13.05.2014 22:11, Borislav Petkov wrote:
On Wed, Apr 09
On 13.05.2014 20:13, Borislav Petkov wrote:
On Wed, Apr 09, 2014 at 05:14:30PM +0200, Tomasz Nowicki wrote:
Init/deinit of GHES error notifications are moved to corresponding
functions e.g. for SCI ghes_notify_init_sci{sci} and ghes_notify_remove_{sci}
which in turn are gathered to
Use CONFIG_ACPI_APEI_NMI to isolate NMI error notification path. NMI related
data and functions are grouped so they can be wrapped inside one
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/apei/ghes.c | 54 +-
1 file changed, 30 insertions(+), 24
Thanks to more generic way of init/deinit error notification, we can
register NMI related calls in runtime. It happens before walking through
GHES entries, so probe function will treat NMI as supported.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/apei/ghes.c | 21 -
1
Till now __flush_tlb_one was used for unmapping virtual memory which
is x86 specific function. Replace it with more generic
flush_tlb_kernel_range.
Signed-off-by: Tomasz Nowicki
---
drivers/acpi/apei/ghes.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi
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