Hi Stephen,
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM
On 08/23/2013 01:36 AM, Thierry Reding wrote:
On Thu, Aug 22, 2013 at 08:26:10AM +0200, Sascha Hauer wrote:
On Thu, Aug 22, 2013 at 02:55:42AM +, Xiubo Li-B47053 wrote:
Hi Tomasz
Hi Thierry,
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM
On Thu, Aug 22, 2013 at 08:26:10AM +0200, Sascha Hauer wrote:
On Thu, Aug 22, 2013 at 02:55:42AM +, Xiubo Li-B47053 wrote:
Hi Tomasz,
Thanks for your comments.
Could
Hi Thierry,
Subject: Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote:
Signed-off-by: Xiubo Li li.xi...@freescale.com
---
arch/arm/boot/dts/vf610.dtsi | 83
+++-
1 file
Hi Thierry,
Subject: Re: [PATCH 3/4] ARM: dts: Enables ftm pwm device for Vybrid
VF610 TOWER board.
On Wed, Aug 21, 2013 at 11:07:41AM +0800, Xiubo Li wrote:
Signed-off-by: Xiubo Li li.xi...@freescale.com
---
arch/arm/boot/dts/vf610-twr.dts | 17 +
1 file changed,
Hi Thierry,
See the comments below.
I think the correct capitalizations are: Freescale, FTM and PWM.
There are other occurrences in the rest of the driver that I haven't
explicitly pointed out.
Yes, that's much better.
+config PWM_FTM
Perhaps name this PWM_FSL_FTM to match the
Hi Stephen,
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM
On 08/25/2013 11:35 PM, Xiubo Li-B47053 wrote:
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
...
Why do you need to manipulate the pinctrl to en/disable a channel
Actually it should even be:
#define FTM_CSC(channel) \
(FTM_CSC_BASE + ((channel) * 8))
Well, yes, It should be, as Sascha has comment about this before, I have
already revise it.
Firstly, we should be clear that the fpc-clk is chip's work clock.
If so, after the
TO Sascha,
Thanks very much for your comments.
Subject: Re: [PATCH 1/4] pwm: add freescale ftm pwm driver support
On Wed, Aug 21, 2013 at 11:07:39AM +0800, Xiubo Li wrote:
+
+#define FTM_CSC_BASE0x0C
+#define FTM_CSC(_CHANNEL) \
+ (FTM_CSC_BASE + (_CHANNEL * 0x08))
I
TO Sascha,
Thanks very much for your quick reply.
+ fpc = to_fsl_chip(chip);
+
+ if (WARN_ON(!test_bit(PWMF_REQUESTED, pwm-flags)))
+ return -ESHUTDOWN;
+
+ statename = kasprintf(GFP_KERNEL, en%d, pwm-hwpwm);
+ pins_state =
Hi Tomasz,
Thanks for your comments.
+- #pwm-cells: Should be 3. Number of cells being used to specify PWM
property.
+ First cell specifies the per-chip channel index of the PWM
to use, the
+ second cell is the period in nanoseconds and bit 0 in
the third cell is
+ used to
Hi Sascha,
Could you explain meaning of this property more precisely? I'm
interested especially how is this related to the PWM IP block and
boards.
Yes.
There are 8 channels most. While the pinctrls of 4th and 5th channels
could be used by uart's Rx and Tx, then these 2 channels
Hi Tomasz,
If the meaning of flags cell is the same as in generic, default PWM
specifier format, then it should be noted here and generic PWM
binding documentation mentioned.
OK, How about the following ?
- #pwm-cells: Should be 3. See pwm.txt in this directory for a
Subject: Re: [PATCHv3 1/4] pwm: Add Freescale FTM PWM driver support
On Mon, Sep 09, 2013 at 02:20:09PM +0200, Thierry Reding wrote:
On Fri, Sep 06, 2013 at 04:08:24PM +0800, Xiubo Li wrote:
The FTM PWM device can be found on Vybrid VF610 Tower and Layerscape
LS-1 SoCs.
diff --git a/arch/arm/boot/dts/vf610.dtsi
b/arch/arm/boot/dts/vf610.dtsi index 67d929c..44787b5 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -140,6 +140,37 @@
clock-names = pit;
};
+
Subject: Re: [PATCHv3 1/4] pwm: Add Freescale FTM PWM driver support
On Fri, Sep 06, 2013 at 04:08:24PM +0800, Xiubo Li wrote:
The FTM PWM device can be found on Vybrid VF610 Tower and Layerscape
LS-1 SoCs.
+
+static int fsl_pwm_probe(struct platform_device *pdev) {
+ int ret = 0;
+- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be
+one of the
+ entries in clock-names.
So the IP block has 3 input clocks, and also a mux to select which one to
use? That sounds slightly unusual, but possible.
If there is really only 1 clock input to the IP block,
This adds the Document for Freescale FTM PWM driver under
Documentation/devicetree/bindings/pwm/.
Signed-off-by: Xiubo Li li.xi...@freescale.com
---
.../devicetree/bindings/pwm/pwm-fsl-ftm.txt| 34
++
1 file changed, 34 insertions(+)
create mode 100644
-...@vger.kernel.org; linux-
ker...@vger.kernel.org; devicet...@vger.kernel.org; linux-
d...@vger.kernel.org; Xiubo Li-B47053
Subject: Re: [PATCHv5 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM.
On Mon, Sep 30, 2013 at 02:13:31PM +0800, Xiubo Li wrote:
This adds the Document for Freescale
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM
Should have at least something w/regards to a commit message.
I have sent a V2 patch and have added it.
+ used to encode the polarity of PWM output. Set bit 0 of the third
+in PWM
+ specifier
Subject: Re: [PATCHv2 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM.
...
+
+pwm0: pwm@40038000 {
+ compatible = fsl,vf610-ftm-pwm;
+ reg = 0x40038000 0x1000;
+ #pwm-cells = 3;
+ clock-names = ftm0, ftm0_fix_sel,
+static void fsl_pwm_free(struct pwm_chip *chip, struct pwm_device
+*pwm) {
+ struct fsl_pwm_chip *fpc;
+ struct fsl_pwm_data *pwm_data;
+
+ fpc = to_fsl_chip(chip);
+
+ pwm_data = pwm_get_chip_data(pwm);
+ if (!pwm_data)
+ return;
THis check seems
Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
On Mon, Sep 02, 2013 at 03:33:37AM +, Xiubo Li-B47053 wrote:
+static void fsl_pwm_free(struct pwm_chip *chip, struct pwm_device
+*pwm) {
+ struct fsl_pwm_chip *fpc;
+ struct fsl_pwm_data
Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
Freescale FTM PWM
On 08/30/2013 01:19 PM, Kumar Gala wrote:
Should have at least something w/regards to a commit message.
On Aug 20, 2013, at 10:07 PM, Xiubo Li wrote:
Signed-off-by: Xiubo Li li.xi...@freescale.com
Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
On Tue, Sep 03, 2013 at 04:17:09AM +, Xiubo Li-B47053 wrote:
Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
You simply don't need the available field. You don't need to track
whether
TO Sascha,
Thanks very much for your comments.
> Subject: Re: [PATCH 1/4] pwm: add freescale ftm pwm driver support
>
> On Wed, Aug 21, 2013 at 11:07:39AM +0800, Xiubo Li wrote:
> > +
> > +#define FTM_CSC_BASE0x0C
> > +#define FTM_CSC(_CHANNEL) \
> > + (FTM_CSC_BASE + (_CHANNEL *
TO Sascha,
Thanks very much for your quick reply.
> > > > + fpc = to_fsl_chip(chip);
> > > > +
> > > > + if (WARN_ON(!test_bit(PWMF_REQUESTED, >flags)))
> > > > + return -ESHUTDOWN;
> > > > +
> > > > + statename = kasprintf(GFP_KERNEL, "en%d", pwm->hwpwm);
> > >
> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM
>
> Should have at least something w/regards to a commit message.
>
I have sent a V2 patch and have added it.
> > + used to encode the polarity of PWM output. Set bit 0 of the third
> > +in PWM
> > +
> Subject: Re: [PATCHv2 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM.
>
...
> > +
> > +pwm0: pwm@40038000 {
> > + compatible = "fsl,vf610-ftm-pwm";
> > + reg = <0x40038000 0x1000>;
> > + #pwm-cells = <3>;
> > + clock-names = "ftm0",
> > +static void fsl_pwm_free(struct pwm_chip *chip, struct pwm_device
> > +*pwm) {
> > + struct fsl_pwm_chip *fpc;
> > + struct fsl_pwm_data *pwm_data;
> > +
> > + fpc = to_fsl_chip(chip);
> > +
> > + pwm_data = pwm_get_chip_data(pwm);
> > + if (!pwm_data)
> > + return;
>
>
> > This adds the Document for Freescale FTM PWM driver under
> > Documentation/devicetree/bindings/pwm/.
> >
> > Signed-off-by: Xiubo Li
> > ---
> > .../devicetree/bindings/pwm/pwm-fsl-ftm.txt| 34
> ++
> > 1 file changed, 34 insertions(+)
> > create mode 100644
> >
> > +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be
> > +one of the
> > + entries in clock-names.
>
> So the IP block has 3 input clocks, and also a mux to select which one to
> use? That sounds slightly unusual, but possible.
>
> If there is really only 1 clock input to the
> Subject: Re: [PATCHv3 1/4] pwm: Add Freescale FTM PWM driver support
>
> On Mon, Sep 09, 2013 at 02:20:09PM +0200, Thierry Reding wrote:
> > On Fri, Sep 06, 2013 at 04:08:24PM +0800, Xiubo Li wrote:
> > > The FTM PWM device can be found on Vybrid VF610 Tower and Layerscape
> LS-1 SoCs.
> > >
>
> > diff --git a/arch/arm/boot/dts/vf610.dtsi
> > b/arch/arm/boot/dts/vf610.dtsi index 67d929c..44787b5 100644
> > --- a/arch/arm/boot/dts/vf610.dtsi
> > +++ b/arch/arm/boot/dts/vf610.dtsi
> > @@ -140,6 +140,37 @@
> > clock-names = "pit";
> > };
> >
> Subject: Re: [PATCHv3 1/4] pwm: Add Freescale FTM PWM driver support
>
> On Fri, Sep 06, 2013 at 04:08:24PM +0800, Xiubo Li wrote:
> > The FTM PWM device can be found on Vybrid VF610 Tower and Layerscape
> LS-1 SoCs.
> >
> > +
> > +static int fsl_pwm_probe(struct platform_device *pdev) {
> > +
sts.infradead.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; linux-
> d...@vger.kernel.org; Xiubo Li-B47053
> Subject: Re: [PATCHv5 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM.
>
> On Mon, Sep 30, 2013 at 02:13
> Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
>
> On Mon, Sep 02, 2013 at 03:33:37AM +0000, Xiubo Li-B47053 wrote:
> >
> > > > +static void fsl_pwm_free(struct pwm_chip *chip, struct pwm_device
> > > > +*pwm) {
&
> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM
>
> On 08/30/2013 01:19 PM, Kumar Gala wrote:
> > Should have at least something w/regards to a commit message.
> >
> > On Aug 20, 2013, at 10:07 PM, Xiubo Li wrote:
> >
> >> Signed-off-by: Xiubo Li
> >>
> Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
>
> On Tue, Sep 03, 2013 at 04:17:09AM +0000, Xiubo Li-B47053 wrote:
> > > Subject: Re: [PATCHv2 1/4] pwm: Add Freescale FTM PWM driver support
> > >
> > > You simply don't need the avai
Hi Tomasz,
Thanks for your comments.
> > +- #pwm-cells: Should be 3. Number of cells being used to specify PWM
> > property.
> > + First cell specifies the per-chip channel index of the PWM
> > to use, the
> > + second cell is the period in nanoseconds and bit 0 in
> > the third cell is
> > +
Hi Sascha,
> > > Could you explain meaning of this property more precisely? I'm
> > > interested especially how is this related to the PWM IP block and
> boards.
> > >
> >
> > Yes.
> > There are 8 channels most. While the pinctrls of 4th and 5th channels
> > could be used by uart's Rx and Tx,
Hi Tomasz,
> > > If the meaning of flags cell is the same as in generic, default PWM
> > > specifier format, then it should be noted here and generic PWM
> > > binding documentation mentioned.
> >
> > OK, How about the following ?
> > - #pwm-cells: Should be 3. See pwm.txt in this directory for
Hi Stephen,
> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM
>
> On 08/23/2013 01:36 AM, Thierry Reding wrote:
> > On Thu, Aug 22, 2013 at 08:26:10AM +0200, Sascha Hauer wrote:
> >> On Thu, Aug 22, 2013 at 02:55:42AM +
Hi Thierry,
> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM
>
> On Thu, Aug 22, 2013 at 08:26:10AM +0200, Sascha Hauer wrote:
> > On Thu, Aug 22, 2013 at 02:55:42AM +0000, Xiubo Li-B47053 wrote:
> > > Hi Tomasz,
> >
Hi Thierry,
> Subject: Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
>
> On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote:
> > Signed-off-by: Xiubo Li
> > ---
> > arch/arm/boot/dts/vf610.dtsi | 83
> > +++-
> > 1 file changed,
Hi Thierry,
> Subject: Re: [PATCH 3/4] ARM: dts: Enables ftm pwm device for Vybrid
> VF610 TOWER board.
>
> On Wed, Aug 21, 2013 at 11:07:41AM +0800, Xiubo Li wrote:
> > Signed-off-by: Xiubo Li
> > ---
> > arch/arm/boot/dts/vf610-twr.dts | 17 +
> > 1 file changed, 17
Hi Thierry,
See the comments below.
> I think the correct capitalizations are: "Freescale", "FTM" and "PWM".
> There are other occurrences in the rest of the driver that I haven't
> explicitly pointed out.
>
Yes, that's much better.
> > +config PWM_FTM
>
> Perhaps name this PWM_FSL_FTM to
Hi Stephen,
> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> Freescale FTM PWM
>
> On 08/25/2013 11:35 PM, Xiubo Li-B47053 wrote:
> >> Subject: Re: [PATCH 4/4] Documentation: Add device tree bindings for
> ...
> >>> Why do you need to
> Actually it should even be:
>
> #define FTM_CSC(channel) \
> (FTM_CSC_BASE + ((channel) * 8))
>
Well, yes, It should be, as Sascha has comment about this before, I have
already revise it.
> > Firstly, we should be clear that the fpc->clk is chip's work clock.
> > If so,
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