From: Li Wei <liwei...@huawei.com>
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros rep
From: Li Wei <liwei...@huawei.com>
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros rep
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
---
drivers/mmc/host/dw_mmc-k3.c | 311 +++
1 file changed, 311 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
---
drivers/mmc/host/dw_mmc-k3.c | 311 +++
1 file changed, 311 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
---
drivers/mmc/host/dw_mmc-k3.c | 314 +++
1 file changed, 314 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3
Add sd card support for hi3660 soc
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by
Add sd card support for hi3660 soc
Signed-off-by: Li Wei <liwei...@huawei.com>
Signed-off-by: Chen Jun <chenju...@huawei.com>
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use
From: Li Wei
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
From: Li Wei
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
---
drivers/mmc/host/dw_mmc-k3.c | 311 +++
1 file changed, 311 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
index
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
---
drivers/mmc/host/dw_mmc-k3.c | 314 +++
1 file changed, 314 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
index
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
---
drivers/mmc/host/dw_mmc-k3.c | 311 +++
1 file changed, 311 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
index
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
Major changes
Add sd card support for hi3660 soc
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
---
From: Liwei Song <liwei.s...@windriver.com>
Fix the following Calltrace:
[ 77.768221] WARNING: CPU: 5 PID: 645 at drivers/dma/dmaengine.c:1069
dma_async_device_unregister+0xe2/0xf0
[ 77.775058] dma_async_device_unregister called while 1 clients hold a
reference
[ 77.825048] CPU:
the u64_stats_init function to driver probe stage,
which before we get the status of seqcount and after the RX/TX ring
was finished init.
Signed-off-by: Liwei Song <liwei.s...@windriver.com>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
From: Liwei Song <liwei.s...@windriver.com>
This is a follow up to commit f712c71f7b2b ("ACPI, APEI: Fixup common
access width firmware bug") fix the following firmware bug:
[Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
This is due to an 8-bit access wi
On 07/21/2017 05:56 PM, Andy Shevchenko wrote:
> On Fri, Jul 21, 2017 at 12:41 PM, Song liwei <liwei.s...@windriver.com> wrote:
>
>> [Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
>>
>> This is due to an 8-bit access width is specifie
From: Liwei Song <liwei.s...@windriver.com>
This is a follow up to commit f712c71f7b2b ("ACPI, APEI: Fixup common
access width firmware bug") fix the following firmware bug:
[Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
This is due to an 8-bit access wi
Hi,all
Sorry to bother you, could you spare some time to help review patch v6 that I
sended. Would you please give us your opinion?
Thnak you very much.
-邮件原件-
发件人: liwei (CM)
发送时间: 2017年7月6日 15:03
收件人: 'Guodong Xu'; Jaehoon Chung
抄送: Ulf Hansson; adrian.hun...@intel.com; Shawn Lin
件人: liwei (CM)
抄送: Ulf Hansson; adrian.hun...@intel.com; Jaehoon Chung; Shawn Lin;
wsa+rene...@sang-engineering.com; hkallwe...@gmail.com;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
主题: Re: [PATCH v4] mmc: dw_mmc-k3: add sd support for hi3660
Hi, Li Wei
I have some minor comments
ogether with dts changes. It's now in linux-next [1]；need
this one more?
2. And added the minor comments.
Iwill fix them in patch v6.
Thank you very much.
-邮件原件-
发件人: Guodong Xu [mailto:guodong...@linaro.org]
发送时间: 2017年7月6日 14:45
收件人: Jaehoon Chung; liwei (CM)
抄送: Ulf Hansson; adri
Hi, Ulf
Thank you very much for your advice.
1. Version history is really great information, however it doesn't belong
inside the change log itsefl. Instead add "---" and a newline here, then put it
all below that.
【LiWei】OK，I will fix it;
2. We have an API, mmc_regulator_set_vqmmc()
On 07/31/2017 10:09 AM, Zheng, Lv wrote:
> Hi,
>
>> From: linux-acpi-ow...@vger.kernel.org
>> [mailto:linux-acpi-ow...@vger.kernel.org] On Behalf Of Song
>> liwei
>> Subject: [PATCH V2] ACPI, APEI: Fixup incorrect 16-bit access width firmware
>>
Hi, Heiner
Sorry late for reply you, thank you very much for your advice.
My changes are as follows and I will send the PATCH-V3 later.
-邮件原件-
发件人: Heiner Kallweit [mailto:hkallwe...@gmail.com]
发送时间: 2017年5月17日 5:52
收件人: liwei (CM); ulf.hans...@linaro.org; adrian.hun...@intel.com
From: Liwei Song <liwei.s...@windriver.com>
Fix the following calltrace:
kernel BUG at drivers/iommu/intel-iommu.c:3260!
invalid opcode: [#5] PREEMPT SMP
Hardware name: Intel Corp. Harcuvar/Server, BIOS
HAVLCRB0.X64.0013.D39.1608311820 08/31/2016
task: 880175389950 ti: 880176
From: Liwei Song <liwei.s...@windriver.com>
Fix the following kernel bug:
kernel BUG at drivers/iommu/intel-iommu.c:3260!
invalid opcode: [#5] PREEMPT SMP
Hardware name: Intel Corp. Harcuvar/Server, BIOS
HAVLCRB0.X64.0013.D39.1608311820 08/31/2016
task: 880175389
n you point it out in detail?
Thanks!
-邮件原件-
发件人: Jaehoon Chung [mailto:jh80.ch...@gmail.com]
发送时间: 2017年6月12日 22:28
收件人: liwei (CM); ulf.hans...@linaro.org; adrian.hun...@intel.com;
jh80.ch...@samsung.com; shawn@rock-chips.com;
wsa+rene...@sang-engineering.com; hkallwe...@gmail.com
Hi, Arnd
Thanks for your suggestions, I hope you'll reply again:
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年9月7日 6:47
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J
Hi, Arnd
Sorry to bother you, what's your opinion about my explanation and revision
method?
I am looking forward to your reply, thanks!
-邮件原件-
发件人: liwei (CM)
发送时间: 2017年10月21日 17:59
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
2. From our soc chip colleague, "rst", "assert" is not generic and related with
our soc implementation. In fact，it is not just a rst and assert of the UFS
controller, but for the entire UFS IP ,so I don't think it's very helpful for
others.
I think the above places will be reserv
Hi,Philippe,
Thank you for your suggestion, and I'll consider that next patch.
-邮件原件-
发件人: Philippe Ombredanne [mailto:pombreda...@nexb.com]
发送时间: 2017年12月7日 18:34
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon;
vinholika...@gmail.com; James E.J
Hi, Bergmann
Sorry late for the reply,and thank you very much for your patience.
My reply is as follows. I look forward to your further reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年10月20日 17:16
收件人: liwei (CM)
抄送: Rob Herring; Mark
Hi, Arnd
Thank you for your reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年10月30日 23:22
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K
Hi, Rob
-邮件原件-
发件人: Rob Herring [mailto:r...@kernel.org]
发送时间: 2018年5月16日 21:16
收件人: liwei (CM)
抄送: mark.rutl...@arm.com; catalin.mari...@arm.com; will.dea...@arm.com;
vinholika...@gmail.com; j...@linux.vnet.ibm.com; martin.peter...@oracle.com;
khil...@baylibre.com; a...@arndb.de
Hi. Zhangfei
Thank you, I will add it in the next patch.
-邮件原件-
发件人: zhangfei [mailto:zhangfei@linaro.org]
发送时间: 2018年1月8日 9:40
收件人: liwei (CM); robh...@kernel.org; mark.rutl...@arm.com; xuwei (O);
catalin.mari...@arm.com; will.dea...@arm.com; vinholika...@gmail.com;
j
Hi, Arnd
Sorry late for you.
The following two suggestions we have really discussed
https://lkml.org/lkml/2017/11/30/1077
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年2月19日 17:58
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O
Hi，Arnd
Sorry to bother you again, please take the time to review the patch. Are there
any other suggestions?
Looking forward to your reply.
Thanks!
-邮件原件-
发件人: liwei (CM)
发送时间: 2018年2月23日 16:36
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas
+jinguojun jingbing
-邮件原件-
发件人: Shawn Lin [mailto:shawn@rock-chips.com]
发送时间: 2018年4月8日 9:52
收件人: Ryan Grachek
抄送: shawn@rock-chips.com; Jaehoon Chung; Ulf Hansson;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Zhangfei Gao; liwei
(CM); Suzhuangluan
主题: Re: [PATCH
"rx_lane0_sync_clk" - RX Lane 0
"rx_lane1_sync_clk" - RX Lane 1
"tx_lane0_sync_clk" - TX Lane 0
"tx_lane1_sync_clk" - TX Lane 1
-邮件原件-
发件人: liwei (CM)
发送时间: 2018年3月26日 20:02
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O);
Hi, Arnd
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月26日 17:14
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K. Petersen; Kevin Hilman; Gregory
Hi, Arnd
Thanks for your patiences.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月28日 20:50
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K
Hi, Arnd
I'll ask our soc colleagues for help and give a detailed and accurate
explanation aosp.
Thanks!
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月26日 18:42
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas
Hi, Arnd
Sorry to bother you again, please take the time to review the patch. Are there
any other suggestions?
Looking forward to your reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年2月19日 17:58
收件人: liwei (CM)
抄送: Rob Herring; Mark
Hi，Arnd
Sorry to bother you again, please take the time to review the patch. Are there
any other suggestions?
Looking forward to your reply.
Thanks!
-邮件原件-
发件人: liwei (CM)
发送时间: 2018年2月23日 16:36
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas
Hi, Arnd
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月26日 17:14
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K. Petersen; Kevin Hilman; Gregory
Hi, Arnd
I'll ask our soc colleagues for help and give a detailed and accurate
explanation aosp.
Thanks!
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月26日 18:42
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas
"rx_lane0_sync_clk" - RX Lane 0
"rx_lane1_sync_clk" - RX Lane 1
"tx_lane0_sync_clk" - TX Lane 0
"tx_lane1_sync_clk" - TX Lane 1
-邮件原件-
发件人: liwei (CM)
发送时间: 2018年3月26日 20:02
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O);
Hi, Arnd
Sorry to bother you again, please take the time to review the patch. Are there
any other suggestions?
Looking forward to your reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年2月19日 17:58
收件人: liwei (CM)
抄送: Rob Herring; Mark
Hi, Arnd
Thanks for your patiences.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年3月28日 20:50
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K
Hi, Rob
-邮件原件-
发件人: Rob Herring [mailto:r...@kernel.org]
发送时间: 2018年5月16日 21:16
收件人: liwei (CM)
抄送: mark.rutl...@arm.com; catalin.mari...@arm.com; will.dea...@arm.com;
vinholika...@gmail.com; j...@linux.vnet.ibm.com; martin.peter...@oracle.com;
khil...@baylibre.com; a...@arndb.de
Hi,all
Sorry to bother you, could you spare some time to help review patch v6 that I
sended. Would you please give us your opinion?
Thnak you very much.
-邮件原件-
发件人: liwei (CM)
发送时间: 2017年7月6日 15:03
收件人: 'Guodong Xu'; Jaehoon Chung
抄送: Ulf Hansson; adrian.hun...@intel.com; Shawn Lin
On 07/21/2017 05:56 PM, Andy Shevchenko wrote:
> On Fri, Jul 21, 2017 at 12:41 PM, Song liwei wrote:
>
>> [Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
>>
>> This is due to an 8-bit access width is specified for a 16-bit register,
>> Do
On 07/31/2017 10:09 AM, Zheng, Lv wrote:
> Hi,
>
>> From: linux-acpi-ow...@vger.kernel.org
>> [mailto:linux-acpi-ow...@vger.kernel.org] On Behalf Of Song
>> liwei
>> Subject: [PATCH V2] ACPI, APEI: Fixup incorrect 16-bit access width firmware
Hi. Zhangfei
Thank you, I will add it in the next patch.
-邮件原件-
发件人: zhangfei [mailto:zhangfei@linaro.org]
发送时间: 2018年1月8日 9:40
收件人: liwei (CM); robh...@kernel.org; mark.rutl...@arm.com; xuwei (O);
catalin.mari...@arm.com; will.dea...@arm.com; vinholika...@gmail.com;
j
Hi, Arnd
Thank you for your reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年10月30日 23:22
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J. Bottomley; Martin K
Hi, Arnd
Thanks for your suggestions, I hope you'll reply again:
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年9月7日 6:47
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Holikatti; James E.J
Hi, Ulf
Thank you very much for your advice.
1. Version history is really great information, however it doesn't belong
inside the change log itsefl. Instead add "---" and a newline here, then put it
all below that.
【LiWei】OK，I will fix it;
2. We have an API, mmc_regulator_set_vqmmc()
From: Liwei Song
This is a follow up to commit f712c71f7b2b ("ACPI, APEI: Fixup common
access width firmware bug") fix the following firmware bug:
[Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
This is due to an 8-bit access width is specified for a 16-bi
+jinguojun jingbing
-邮件原件-
发件人: Shawn Lin [mailto:shawn@rock-chips.com]
发送时间: 2018年4月8日 9:52
收件人: Ryan Grachek
抄送: shawn@rock-chips.com; Jaehoon Chung; Ulf Hansson;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Zhangfei Gao; liwei
(CM); Suzhuangluan
主题: Re: [PATCH
Hi, Arnd
Sorry late for you.
The following two suggestions we have really discussed
https://lkml.org/lkml/2017/11/30/1077
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2018年2月19日 17:58
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O
ogether with dts changes. It's now in linux-next [1]；need
this one more?
2. And added the minor comments.
Iwill fix them in patch v6.
Thank you very much.
-邮件原件-
发件人: Guodong Xu [mailto:guodong...@linaro.org]
发送时间: 2017年7月6日 14:45
收件人: Jaehoon Chung; liwei (CM)
抄送: Ulf Hansson; adri
件人: liwei (CM)
抄送: Ulf Hansson; adrian.hun...@intel.com; Jaehoon Chung; Shawn Lin;
wsa+rene...@sang-engineering.com; hkallwe...@gmail.com;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
主题: Re: [PATCH v4] mmc: dw_mmc-k3: add sd support for hi3660
Hi, Li Wei
I have some minor comments
From: Liwei Song
This is a follow up to commit f712c71f7b2b ("ACPI, APEI: Fixup common
access width firmware bug") fix the following firmware bug:
[Firmware Bug]: APEI: Invalid bit width + offset in GAR [0xb2/16/0/1/1]
This is due to an 8-bit access width is specified for a 16-bit re
Hi,Philippe,
Thank you for your suggestion, and I'll consider that next patch.
-邮件原件-
发件人: Philippe Ombredanne [mailto:pombreda...@nexb.com]
发送时间: 2017年12月7日 18:34
收件人: liwei (CM)
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon;
vinholika...@gmail.com; James E.J
2. From our soc chip colleague, "rst", "assert" is not generic and related with
our soc implementation. In fact，it is not just a rst and assert of the UFS
controller, but for the entire UFS IP ,so I don't think it's very helpful for
others.
I think the above places will be reserv
Ping...
On 2020/12/3 22:16, Wei Li wrote:
> Armv8.3 extends the SPE by adding:
> - Alignment field in the Events packet, and filtering on this event
> using PMSEVFR_EL1.
> - Support for the Scalable Vector Extension (SVE).
>
> The main additions for SVE are:
> - Recording the vector length for
On 8/3/20 20:52, Herbert Xu wrote:
> On Mon, Aug 03, 2020 at 03:58:58PM +0800, Liwei Song wrote:
>> exist the following assignment in ccp(ignore the force
>> convert of the struct) by list_del in ccp_dequeue_cmd():
>> req->__ctx->cmd->entry->next = LIST_POISON1
On 8/4/20 12:04, Herbert Xu wrote:
> On Tue, Aug 04, 2020 at 11:51:47AM +0800, Liwei Song wrote:
>>
>> On 8/3/20 20:52, Herbert Xu wrote:
>>> On Mon, Aug 03, 2020 at 03:58:58PM +0800, Liwei Song wrote:
>>>> exist the following assignment in ccp(ignore
On 8/4/20 12:22, Herbert Xu wrote:
> On Tue, Aug 04, 2020 at 12:20:21PM +0800, Liwei Song wrote:
>>
>> Yes, the other process should do this zero work, but the case I met is
>> this address will appear in the slab_alloc_node() as freelist pointer of
>> slub,
>
Hi luobin,
On 2020/9/17 11:44, luobin (L) wrote:
> On 2020/9/17 11:03, Wei Li wrote:
>> +err = irq_set_affinity_hint(rq->irq, >affinity_mask);
>> +if (err)
>> +goto err_irq;
>> +
>> +return 0;
>> +
>> +err_irq:
>> +rx_del_napi(rxq);
>> +return err;
> If
Hi Namhyung,
On 2020/9/17 13:19, Namhyung Kim wrote:
> Hello,
>
> On Thu, Sep 17, 2020 at 11:45 AM Wei Li wrote:
>>
>> Since we have introduced map_for_each_event() to walk the 'pmu_events_map',
>> clean up metricgroup__print() and metricgroup__has_metric() with it.
>>
>> Signed-off-by: Wei Li
with multilib lib32 support, the rootfs will be 32-bit,
the kernel is still 64-bit, in this case run turbostat
will failed with "out of range" error.
Thanks,
Liwei.
On 8/14/20 05:43, Len Brown wrote:
> Huh?
>
> On Fri, Jul 17, 2020 at 2:09 AM Liwei Song wrote:
>&
RIP: 0033:0x7f83bb6917e7
Fix it by zero cmd struct after finished use it.
Signed-off-by: Liwei Song
---
drivers/crypto/ccp/ccp-dev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/ccp/ccp-dev.c b/drivers/crypto/ccp/ccp-dev.c
index edefa669153f..75a6418d541d 100644
--- a/dri
. below)
>
> No, the proper fix is to pass -D_FILE_OFFSET_BITS=64 to the compiler.
>
> Here's the patch:
This path works with my case.
Thanks,
Liwei.
>
> ---8<---
>
> From: Alexander Monakov
> Date: Sun, 23 Aug 2020 23:27:02 +0300
> Subject: [PATCH] turbosta
Hi,
On 2020/11/25 18:11, Tiezhu Yang wrote:
> After commit 9cce844abf07 ("MIPS: CPU#0 is not hotpluggable"),
Why CPU#0 is not hotpluggable on MIPS? Does that unrealizable?
> c->hotpluggable is 0 for CPU 0 and it will not generate a control
> file in sysfs for this CPU:
>
> [root@linux
Hi Will,
On 2020/10/2 18:57, Will Deacon wrote:
> On Wed, Sep 30, 2020 at 05:31:35PM +0800, Wei Li wrote:
>> Armv8.3 extends the SPE by adding:
>> - Alignment field in the Events packet, and filtering on this event
>> using PMSEVFR_EL1.
>> - Support for the Scalable Vector Extension (SVE).
>>
Hi, Catalin
Sorry late for you, I will submit the patch as soon as possible.
Thanks!
-邮件原件-
发件人: Catalin Marinas [mailto:catalin.mari...@arm.com]
发送时间: 2020年11月16日 18:47
收件人: liwei (CM)
抄送: Song Bao Hua (Barry Song) ; Mike Rapoport
; w...@kernel.org; Xiaqing (A)
; Chenfeng (puck
Hi, Barry
I have changed SECTION_SIZE_BITS to 27 in our products, but I don't have to
submit it.
-邮件原件-
发件人: Song Bao Hua (Barry Song)
发送时间: 2020年11月16日 16:34
收件人: Catalin Marinas ; Mike Rapoport
; liwei (CM)
抄送: w...@kernel.org; Xiaqing (A) ; Chenfeng (puck)
; butao ; fengbaopeng
Hi Will,
On 2020/11/30 18:06, Will Deacon wrote:
> On Fri, Nov 27, 2020 at 02:03:22PM +0800, Wei Li wrote:
>> Armv8.3 extends the SPE by adding:
>> - Alignment field in the Events packet, and filtering on this event
>> using PMSEVFR_EL1.
>> - Support for the Scalable Vector Extension (SVE).
>>
Hi Yang,
On 2020/11/25 6:13, Li Yang wrote:
> On Tue, Nov 24, 2020 at 3:44 PM Li Yang wrote:
>>
>> On Tue, Nov 24, 2020 at 12:24 AM Wei Li wrote:
>>>
>>> IS_ERR_VALUE macro should be used only with unsigned long type.
>>> Especially it works incorrectly with unsigned shorter types on
>>> 64bit
Hi Leo
On 2020/8/7 15:16, Leo Yan wrote:
> The Arm arch timer can be used to calculate timestamp, the basic idea is
> the arch timer's counter value can be recorded in the hardware tracing
> data, e.g. the arch timer's counter value can be used for Arm CoreSight
> (not now but might be
Hi Leo,
On 2020/8/7 15:16, Leo Yan wrote:
> This patch introduces two new APIs, one is to calculate from converting
> counter to timestamp and provides a reverse flow to convert timestamp
> to counter.
>
> Signed-off-by: Leo Yan
> ---
> tools/perf/util/Build| 1 +
>
Ping...
On 2020/7/24 16:32, Leo Yan wrote:
> Hi Wei,
>
> On Fri, Jul 24, 2020 at 03:26:28PM +0800, Wei Li wrote:
>> In arm_spe_read_record(), when we are processing an events packet,
>> 'decoder->packet.index' is the length of payload, which has been
>> transformed in payloadlen(). So correct
Hi Andi,
On 2020/9/23 3:50, Andi Kleen wrote:
> On Tue, Sep 22, 2020 at 12:23:21PM -0700, Andi Kleen wrote:
>>> After debugging, i found the root reason is that the xyarray fd is created
>>> by evsel__open_per_thread() ignoring the cpu passed in
>>> create_perf_stat_counter(), while the evsel'
Hi Will,
On 2020/9/7 20:51, Will Deacon wrote:
> On Fri, Jul 24, 2020 at 05:16:04PM +0800, Wei Li wrote:
>> Armv8.3 extends the SPE by adding:
>> - Alignment field in the Events packet, and filtering on this event
>> using PMSEVFR_EL1.
>> - Support for the Scalable Vector Extension (SVE).
>>
>>
Hi Daniel,
On 2020/5/19 19:40, Daniel Thompson wrote:
> On Sat, May 16, 2020 at 05:26:06PM +0800, Wei Li wrote:
>> 'KDBFLAGS' is an internal variable of kdb, it is combined by 'KDBDEBUG'
>> and state flags. But the user can define an environment variable named
>> 'KDBFLAGS' too, so let's make it
Hi, Bergmann
Sorry late for the reply,and thank you very much for your patience.
My reply is as follows. I look forward to your further reply.
-邮件原件-
发件人: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] 代表 Arnd Bergmann
发送时间: 2017年10月20日 17:16
收件人: liwei (CM)
抄送: Rob Herring; Mark
Hi, Arnd
Sorry to bother you, what's your opinion about my explanation and revision
method?
I am looking forward to your reply, thanks!
-邮件原件-
发件人: liwei (CM)
发送时间: 2017年10月21日 17:59
收件人: 'Arnd Bergmann'
抄送: Rob Herring; Mark Rutland; xuwei (O); Catalin Marinas; Will Deacon; Vinayak
Hi Alex,
On 2019/3/29 23:20, Alex Kogan wrote:
> In CNA, spinning threads are organized in two queues, a main queue for
> threads running on the same node as the current lock holder, and a
> secondary queue for threads running on other nodes. At the unlock time,
> the lock holder scans the main
Hi Marc,
On 2019/10/2 17:06, Marc Zyngier wrote:
> The GICv3 architecture specification is incredibly misleading when it
> comes to PMR and the requirement for a DSB. It turns out that this DSB
> is only required if the CPU interface sends an Upstream Control
> message to the redistributor in
I
partitions.
> Another option is we always take this as SPE-v1 and only create single
> PMU event, just keep what's we are doing with the perf event
> 'arm_spe_0', but the driver needs to dynamically detect SPE PMU version
> number in the function arm_spe_pmu_event_init(), and then based on
> version number to select corresponding mask for PMSEVFR.
Thus, the driver will service two devices, and will also register two PMUs
'arm_spe_0' and
'arm_spe_1', so i think there is no conflict here.
Back to Suzuki's question, refer to the ACPI parsing code for SPE device,
function
arm_spe_acpi_register_device(), there is a check of hetero_id for all cores.
It seems that we only support homogeneous ACPI/SPE machines, but i can't find
the similar
check in OF/SPE parsing code.
> Thanks,
> Leo
>
> [1]
> https://lore.kernel.org/linux-arm-kernel/2020072407.35593-1-liwei...@huawei.com/
>
Thanks,
Wei
Hi, all
I'm sorry to bother you, but still very hope you can give comments or
suggestions to this patch, thank you very much.
-邮件原件-
发件人: Song Bao Hua (Barry Song)
发送时间: 2020年7月9日 20:27
收件人: liwei (CM) ; catalin.mari...@arm.com; w...@kernel.org
抄送: fengbaopeng ; nsaenzjulie...@suse.de
-邮件原件-
发件人: Mike Rapoport [mailto:r...@linux.ibm.com]
发送时间: 2020年7月21日 14:35
收件人: liwei (CM)
抄送: Song Bao Hua (Barry Song) ;
catalin.mari...@arm.com; w...@kernel.org; fengbaopeng
; nsaenzjulie...@suse.de; steve.cap...@arm.com;
linux-arm-ker...@lists.infradead.org; linux-kernel
Hi Leo,
On 2020/7/28 20:27, Leo Yan wrote:
> Hi Wei,
>
> On Fri, Jul 24, 2020 at 05:16:04PM +0800, Wei Li wrote:
>> Armv8.3 extends the SPE by adding:
>> - Alignment field in the Events packet, and filtering on this event
>> using PMSEVFR_EL1.
>> - Support for the Scalable Vector Extension
Hi Leo,
On 2020/7/29 14:29, Leo Yan wrote:
> On Fri, Jul 24, 2020 at 05:16:05PM +0800, Wei Li wrote:
>> Armv8.3 extends the SPE by adding:
>> - Alignment field in the Events packet, and filtering on this event
>> using PMSEVFR_EL1.
>> - Support for the Scalable Vector Extension (SVE).
>>
>> The
Hi Leo,
On 2020/7/29 15:28, Leo Yan wrote:
> On Wed, Jul 29, 2020 at 03:21:20PM +0800, liwei (GF) wrote:
>
> [...]
>
>>>> @@ -354,8 +372,38 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt
>>>> *packet, char *buf,
>>>>}
>>&
-邮件原件-
发件人: Mike Rapoport [mailto:r...@linux.ibm.com]
发送时间: 2020年7月23日 21:19
收件人: Catalin Marinas
抄送: liwei (CM) ; w...@kernel.org; Xiaqing (A)
; Chenfeng (puck) ; butao
; fengbaopeng ;
nsaenzjulie...@suse.de; steve.cap...@arm.com; Song Bao Hua (Barry Song)
; linux-arm-ker
with 32-bit rootfs, the offset may out of range when set it
to 0xc0010299, define it as "unsigned long long" type and
call pread64 directly in kernel.
Signed-off-by: Liwei Song
---
tools/power/x86/turbostat/turbostat.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Hi Yingliang,
On 2020/7/21 22:38, Yang Yingliang wrote:
(SNIP)
>
> SERIAL_PORT_DFNS is not defined on each arch, if it's not defined,
> serial8250_set_defaults() won't be called in serial8250_isa_init_ports(),
> so the p->serial_in pointer won't be initialized, and it leads a
> null-ptr-deref.
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