From: Chen Zhong
Add the required header for the entire clocks dt-bindings exported
from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys
and audsys which could be found on MT7622 SoC.
Signed-off-by: Chen Zhong
Signed-off-by:
From: Sean Wang
This patch adds the binding documentation for apmixedsys, ethsys, hifsys,
infracfg, pericfg, topckgen and audsys for MT7622.
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
---
From: Chen Zhong
Since the previous setup always sets the PLL using crystal 26MHz, this
doesn't always happen in every MediaTek platform. So the patch added
flexibility for assigning extra member for determining the PLL source
clock.
Signed-off-by: Chen Zhong
From: Sean Wang
Add clock driver required by each function driver on MT7622 SoC with
adding all clocks exported from every hardware subsystem such as topckgen,
apmixedsys, infracfg, pericfg , pciessys, ssusbsys, ethsys and audsys.
Chen Zhong (2):
clk: mediatek: add the
From: Sean Wang
Add the reset controller dt-bindings exported from infracfg, pericfg,
hifsys and ethsys which could be found on MT7622 SoC. So that we can
reference them from within a device-tree file.
Signed-off-by: Sean Wang
---
From: Sean Wang
This patchset introduces support for MediaTek SoC based real time clock
(RTC) Currently, the driver is already tested successfully with hwclock
and wakealarm on MT7622 SoC. And it should also be workable on other
similar MediaTek SoCs. And patch 3 is a
From: Sean Wang
This patch introduces the driver for the RTC on MT7622 SoC.
Signed-off-by: Sean Wang
---
drivers/rtc/Kconfig| 10 ++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-mediatek.c | 398
From: Sean Wang
Add device-tree binding for MediaTek SoC based RTC
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
---
.../devicetree/bindings/rtc/rtc-mediatek.txt| 21 +
1 file changed, 21 insertions(+)
From: Sean Wang
I work for MediaTek on maintaining the MediaTek SoC based RTC driver for
the existing SoCs and keep adding support for the following SoCs in the
future.
Cc: Eddie Huang
Signed-off-by: Sean Wang
---
From: Sean Wang
Give a better description for original MediaTek RTC driver as PMIC based
RTC in order to distinguish SoC based RTC. Also turning all words with
Mediatek to MediaTek here.
Cc: Eddie Huang
Signed-off-by: Sean Wang
From: Sean Wang
MTK_PMIC_WRAP is the basic and required configuration for those various
MediaTek PMICs, so turning MTK_PMIC_WRAP into visible symbols easily
allows users tending to have the enablement for those PMICs.
Signed-off-by: Sean Wang
---
From: Sean Wang
pwrap initialization is highly associated with the base SoC, so
update here for allowing pwrap_init without slave program which would be
used to those PMICs without extra encryption on bus such as MT6380.
Signed-off-by: Chenglin Xu
From: Sean Wang
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Sean Wang
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the
From: Sean Wang
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.
Signed-off-by: Chenglin Xu
From: Sean Wang
fixup those warnings such as lines over 80 words and parenthesis
alignment which would be complained by checkpatch.pl.
Signed-off-by: Sean Wang
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 20 +---
1 file changed,
From: Chenglin Xu
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
From: Sean Wang
Changes since v3
- rebase into Linux 4.14-rc1
- removed those patches already applied
Changes since v2:
- for patch 1/2, enhance the document as the suggestions from v2.
- for patch 3, constify the table with struct regulator_ops, also fix that
regulator
From: Sean Wang
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used
From: Sean Wang
Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
the independent menu as other SoCs vendor usually did.
Signed-off-by: Sean Wang
---
drivers/soc/mediatek/Kconfig | 4
1 file changed, 4 insertions(+)
From: Sean Wang
This patch adds the binding documentation for apmixedsys, ethsys, hifsys,
infracfg, pericfg, topckgen and audsys for MT7622.
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
Acked-by: Rob Herring
From: Chen Zhong
Add the required header for the entire clocks dt-bindings exported
from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys
and audsys which could be found on MT7622 SoC.
Signed-off-by: Chen Zhong
Signed-off-by:
From: Sean Wang
Changes since v1:
- fix up the makefile target for clk-mt7622-aud.o
Add clock driver required by each function driver on MT7622 SoC with
adding all clocks exported from every hardware subsystem such as topckgen,
apmixedsys, infracfg, pericfg , pciessys,
From: Sean Wang
Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
From: Chen Zhong
Since the previous setup always sets the PLL using crystal 26MHz, this
doesn't always happen in every MediaTek platform. So the patch added
flexibility for assigning extra member for determining the PLL source
clock.
Signed-off-by: Chen Zhong
From: Sean Wang
Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
the independent menu as other SoCs vendor usually did. Since the menu
would be shown depending on "ARCH_MEDIATEK || COMPILE_TEST" selected and
MTK_PMIC_WRAP is still safe compiling with
From: Chenglin Xu
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
From: Sean Wang
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used
From: Sean Wang
pwrap initialization is highly associated with the base SoC and the
target PMICs, so slight refactorization is made here for allowing
pwrap_init to run on those PMICs with different capability from the
previous MediaTek PMICs and the determination for the
From: Sean Wang
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the
From: Sean Wang
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 6 +-
1 file changed, 5 insertions(+), 1
From: Sean Wang
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.
Signed-off-by: Chenglin Xu
From: Sean Wang
fixup those warnings such as lines over 80 words and parenthesis
alignment which would be complained by checkpatch.pl.
Signed-off-by: Sean Wang
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 20 +---
1 file changed,
From: Sean Wang
Changes since v4:
- for patch 1/7 and 5/7, add the description about how to bind pmic wrapper
with MT6380.
- for patch 3/7, add more comments explaining why additional pwrap_read is
required in the pwrap_write32.
- for patch 4/7 and 5/7, refactoring
From: Sean Wang
Changes since v1:
- Rename to rtc-mt7622.c from rtc-mediatek.c
- Use [readl,writel]_relaxed instead of __raw_* version
- Remove redundant register reading in mtk_rtc_get_alarm_or_time()
- Stop alarm when alarm is really expired in mtk_rtc_alarmirq()
-
From: Sean Wang
I work for MediaTek on maintaining the MediaTek SoC based RTC driver for
the existing SoCs and keep adding support for the following SoCs in the
future.
Cc: Eddie Huang
Signed-off-by: Sean Wang
---
From: Sean Wang
Add device-tree binding for MediaTek SoC based RTC
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
.../devicetree/bindings/rtc/rtc-mediatek.txt| 21 +
From: Sean Wang
This patch introduces the driver for the RTC on MT7622 SoC.
Signed-off-by: Sean Wang
---
drivers/rtc/Kconfig | 10 ++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-mt7622.c | 418
From: Sean Wang
Give a better description for original MediaTek RTC driver as PMIC based
RTC in order to distinguish SoC based RTC. Also turning all words with
Mediatek to MediaTek here.
Cc: Eddie Huang
Signed-off-by: Sean Wang
From: Sean Wang
Add me as maintainers to support existing SoCs and push forward
following MediaTek PMICs with LEDs to reuse the driver.
Signed-off-by: Sean Wang
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Sean Wang
Document the devicetree bindings in 8250.txt for MediaTek BTIF
controller which could be found on MT7622 and MT7623 SoC.
Signed-off-by: Sean Wang
---
Documentation/devicetree/bindings/serial/8250.txt | 3 +++
1 file changed, 3
From: Sean Wang
Since v2:
- reusing 8250_of since the original driver has almost the same logic
This patchset introduces the support for MediaTek BTIF controller.
MediaTek BTIF controller is the serial interface similar to UART but it
works only as the digital device
From: Sean Wang
MediaTek BTIF controller is the serial interface similar to UART but it
works only as the digital device which is mainly used to communicate with
the connectivity module called CONNSYS inside the SoC which could be mostly
found on those MediaTek SoCs with
From: Sean Wang
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the
From: Sean Wang
Multiple platforms would always use their own way handling CS timing
extension on the bus which leads to a little bit code duplication.
Therefore, the patch groups the similar logic to handle CS timing
extension into the common function which allows the
From: Chenglin Xu
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
From: Sean Wang
Changes since v5:
- drop the merged patch
- add a patch for common way handling for setup CS timing extension
- unify the comment style
Changes since v4:
- for patch 1/7 and 5/7, add the description about how to bind pmic wrapper
with MT6380.
- for patch
From: Sean Wang
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.
Signed-off-by: Chenglin Xu
From: Sean Wang
pwrap initialization is highly associated with the base SoC and the
target PMICs, so slight refactorization is made here for allowing
pwrap_init to run on those PMICs with different capability from the
previous MediaTek PMICs and the determination for the
From: Sean Wang
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used
From: Sean Wang
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 6 +-
1 file changed, 5 insertions(+), 1
From: Sean Wang
The latest kernel tree already can support more MediaTek platforms such as
MT2712 and MT7622, so additional descriptions for those platforms are added
and certain cleanups are also being made here.
Signed-off-by: Sean Wang
---
From: Sean Wang
Add device-tree binding for MediaTek SoC based RTC
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
.../devicetree/bindings/rtc/rtc-mt7622.txt | 21 +
From: Sean Wang
Changes since v2:
- Remove time extension with yr_base
- Add fixup that ensures all time fields in hardware keeping consistency
inside the mtk_rtc_get_alarm_or_time call
- Add validity for time range should be between 2001 to 2099
- Enhance comments with
From: Sean Wang
I work for MediaTek on maintaining the existing MediaTek SoC whose target
to home gateway such as MT7622 and MT7623 that is reusing MT2701 related
files and will keep adding support for the following such kinds of SoCs
in the future.
Signed-off-by: Sean
From: Sean Wang
The patchset adds support for pinctrl on MT7622 SoC.
patch 1: describe the hardware, also including the defintion for pins,
groups and function.
patch 2: add cleanup for keep drivers inside the independent menu.
patch 3/4: add support for mt7622
From: Sean Wang
Add support for pinctrl on MT7622 SoC. The IO core found on the SoC has
the registers for pinctrl, pinconf and gpio mixed up in the same register
range. However, the IO core for the MT7622 SoC is completely distinct from
anyone of previous MediaTek SoCs
From: Sean Wang
Add devicetree bindings for MediaTek MT7622 pinctrl driver.
Signed-off-by: Sean Wang
---
.../devicetree/bindings/pinctrl/pinctrl-mt7622.txt | 330 +
1 file changed, 330 insertions(+)
create mode 100644
From: Sean Wang
Since lots of MediaTek drivers had been added, it seems slightly better
for that adding cleanup for placing MediaTek pinctrl drivers under the
independent menu as other kinds of drivers usually was done.
Signed-off-by: Sean Wang
From: Sean Wang
Fix that bananapi-r2 booting from SD-card would fail since incorrect
polarity is applied to the previous setup with GPIO_ACTIVE_HIGH.
Cc: sta...@vger.kernel.org # v4.14+
Fixes: 0eed8d097612 ("arm: dts: mt7623: Add SD-card and EMMC to bananapi-r2")
From: Sean Wang
Just add some fixes up for the current MT7623 support
Patch 1) complement the missing dt-bindings definitions
Patch 2) pick up the proper falling back as patch 1 defines.
Patch 3) SD-card detection issue caused by the wrong polarity is being fixed up
From: Sean Wang
Add the devicetree binding for MT7623 SoC using MT2701 as the fallback.
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
---
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++
1 file changed, 2 insertions(+)
diff
From: Sean Wang
The current mmc related nodes should be falling back to MT2701
as the dt-binding defines and which has more appropriate setup
for MT7623.
Signed-off-by: Sean Wang
---
arch/arm/boot/dts/mt7623.dtsi | 4 ++--
1 file changed, 2
From: Sean Wang
Supported MediaTek SoCs with ARMv7 are not limited within MT65xx or MT81xx
and thus use more generic words to prompt users as the other vendors
usually use.
Signed-off-by: Sean Wang
---
arch/arm/mach-mediatek/Kconfig | 2 +-
1
From: Sean Wang
The current solution would setup fixed and force link of 1Gbps to the both
GMAC on the default. However, The GMAC should always be put to link down
state when the GMAC is disabled on certain target boards. Otherwise,
the driver possibly receives unexpected
From: Sean Wang
MT7530 can treat each port as either VLAN-unaware port or VLAN-aware port
through the implementation of port matrix mode or port security mode on
the ingress port, respectively. On one hand, Each port has been acting as
the VLAN-unaware one whenever the
From: Sean Wang
I work for MediaTek and maintain SoC targeting to home gateway and
also will keep extending and testing the function from MediaTek
switch.
Signed-off-by: Sean Wang
Reviewed-by: Andrew Lunn
---
MAINTAINERS | 7
From: Sean Wang
Changes sicne v2:
update to the latest code base from net-next and fix up all building
errors with -Werror.
Changes since v1:
- fix up the typo
- prefer ordering declarations longest to shortest
- update that vlan_prepare callback should not change any
From: Sean Wang
In order to let MT7530 switch can recognize well those egress packets
having both special tag and VLAN tag, the information about the special
tag should be carried on the existing VLAN tag. On the other hand, it's
unnecessary for extra handling for ingress
From: Sean Wang
MT7530 can treat each port as either VLAN-unaware port or VLAN-aware port
through the implementation of port matrix mode or port security mode on
the ingress port, respectively. On one hand, Each port has been acting as
the VLAN-unaware one whenever the
From: Sean Wang
I work for MediaTek and maintain SoC targeting to home gateway and
also will keep extending and testing the function from MediaTek
switch.
Signed-off-by: Sean Wang
Reviewed-by: Andrew Lunn
---
MAINTAINERS | 7
From: Sean Wang
Changes since v1:
- fix up the typo
- prefer ordering declarations longest to shortest
- update that vlan_prepare callback should not change any state
- use lower case letter for function naming
The patchset extends DSA MT7530 to VLAN support through
From: Sean Wang
In order to let MT7530 switch can recognize well those egress packets
having both special tag and VLAN tag, the information about the special
tag should be carried on the existing VLAN tag. On the other hand, it's
unnecessary for extra handling for ingress
From: Sean Wang
The property "mediatek,pctl" is only required for SoCs such as MT2701 and
MT7623, so adding a few words for stating the condition.
Signed-off-by: Sean Wang
---
Documentation/devicetree/bindings/net/mediatek-net.txt | 2 +-
1 file
From: Sean Wang
Remove superfluous pin setup to get out of accessing invalid I/O pin
registers because the way for pin configuring tends to be different from
various SoCs and thus it should be better being managed and controlled by
the pinctrl driver which MT7622 already
From: Sean Wang
Getting much MediaTek clock driver have been added to CCF, so it's
better adding the cleanup for grouping drivers under the independent
menu to simplify configuration selection. In addition, really trivial
fixups for typos are added in the same patch.
From: Sean Wang
Let the build system looking into the directiory where the clock drivers
resides for the COMPILE_TEST alternative dependency allows test-building
the drivers.
Signed-off-by: Sean Wang
---
drivers/clk/Makefile | 2 +-
1 file
From: Sean Wang
MT7530 can treat each port as either VLAN-unware port or VLAN-ware port
through the implementation of port matrix mode or port security mode on
the ingress port, respectively. On one hand, Each port has been acting as
the VLAN-unware one whenever the
From: Sean Wang
In order to let MT7530 switch can recognize well those packets
having both special tag and VLAN tag, the information about
the special tag should be carried on the existing VLAN tag.
Signed-off-by: Sean Wang
---
net/dsa/tag_mtk.c
From: Sean Wang
Changes since v1:
- add tag from the feedback of v1
- enhance dt-binding documentation
Just add some fixes up for the current MT7623 support
Patch 1) complement the missing dt-bindings definitions
Patch 2) pick up the proper falling back as patch 1
From: Sean Wang
Add the devicetree binding for MT7623 SoC using MT2701 as the fallback.
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++
From: Sean Wang
Fix that bananapi-r2 booting from SD-card would fail since incorrect
polarity is applied to the previous setup with GPIO_ACTIVE_HIGH.
Cc: sta...@vger.kernel.org
Fixes: 0eed8d097612 ("arm: dts: mt7623: Add SD-card and EMMC to bananapi-r2")
Signed-off-by:
From: Sean Wang
The current mmc related nodes should be falling back to MT2701
as the dt-binding defines and which has more appropriate setup
for MT7623.
Signed-off-by: Sean Wang
---
arch/arm/boot/dts/mt7623.dtsi | 4 ++--
1 file changed, 2
From: Sean Wang
The patchset extends DSA MT7530 to VLAN support through filling required
callbacks in patch 1 and merging the special tag with VLAN tag in patch 2
for allowing that the hardware can handle these packets with VID from the
CPU port.
Sean Wang (3):
net:
From: Sean Wang
I work for MediaTek and maintain SoC targeting to home gateway and
also will keep extending and testing the function from MediaTek
switch.
Signed-off-by: Sean Wang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
From: Sean Wang
Since lots of MediaTek drivers had been added, it seems slightly better
for that adding cleanup for placing MediaTek pinctrl drivers under the
independent menu as other kinds of drivers usually was done.
Signed-off-by: Sean Wang
From: Sean Wang
Add support for pinctrl on MT7622 SoC. The IO core found on the SoC has
the registers for pinctrl, pinconf and gpio mixed up in the same register
range. However, the IO core for the MT7622 SoC is completely distinct from
anyone of previous MediaTek SoCs
From: Sean Wang
Add devicetree bindings for MediaTek MT7622 pinctrl driver.
Signed-off-by: Sean Wang
Reviewed-by: Biao Huang
---
.../devicetree/bindings/pinctrl/pinctrl-mt7622.txt | 351 +
1 file
From: Sean Wang
Changes since v1:
- add changes for the suggestion in v1.
- fix up the names for pin 14, 15, 71, 72, 93 and 94.
- add function "watchdog".
- change pin groups used by ethernet, i2s, led, pcie, spic, tdm
and watchdog for refining the naming and reflecting
From: Sean Wang
I work for MediaTek on maintaining the existing MediaTek SoC whose target
to home gateway such as MT7622 and MT7623 that is reusing MT2701 related
files and will keep adding support for the following such kinds of SoCs
in the future.
Signed-off-by: Sean
From: Sean Wang
Just add binding for a required clock referenced by Mali-450 on MT7623
or MT2701 SoC.
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
---
include/dt-bindings/clock/mt2701-clk.h | 4
1 file changed, 4 insertions(+)
From: Sean Wang
Add clock driver support for g3dsys on MT2701 and MT7623, which is
providing essential clock gate and reset controller to Mali-450.
Signed-off-by: Sean Wang
---
drivers/clk/mediatek/Kconfig | 6 +++
From: Sean Wang
Add nodes for Mali-450 device, g3dsys device providing required clock
gate and reset control and larb3 offering an arbiter through iommu for
controlling access to external memory requested from Mali-450.
Signed-off-by: Sean Wang
From: Sean Wang
v2:
changes from v1 to v2:
- Add Reviewed-by tag from v1 result
- Split out the changes for dt-bindings .h from the changes for driver
- Fix up the typo in g3dsys dt-bindings documentation
v1:
Hi,
The series adds a required
From: Sean Wang
The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it
and define its own vendor-specific properties.
Reviewed-by: Rob Herring
Signed-off-by: Sean Wang
---
From: Sean Wang
Add bindings to g3dsys providing necessary clock and reset control to
Mali-450.
Signed-off-by: Sean Wang
---
.../bindings/arm/mediatek/mediatek,g3dsys.txt | 30 ++
1 file changed, 30 insertions(+)
create
From: Sean Wang
Just add binding for a required reset referenced by Mali-450 on MT7623
or MT2701 SoC.
Cc: devicet...@vger.kernel.org
Signed-off-by: Sean Wang
---
include/dt-bindings/reset/mt2701-resets.h | 3 +++
1 file changed, 3 insertions(+)
From: Sean Wang
Fix up drivers/soc/mediatek/mtk-scpsys.c:255:2-3: Unneeded semicolon
accidently being added in commit f9e2f65dd561 ("soc: mediatek: add a
fixed wait for SRAM stable").
Fixes: f9e2f65dd561 ("soc: mediatek: add a fixed wait for SRAM stable")
Reported-by:
From: Sean Wang
The series is to add external interrupt support to MT7622 pinctrl.
Before we can freely do that in pinctrl-mt7622.c with patch 3, a refactor
work has to be done with patch 2 to split EINT-related code from a
specific driver and then allows pintrl-mt7622.c
From: Sean Wang
Add new files for the entry
Signed-off-by: Sean Wang
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9051a9c..7f3cced 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11193,6
301 - 400 of 1469 matches
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