Re: [RFC 0/6] Non perf based Gen Graphics OA unit driver

On Fri, Oct 16, 2015 at 10:43 AM, Peter Zijlstra wrote: > On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote: >> - We're bridging two complex architectures >> >> To review this work I think it will be relevant to have a good >> general familia

Re: [RFC 0/6] Non perf based Gen Graphics OA unit driver

On Fri, Oct 16, 2015 at 10:43 AM, Peter Zijlstra <pet...@infradead.org> wrote: > On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote: >> - We're bridging two complex architectures >> >> To review this work I think it will be relevant to have a good >>

Re: [RFC 0/6] Non perf based Gen Graphics OA unit driver

On Fri, Oct 16, 2015 at 11:33 AM, Peter Zijlstra wrote: > On Fri, Oct 16, 2015 at 12:02:28PM +0200, Ingo Molnar wrote: >> >> * Peter Zijlstra wrote: >> >> > > - We may be making some technical compromises a.t.m for the sake of >> > > using perf. >> > > >> > > perf_event_open() requires

Re: [RFC 0/6] Non perf based Gen Graphics OA unit driver

On Fri, Oct 16, 2015 at 11:33 AM, Peter Zijlstra wrote: > On Fri, Oct 16, 2015 at 12:02:28PM +0200, Ingo Molnar wrote: >> >> * Peter Zijlstra wrote: >> >> > > - We may be making some technical compromises a.t.m for the sake of >> > > using perf. >> >

[RFC 6/6] drm/i915: add oa_event_min_timer_exponent sysctl

-by: Robert Bragg --- drivers/gpu/drm/i915/i915_perf.c | 37 - 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index ab82857..5ef7d92 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b

[RFC 5/6] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915

[RFC 4/6] drm/i915: Add i915 perf event for Haswell OA unit

Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson Signed-off-by: Robert Bragg Signed-off-by: Zhenyu

[RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git

[RFC 3/6] drm/i915: Add static '3D' Haswell OA unit config

Adds a static OA unit, MUX + B Counter configuration for basic '3D' metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 5 ++ drivers/gpu/drm

[RFC 1/6] drm/i915: Add i915 perf infrastructure

types are supported yet so perf_event_open can currently only get as far as returning EINVAL for an unknown event type. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_dma.c | 7 + drivers/gpu/drm/i915/i915_drv.h | 74 +++ drivers/gpu

[RFC 0/6] Non perf based Gen Graphics OA unit driver

Robert Bragg (6): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: Add static '3D' Haswell OA unit config drm/i915: Add i915 perf event for Haswell OA unit drm/i915: Add dev.i915.perf_event_paranoid sysctl option drm/i915: add

[RFC 5/6] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[RFC 4/6] drm/i915: Add i915 perf event for Haswell OA unit

Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[RFC 6/6] drm/i915: add oa_event_min_timer_exponent sysctl

-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_perf.c | 37 - 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index ab82857..5ef7d92 100644 --- a/drivers/g

[RFC 3/6] drm/i915: Add static '3D' Haswell OA unit config

Adds a static OA unit, MUX + B Counter configuration for basic '3D' metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915

[RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h| 2 +- 2 files changed, 3 insertions

[RFC 1/6] drm/i915: Add i915 perf infrastructure

types are supported yet so perf_event_open can currently only get as far as returning EINVAL for an unknown event type. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_dma.c | 7 + drivers/gpu/drm/i915/i915_drv.h

[RFC 0/6] Non perf based Gen Graphics OA unit driver

Robert Bragg (6): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: Add static '3D' Haswell OA unit config drm/i915: Add i915 perf event for Haswell OA unit drm/i915: Add dev.i915.perf_event_paranoid sysctl option drm/i915: add

Re: [Intel-gfx] [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Wed, May 27, 2015 at 4:39 PM, <> wrote: > On Thu, May 21, 2015 at 12:17:48AM +0100, Robert Bragg wrote: >> > >> > So for me the 'natural' way to represent this in perf would be through >> > event groups. Create a perf event for every single event -- yes thi

Re: [Intel-gfx] [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Wed, May 27, 2015 at 4:39 PM, wrote: On Thu, May 21, 2015 at 12:17:48AM +0100, Robert Bragg wrote: So for me the 'natural' way to represent this in perf would be through event groups. Create a perf event for every single event -- yes this is 53 events. So when I was first looking

[RFC PATCH] perf: enable fsync to flush buffered samples

t;8 --- To allow for pmus that may have internal buffering (e.g. the hardware writes out data to a circular buffer which is only periodically forwarded to userspace via perf) this enables userspace to explicitly ensure it has received all samples before a point in time. Signed-off-by: Robert Br

[RFC PATCH] perf: enable fsync to flush buffered samples

--- To allow for pmus that may have internal buffering (e.g. the hardware writes out data to a circular buffer which is only periodically forwarded to userspace via perf) this enables userspace to explicitly ensure it has received all samples before a point in time. Signed-off-by: Robert Bragg rob

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Tue, May 19, 2015 at 3:53 PM, Peter Zijlstra wrote: > On Fri, May 15, 2015 at 02:07:29AM +0100, Robert Bragg wrote: >> On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra wrote: >> > On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote: >> > >> >>

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Tue, May 19, 2015 at 3:53 PM, Peter Zijlstra pet...@infradead.org wrote: On Fri, May 15, 2015 at 02:07:29AM +0100, Robert Bragg wrote: On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra pet...@infradead.org wrote: On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote: I've changed

[RFC PATCH v2] drm/i915: Expose PMU for Observation Architecture

. Only Haswell is supported currently. v2: - fix deadlock in init_oa_buffer error path - EBADF for bad drm fd, EINVAL for failure to lookup ctx - mmio write barriers, after OA reconfigure, before unlocks - use i915_mutex_lock_interruptible within event init Signed-off-by: Robert Bragg

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Fri, May 8, 2015 at 5:21 PM, Peter Zijlstra wrote: > > So I've not yet went through the entire series; but I'm wondering if its > at all possible to re-use some of this work: > > lkml.kernel.org/r/1428453299-19121-1-git-send-email-suka...@linux.vnet.ibm.com > > That's for a Power8 HV call that

[RFC PATCH v2] perf: Add PERF_EVENT_IOC_FLUSH ioctl

error status Signed-off-by: Robert Bragg --- include/linux/perf_event.h | 7 +++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c| 5 + 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index cf1d096

[RFC PATCH] squash: be more careful stopping oacontrol updates

This makes sure we've stopped touching oacontrol before we start resetting OA, PM and clock gating. Shouldn't strictly be needed since we know that oacontrol will have been disabled before we start destroying an event but it seems worth highlighting that update_oacontrol() could still be running

Re: [Intel-gfx] [RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture

On 7 May 2015 15:58, "Chris Wilson" wrote: > > On Thu, May 07, 2015 at 03:15:50PM +0100, Robert Bragg wrote: > > + /* We bypass the default perf core perf_paranoid_cpu() || > > + * CAP_SYS_ADMIN check by using the PERF_PMU_CAP_IS_DEVICE > > + * f

[RFC PATCH] squash: be more careful stopping oacontrol updates

This makes sure we've stopped touching oacontrol before we start resetting OA, PM and clock gating. Shouldn't strictly be needed since we know that oacontrol will have been disabled before we start destroying an event but it seems worth highlighting that update_oacontrol() could still be running

[RFC PATCH v2] perf: Add PERF_EVENT_IOC_FLUSH ioctl

error status Signed-off-by: Robert Bragg rob...@sixbynine.org --- include/linux/perf_event.h | 7 +++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c| 5 + 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Fri, May 8, 2015 at 5:21 PM, Peter Zijlstra pet...@infradead.org wrote: So I've not yet went through the entire series; but I'm wondering if its at all possible to re-use some of this work: lkml.kernel.org/r/1428453299-19121-1-git-send-email-suka...@linux.vnet.ibm.com That's for a Power8

[RFC PATCH v2] drm/i915: Expose PMU for Observation Architecture

. Only Haswell is supported currently. v2: - fix deadlock in init_oa_buffer error path - EBADF for bad drm fd, EINVAL for failure to lookup ctx - mmio write barriers, after OA reconfigure, before unlocks - use i915_mutex_lock_interruptible within event init Signed-off-by: Robert Bragg rob

Re: [Intel-gfx] [RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture

On 7 May 2015 15:58, Chris Wilson ch...@chris-wilson.co.uk wrote: On Thu, May 07, 2015 at 03:15:50PM +0100, Robert Bragg wrote: + /* We bypass the default perf core perf_paranoid_cpu() || + * CAP_SYS_ADMIN check by using the PERF_PMU_CAP_IS_DEVICE + * flag and instead

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra wrote: > On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote: > >> I've changed the uapi for configuring the i915_oa specific attributes >> when calling perf_event_open(2) whereby instead of cramming lo

Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra pet...@infradead.org wrote: On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote: I've changed the uapi for configuring the i915_oa specific attributes when calling perf_event_open(2) whereby instead of cramming lots of bitfields

[RFC PATCH 09/11] drm/i915: Add dev.i915.oa_event_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915

[RFC PATCH 10/11] drm/i915: report OA buf overrun + report lost status

This adds two driver specific PERF_RECORD_DEVICE event types for reporting OA buffer overrun and report lost status bits to userspace. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_oa_perf.c | 53 - include/uapi/drm/i915_drm.h | 27

[RFC PATCH 03/11] perf: Add PERF_EVENT_IOC_FLUSH ioctl

-by: Robert Bragg --- include/linux/perf_event.h | 7 +++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c| 5 + 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1af35b4..69a0cb9 100644 --- a/include/linux

[RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture

. Only Haswell is supported currently. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_dma.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 53 +++ drivers/gpu/drm/i915/i915_gem_context.c | 45 +- drivers/gpu/drm/i915

[RFC PATCH 02/11] perf: Add PERF_PMU_CAP_IS_DEVICE flag

The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare that they only monitor device specific metrics and since they don't monitor any cpu metrics then perf should bypass any cpu centric security checks, as well as disallow cpu centric attributes. Signed-off-by: Robert Bragg

[RFC PATCH 05/11] perf: allow drivers more control over event logging

This exports enough api to allow drivers to output their own PERF_RECORD_DEVICE events. Signed-off-by: Robert Bragg --- include/linux/perf_event.h | 7 +++ kernel/events/core.c| 2 ++ kernel/events/internal.h| 9 - kernel/events/ring_buffer.c | 3 +++ 4 files changed

[RFC PATCH 01/11] perf: export perf_event_overflow

To support pmu drivers in loadable modules, such as the i915 driver Signed-off-by: Robert Bragg --- kernel/events/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/events/core.c b/kernel/events/core.c index 2fabc06..38c240c 100644 --- a/kernel/events/core.c +++ b/kernel/events

[RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

umentation/ observability_performance_counters_haswell.pdf Kind regards, - Robert Robert Bragg (11): perf: export perf_event_overflow perf: Add PERF_PMU_CAP_IS_DEVICE flag perf: Add PERF_EVENT_IOC_FLUSH ioctl perf: Add a PERF_RECORD_DEVICE event type perf: allow drivers more control over event logging drm/i915: rename

[RFC PATCH 11/11] WIP: drm/i915: constrain unit gating while using OA

We are still investigating the detailed requirements here, but there are some constraints we need to apply on unit level clock gating for reliable metrics (in particular for a reliable sampling period). Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_oa_perf.c | 70

[RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git

[RFC PATCH 08/11] drm/i915: add OA config for 3D render counters

This enables access to some additional counters beyond the aggregating A counters, adding a '3D' metric set configuration useful while profiling 3D rendering workloads. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_drv.h | 7 + drivers/gpu/drm/i915/i915_oa_perf.c | 124

[RFC PATCH 04/11] perf: Add a PERF_RECORD_DEVICE event type

To allow for more extensible, device specific, perf record types this adds a generic PERF_RECORD_DEVICE type that can be used by device drivers. Driver developers can then document some driver-specific header to further detail such a record's type. Signed-off-by: Robert Bragg --- include/uapi

[RFC PATCH 01/11] perf: export perf_event_overflow

To support pmu drivers in loadable modules, such as the i915 driver Signed-off-by: Robert Bragg rob...@sixbynine.org --- kernel/events/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/events/core.c b/kernel/events/core.c index 2fabc06..38c240c 100644 --- a/kernel/events/core.c

[RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU

/ observability_performance_counters_haswell.pdf Kind regards, - Robert Robert Bragg (11): perf: export perf_event_overflow perf: Add PERF_PMU_CAP_IS_DEVICE flag perf: Add PERF_EVENT_IOC_FLUSH ioctl perf: Add a PERF_RECORD_DEVICE event type perf: allow drivers more control over event logging drm/i915: rename OACONTROL

[RFC PATCH 05/11] perf: allow drivers more control over event logging

This exports enough api to allow drivers to output their own PERF_RECORD_DEVICE events. Signed-off-by: Robert Bragg rob...@sixbynine.org --- include/linux/perf_event.h | 7 +++ kernel/events/core.c| 2 ++ kernel/events/internal.h| 9 - kernel/events/ring_buffer.c | 3

[RFC PATCH 02/11] perf: Add PERF_PMU_CAP_IS_DEVICE flag

The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare that they only monitor device specific metrics and since they don't monitor any cpu metrics then perf should bypass any cpu centric security checks, as well as disallow cpu centric attributes. Signed-off-by: Robert Bragg rob

[RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture

. Only Haswell is supported currently. Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_dma.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 53 +++ drivers/gpu/drm/i915/i915_gem_context.c | 45 +- drivers

[RFC PATCH 09/11] drm/i915: Add dev.i915.oa_event_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers

[RFC PATCH 03/11] perf: Add PERF_EVENT_IOC_FLUSH ioctl

-by: Robert Bragg rob...@sixbynine.org --- include/linux/perf_event.h | 7 +++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c| 5 + 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1af35b4..69a0cb9 100644

[RFC PATCH 10/11] drm/i915: report OA buf overrun + report lost status

This adds two driver specific PERF_RECORD_DEVICE event types for reporting OA buffer overrun and report lost status bits to userspace. Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu/drm/i915/i915_oa_perf.c | 53 - include/uapi/drm/i915_drm.h

[RFC PATCH 04/11] perf: Add a PERF_RECORD_DEVICE event type

To allow for more extensible, device specific, perf record types this adds a generic PERF_RECORD_DEVICE type that can be used by device drivers. Driver developers can then document some driver-specific header to further detail such a record's type. Signed-off-by: Robert Bragg rob...@sixbynine.org

[RFC PATCH 08/11] drm/i915: add OA config for 3D render counters

This enables access to some additional counters beyond the aggregating A counters, adding a '3D' metric set configuration useful while profiling 3D rendering workloads. Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu/drm/i915/i915_drv.h | 7 + drivers/gpu/drm/i915

[RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h| 2 +- 2 files changed, 3 insertions(+), 3

[RFC PATCH 11/11] WIP: drm/i915: constrain unit gating while using OA

We are still investigating the detailed requirements here, but there are some constraints we need to apply on unit level clock gating for reliable metrics (in particular for a reliable sampling period). Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu/drm/i915/i915_oa_perf.c | 70

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Mon, Nov 10, 2014 at 11:13 AM, Ingo Molnar wrote: > > * Robert Bragg wrote: > >> On Haswell there are 8 different report layouts that basically trade >> off how many counters to include from 13 to 61 32bit counters plus 1 >> 64bit timestamp. I exposed this

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Mon, Nov 10, 2014 at 11:13 AM, Ingo Molnar mi...@kernel.org wrote: * Robert Bragg rob...@sixbynine.org wrote: snip On Haswell there are 8 different report layouts that basically trade off how many counters to include from 13 to 61 32bit counters plus 1 64bit timestamp. I exposed

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Wed, Nov 5, 2014 at 12:33 PM, Peter Zijlstra wrote: > On Mon, Nov 03, 2014 at 09:47:17PM +0000, Robert Bragg wrote: > >> > And do I take it right that if you're able/allowed/etc.. to open/have >> > the fd to the GPU/DRM/DRI whatever context you have the right >>

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Wed, Nov 5, 2014 at 12:33 PM, Peter Zijlstra pet...@infradead.org wrote: On Mon, Nov 03, 2014 at 09:47:17PM +, Robert Bragg wrote: And do I take it right that if you're able/allowed/etc.. to open/have the fd to the GPU/DRM/DRI whatever context you have the right credentials to also

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Thu, Oct 30, 2014 at 7:08 PM, Peter Zijlstra wrote: > On Wed, Oct 22, 2014 at 04:28:48PM +0100, Robert Bragg wrote: >> Our desired permission model seems consistent with perf's current model >> whereby you would need privileges if you want to profile across all gpu >>

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Thu, Oct 30, 2014 at 7:08 PM, Peter Zijlstra pet...@infradead.org wrote: On Wed, Oct 22, 2014 at 04:28:48PM +0100, Robert Bragg wrote: Our desired permission model seems consistent with perf's current model whereby you would need privileges if you want to profile across all gpu contexts

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Thu, Oct 23, 2014 at 6:58 AM, Ingo Molnar wrote: > > * Robert Bragg wrote: > >> [...] >> >> I'd be interested to hear whether is sounds reasonable to >> others for us to expose gpu device metrics via a perf pmu and >> whether adding the PERF_PMU_CAP_IS_

Re: [RFC PATCH 0/3] Expose gpu counters via perf pmu driver

On Thu, Oct 23, 2014 at 6:58 AM, Ingo Molnar mi...@kernel.org wrote: * Robert Bragg rob...@sixbynine.org wrote: [...] I'd be interested to hear whether is sounds reasonable to others for us to expose gpu device metrics via a perf pmu and whether adding the PERF_PMU_CAP_IS_DEVICE flag

Re: [RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

On Thu, Oct 23, 2014 at 8:47 AM, Chris Wilson wrote: > On Wed, Oct 22, 2014 at 04:28:51PM +0100, Robert Bragg wrote: >> + /* XXX: Not sure that this is really acceptable... >> + * >> + * i915_gem_context.c currently owns pinning/unpinning legacy >&g

Re: [RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

On Thu, Oct 23, 2014 at 8:47 AM, Chris Wilson ch...@chris-wilson.co.uk wrote: On Wed, Oct 22, 2014 at 04:28:51PM +0100, Robert Bragg wrote: + /* XXX: Not sure that this is really acceptable... + * + * i915_gem_context.c currently owns pinning/unpinning legacy + * context

[RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer and this patch exposes that capability to userspace via the perf interface. Only Haswell is supported currently. Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/Makefile

[RFC PATCH 2/3] perf: Add PERF_PMU_CAP_IS_DEVICE flag

The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare that they only monitor device specific metrics and since they don't monitor any cpu metrics then perf should bypass any cpu centric security checks, as well as disallow cpu centric attributes. Signed-off-by: Robert Bragg

[RFC PATCH 1/3] perf: export perf_event_overflow

To support pmu drivers in loadable modules, such as the i915 driver Signed-off-by: Robert Bragg --- kernel/events/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/events/core.c b/kernel/events/core.c index 1cf24b3..9449180 100644 --- a/kernel/events/core.c +++ b/kernel/events

[RFC PATCH 0/3] Expose gpu counters via perf pmu driver

Although I haven't seen any precedent for drivers using perf pmus to expose device metrics, I've been experimenting with exposing some of the performance counters of Intel Gen graphics hardware recently and looking to see if it makes sense to build on the perf infrastructure for our use cases.

[RFC PATCH 0/3] Expose gpu counters via perf pmu driver

Although I haven't seen any precedent for drivers using perf pmus to expose device metrics, I've been experimenting with exposing some of the performance counters of Intel Gen graphics hardware recently and looking to see if it makes sense to build on the perf infrastructure for our use cases.

[RFC PATCH 2/3] perf: Add PERF_PMU_CAP_IS_DEVICE flag

The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare that they only monitor device specific metrics and since they don't monitor any cpu metrics then perf should bypass any cpu centric security checks, as well as disallow cpu centric attributes. Signed-off-by: Robert Bragg rob

[RFC PATCH 1/3] perf: export perf_event_overflow

To support pmu drivers in loadable modules, such as the i915 driver Signed-off-by: Robert Bragg rob...@sixbynine.org --- kernel/events/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/events/core.c b/kernel/events/core.c index 1cf24b3..9449180 100644 --- a/kernel/events/core.c

[RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer and this patch exposes that capability to userspace via the perf interface. Only Haswell is supported currently. Signed-off-by: Robert Bragg rob...@sixbynine.org --- drivers/gpu

[PATCH] mm: Don't allow ioremapping of ranges larger than vmalloc space

the system was left with the remainder of the first 16M of space to vmalloc/ioremap within. Signed-off-by: Robert Bragg <[EMAIL PROTECTED]> --- diff --git a/mm/vmalloc.c b/mm/vmalloc.c index af77e17..06a7f3a 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c @@ -216,6 +216,10 @@ static struct vm_

[PATCH] mm: Don't allow ioremapping of ranges larger than vmalloc space

the system was left with the remainder of the first 16M of space to vmalloc/ioremap within. Signed-off-by: Robert Bragg [EMAIL PROTECTED] --- diff --git a/mm/vmalloc.c b/mm/vmalloc.c index af77e17..06a7f3a 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c @@ -216,6 +216,10 @@ static struct vm_struct