U-boot patches up the device tree crypto node for the era property.
Signed-off-by: Ruchika Gupta
---
Changes from v1:
Rearranged the crypto node in alphabetic sorted order as suggested by Shawn
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot
U-boot patches up the device tree crypto node for the era property.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
Changes from v1:
Rearranged the crypto node in alphabetic sorted order as suggested by Shawn
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion
U-boot patches up the device tree crypto node for the era property.
Signed-off-by: Ruchika Gupta
---
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c70bb27..1a99724 100644
--- a/arch/arm
U-boot patches up the device tree crypto node for the era property.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c70bb27
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
it is populated
by the driver, making it read-only as per the DMA API's requirement.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/caamalg.c | 8
drivers/crypto/caam/caamhash.c | 40 +++-
2 files changed, 27 insertions(+), 21 deletions
CAAM IP has certain 64 bit registers . 32 bit architectures cannot force
atomic-64 operations. This patch adds definition of these atomic-64
operations for little endian platforms. The definitions which existed
previously were for big endian platforms.
Signed-off-by: Ruchika Gupta
---
Tested
to be provided. These are provided by
selecting a Job ring in start mode whose parameters would be used for the
DECO access programming.
Signed-off-by: Ruchika Gupta
---
The current patch used the 32 bit register comp_params_ms defined in another
patch.
The link of patch thsi patch
to be provided. These are provided by
selecting a Job ring in start mode whose parameters would be used for the
DECO access programming.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
The current patch used the 32 bit register comp_params_ms defined in another
patch
CAAM IP has certain 64 bit registers . 32 bit architectures cannot force
atomic-64 operations. This patch adds definition of these atomic-64
operations for little endian platforms. The definitions which existed
previously were for big endian platforms.
Signed-off-by: Ruchika Gupta ruchika.gu
it is populated
by the driver, making it read-only as per the DMA API's requirement.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
drivers/crypto/caam/caamalg.c | 8
drivers/crypto/caam/caamhash.c | 40 +++-
2 files changed, 27
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 14 +
drivers
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
drivers/crypto/caam/ctrl.c
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 14 +
drivers
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
drivers/crypto/caam/ctrl.c
,6 +6,7 @@
> */
>
> #include
> +#include
>
> #include "compat.h"
> #include "regs.h"
> --
> 1.8.4.1
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
> the body of a message to majord...@v
of function
'of_iomap' [-Werror=implicit-function-declaration]
In:
commit 313ea293e9c4d1eabcaddd2c0800f083b03c2a2e
Author: Ruchika Gupta ruchika.gu...@freescale.com
crypto: caam - Add Platform driver for Job Ring
We added a reference to of_iomap but did add the necessary include file
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 3 --
drivers/crypto/caam/intern.h | 5
drivers/crypto/caam/jr.c | 67
drivers/crypto/caam/jr.h | 2 --
4 files changed, 77 deletions(-)
diff --git a/drivers/crypto/caam
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
drivers/crypto/caam/ctrl.c | 3 --
drivers/crypto/caam/intern.h | 5
drivers/crypto/caam/jr.c | 67
drivers/crypto/caam/jr.h | 2 --
4 files changed, 77 deletions(-)
diff
Remove the dependency of RNG instantiation on Job Ring. Now
RNG instantiation for devices with RNG version > 4 is done
by directly programming DECO 0.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 74 ++
drivers/crypto/caam/regs.h |
Remove the dependency of RNG instantiation on Job Ring. Now
RNG instantiation for devices with RNG version 4 is done
by directly programming DECO 0.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
---
drivers/crypto/caam/ctrl.c | 74
y been instantiated by
u-boot or boot ROM code.In such SoCs, if RNG is initialized again
SEC would returns "Instantiation error". Hence, the initialization
status of RNG4 should be also checked before doing RNG init.
Signed-off-by: Ruchika Gupta
Signed-off-by: Alex Porosanu
Signed-off-
instantiated by
u-boot or boot ROM code.In such SoCs, if RNG is initialized again
SEC would returns Instantiation error. Hence, the initialization
status of RNG4 should be also checked before doing RNG init.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Alex Porosanu
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