On Tue, Feb 21, 2017 at 12:20 PM, Paul Cercueil wrote:
> Le 2017-02-20 14:56, Linus Walleij a écrit :
>>
>> On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil
>> wrote:
>>
>>> I was thinking that instead of having one pinctrl-ingenic instance
>>> covering
On Tue, Feb 21, 2017 at 12:20 PM, Paul Cercueil wrote:
> Le 2017-02-20 14:56, Linus Walleij a écrit :
>>
>> On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil
>> wrote:
>>
>>> I was thinking that instead of having one pinctrl-ingenic instance
>>> covering
>>> 0x600 of register space, and 6 instances
Le 2017-02-20 14:56, Linus Walleij a écrit :
On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil
wrote:
I was thinking that instead of having one pinctrl-ingenic instance
covering
0x600 of register space, and 6 instances of gpio-ingenic having 0x100
each,
I could just have 6
Le 2017-02-20 14:56, Linus Walleij a écrit :
On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil
wrote:
I was thinking that instead of having one pinctrl-ingenic instance
covering
0x600 of register space, and 6 instances of gpio-ingenic having 0x100
each,
I could just have 6 instances of
On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil wrote:
> I was thinking that instead of having one pinctrl-ingenic instance covering
> 0x600 of register space, and 6 instances of gpio-ingenic having 0x100 each,
> I could just have 6 instances of pinctrl-ingenic, each one with
On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil wrote:
> I was thinking that instead of having one pinctrl-ingenic instance covering
> 0x600 of register space, and 6 instances of gpio-ingenic having 0x100 each,
> I could just have 6 instances of pinctrl-ingenic, each one with an instance
> of
Le 2017-01-31 14:09, Linus Walleij a écrit :
On Tue, Jan 31, 2017 at 11:31 AM, Paul Cercueil
wrote:
[Rob]:
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there should
Le 2017-01-31 14:09, Linus Walleij a écrit :
On Tue, Jan 31, 2017 at 11:31 AM, Paul Cercueil
wrote:
[Rob]:
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there should only be 1 node.
On Tue, Jan 31, 2017 at 11:31 AM, Paul Cercueil wrote:
> [Rob]:
>> From the overlapping register addresses in the examples and this
>> description, it looks like the pinctrlr and gpio controller are 1 block.
>> If so, then there should only be 1 node.
>
> Well, that's what I
On Tue, Jan 31, 2017 at 11:31 AM, Paul Cercueil wrote:
> [Rob]:
>> From the overlapping register addresses in the examples and this
>> description, it looks like the pinctrlr and gpio controller are 1 block.
>> If so, then there should only be 1 node.
>
> Well, that's what I had until Linus W.
Hi,
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there should only be 1 node.
Well, that's what I had until Linus W. just told me to do the opposite:
Just pull all these down two
Hi,
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there should only be 1 node.
Well, that's what I had until Linus W. just told me to do the opposite:
Just pull all these down two
On Wed, Jan 25, 2017 at 07:51:54PM +0100, Paul Cercueil wrote:
> This commit adds documentation for the devicetree bidings of the
> pinctrl-ingenic driver, which handles pin configuration and pin
> muxing of the Ingenic SoCs currently supported by the Linux kernel.
>
> Signed-off-by: Paul
On Wed, Jan 25, 2017 at 07:51:54PM +0100, Paul Cercueil wrote:
> This commit adds documentation for the devicetree bidings of the
> pinctrl-ingenic driver, which handles pin configuration and pin
> muxing of the Ingenic SoCs currently supported by the Linux kernel.
>
> Signed-off-by: Paul
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil
---
.../bindings/pinctrl/ingenic,pinctrl.txt
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil
---
.../bindings/pinctrl/ingenic,pinctrl.txt | 77
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