On Wed, 27 Aug 2014, Mark Rutland wrote:
> On Wed, Aug 27, 2014 at 02:37:44PM +0100, Marc Zyngier wrote:
> > We need to work out how to drive the whole stacking from a DT
> > perspective: Mark, any idea?
>
> Describing the lines the magic irqchip has to its parent irqchip is
> simple, the
On Wed, Aug 27, 2014 at 02:37:44PM +0100, Marc Zyngier wrote:
> [Adding Jiang Liu to the spam-fest]
>
> Hi Thomas,
>
> On Wed, Aug 27 2014 at 1:23:48 pm BST, Thomas Gleixner
> wrote:
> > On Wed, 27 Aug 2014, Marc Zyngier wrote:
> >> > As in the DT the actual IRQ polarity should be used,
On Wed, 27 Aug 2014, Marc Zyngier wrote:
> I very much like that kind of approach. Stacking domains seems to solve
> a number of issues at once:
>
> - NVIDIA's gic extension
> - TI's crossbar
> - ARM's GICv2m
> - Mediatek's glorified line inverter
> - ... and probably the next madness that's
On Wed, 27 Aug 2014, Marc Zyngier wrote:
> > As in the DT the actual IRQ polarity should be used, simply configuring
> > the HW IRQ polarity in the bootloader is not enough without telling the
> > GIC driver which polarity is supported on which IRQ, right?
>
> Looking a bit closer at things, what
Hi Jan,
On 27/08/14 10:55, Jan Lübbe wrote:
> Marc,
>
> On Fri, 2014-08-22 at 12:09 +0100, Marc Zyngier wrote:
>> Here, you're using it to program something that sits between the
>> device and the GIC. This is a separate block, with its own hardware
>> configuration, that modifies the interrupt
Marc,
On Fri, 2014-08-22 at 12:09 +0100, Marc Zyngier wrote:
> Here, you're using it to program something that sits between the
> device and the GIC. This is a separate block, with its own hardware
> configuration, that modifies the interrupt signal. This should be
> reflected in the device-tree
Marc,
On Fri, 2014-08-22 at 12:09 +0100, Marc Zyngier wrote:
Here, you're using it to program something that sits between the
device and the GIC. This is a separate block, with its own hardware
configuration, that modifies the interrupt signal. This should be
reflected in the device-tree and
Hi Jan,
On 27/08/14 10:55, Jan Lübbe wrote:
Marc,
On Fri, 2014-08-22 at 12:09 +0100, Marc Zyngier wrote:
Here, you're using it to program something that sits between the
device and the GIC. This is a separate block, with its own hardware
configuration, that modifies the interrupt signal.
On Wed, 27 Aug 2014, Marc Zyngier wrote:
As in the DT the actual IRQ polarity should be used, simply configuring
the HW IRQ polarity in the bootloader is not enough without telling the
GIC driver which polarity is supported on which IRQ, right?
Looking a bit closer at things, what you
On Wed, 27 Aug 2014, Marc Zyngier wrote:
I very much like that kind of approach. Stacking domains seems to solve
a number of issues at once:
- NVIDIA's gic extension
- TI's crossbar
- ARM's GICv2m
- Mediatek's glorified line inverter
- ... and probably the next madness that's going to
On Wed, Aug 27, 2014 at 02:37:44PM +0100, Marc Zyngier wrote:
[Adding Jiang Liu to the spam-fest]
Hi Thomas,
On Wed, Aug 27 2014 at 1:23:48 pm BST, Thomas Gleixner t...@linutronix.de
wrote:
On Wed, 27 Aug 2014, Marc Zyngier wrote:
As in the DT the actual IRQ polarity should be used,
On Wed, 27 Aug 2014, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 02:37:44PM +0100, Marc Zyngier wrote:
We need to work out how to drive the whole stacking from a DT
perspective: Mark, any idea?
Describing the lines the magic irqchip has to its parent irqchip is
simple, the standard
Hi Joe,
On 13/08/14 03:11, Joe.C wrote:
> From: "Joe.C"
>
> GIC supports the combination with external extensions. But this
> is not reflected in the checks of the interrupt type flag.
> This patch allows interrupt types other than the one supported by GIC,
> if an architecture extension is
Hi Joe,
On 13/08/14 03:11, Joe.C wrote:
From: Joe.C yingjoe.c...@mediatek.com
GIC supports the combination with external extensions. But this
is not reflected in the checks of the interrupt type flag.
This patch allows interrupt types other than the one supported by GIC,
if an architecture
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