This patch provides all required callbacks required by the generic
get_user_pages_fast() code and switches x86 over - and removes
the platform specific implementation.
Signed-off-by: Kirill A. Shutemov
---
arch/arm/Kconfig | 2 +-
On x86, 5-level paging enables 56-bit userspace virtual address space.
Not all user space is ready to handle wide addresses. It's known that
at least some JIT compilers use higher bits in pointers to encode their
information. It collides with valid pointers with 5-level paging and
leads to
Most of things are in place and we can enable support of 5-level paging.
The patch makes XEN_PV dependent on !X86_5LEVEL. XEN_PV is not ready to
work with 5-level paging.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/Kconfig | 5 +
arch/x86/xen/Kconfig
Populate additional page table level if CONFIG_X86_5LEVEL is enabled.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/mm/init_64.c | 69 ---
1 file changed, 60 insertions(+), 9 deletions(-)
diff --git
On Tue, May 23, 2017 at 08:39:11AM +0200, Michal Hocko wrote:
>On Tue 23-05-17 11:27:05, Wei Yang wrote:
>> On Thu, May 18, 2017 at 11:06:37AM +0200, Michal Hocko wrote:
>> >On Wed 17-05-17 22:11:40, Wei Yang wrote:
>> >> This patch serial could be divided into two parts.
>> >>
>> >> First three
Hi,
I've made the current interface work with all types of our sandboxes.
For setuid the secret souse was prctl(PR_SET_DUMPABLE, 1, 0, 0, 0) to
make /proc entries non-root owned. So I am fine with the current
version of the code.
Andrew,
I see that this is already in linux-next. Please proceed
/Ian-Abbott/asm-generic-bug-h-declare-struct-pt_regs-before-function-prototype/20170524-070310
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All error/warnings
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1
Hi Lorenzo,
On 05/23/2017 06:06 PM, Lorenzo Pieralisi wrote:
[+Al]
On Tue, May 23, 2017 at 05:40:28PM +0100, Julien Grall wrote:
Hi all,
I am currently looking at adding support of ACPI 5.1 in Xen.
When trying to boot DOM00 I get a panic in Linux (for the full
log see [1]):
(XEN) DOM0: [
On Wed 24-05-17 13:39:48, Mike Rapoport wrote:
> On Wed, May 24, 2017 at 09:58:06AM +0200, Vlastimil Babka wrote:
> > On 05/24/2017 09:50 AM, Mike Rapoport wrote:
> > > On Mon, May 22, 2017 at 05:52:47PM +0200, Vlastimil Babka wrote:
> > >> On 05/22/2017 04:29 PM, Mike Rapoport wrote:
> > >>>
> >
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 83
On 23.05.2017 11:18, Nikita Yushchenko wrote:
Reset GPIO is active low.
Currently driver uses gpiod_set_value(1) to clean reset, which depends
on device tree to contain GPIO_ACTIVE_HIGH - that does not match reality.
This fixes driver to use _raw version of gpiod_set_value() to enforce
Hi Palmer,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12-rc2]
[cannot apply to next-20170524]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Palmer-Dabbelt/lib-Add
On 05/24/2017 12:39 PM, Mike Rapoport wrote:
>> Hm so the prctl does:
>>
>> if (arg2)
>> me->mm->def_flags |= VM_NOHUGEPAGE;
>> else
>> me->mm->def_flags &= ~VM_NOHUGEPAGE;
>>
>> That's rather lazy implementation IMHO.
On Wed, May 24, 2017 at 10:50:53AM +0100, Juri Lelli wrote:
> Agreed. However, problem seems to be that
>
> - in my opinion (current implementation) this translated into scaling
>runtime considering current freq and cpu-max-capacity; and this is
>required when frequency scaling is
On 2017/5/24 18:32, Vlastimil Babka wrote:
> On 05/24/2017 10:32 AM, Yisheng Xie wrote:
>> Hi Kefeng,
>> Could you please try this patch.
>>
>> Thanks
>> Yisheng Xie
>> -
>> From a70ae975756e8e97a28d49117ab25684da631689 Mon Sep 17 00:00:00 2001
>> From: Yisheng Xie
On Monday, May 22, 2017 2:11:58 PM CEST Namhyung Kim wrote:
> On Thu, May 18, 2017 at 09:34:11PM +0200, Milian Wolff wrote:
> > Instead of showing the (repeated) DSO name of the non-inlined
> > frame, we now show the "(inlined)" suffix instead.
> >
> > Before:
> >214f7
Hi Palmer,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12-rc2]
[cannot apply to next-20170524]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Palmer-Dabbelt/lib-Add
Hi Ioana,
Debatable nit inline.
On 05/24/2017 03:13 PM, Ioana Radulescu wrote:
> Use the correct mechanisms for translating a DMA-mapped IOVA
> address into a virtual one. Without this fix, once SMMU is
> enabled on Layerscape platforms, the Ethernet driver throws
> IOMMU translation faults.
>
>
From: Icenowy Zheng
Allwinner V3s features an analog codec without MBIAS pin.
Split out this part, in order to prepare for the V3s analog codec.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Fixed a missing line in v2.
On Tue, May 23, 2017 at 06:18:37PM -0500, Gustavo A. R. Silva wrote:
> Add null check to avoid a potential null pointer dereference.
>
> Addresses-Coverity-ID: 1408831
> Signed-off-by: Gustavo A. R. Silva
Acked-by: Pablo Neira Ayuso
This is a fix
Sorry, I missed this thread,
On Tue, 16 May 2017 09:07:08 -0400
Steven Rostedt wrote:
> On Tue, 16 May 2017 05:23:54 -0700
> "Paul E. McKenney" wrote:
>
> > On Tue, May 16, 2017 at 08:22:33AM +0200, Ingo Molnar wrote:
> > >
> > > * Paul E.
Hi Randy,
Am Sonntag, 7. Mai 2017, 22:26:27 CEST schrieb Randy Li:
> The only adc button connected to adc input is recovery button.
>
> Signed-off-by: Randy Li
> ---
> arch/arm/boot/dts/rk3288-firefly-reload.dts | 17 +
> arch/arm/boot/dts/rk3288-firefly.dtsi
The Lichee Pi Zero Dock board has an audio jack and an onboard MIC.
Enable them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+ Adding back to CC x86 guys - as I've removed in ping messages.
On 05/23/2017 11:09 PM, Russell King - ARM Linux wrote:
On Thu, May 18, 2017 at 02:13:29PM +0300, Dmitry Safonov wrote:
On 04/25/2017 08:18 PM, Dmitry Safonov wrote:
On 04/14/2017 04:25 PM, Dmitry Safonov wrote:
CRIU restores
From: Icenowy Zheng
Allwinner V3s SoC features a DMA engine.
Add it in the DTSI file.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v3:
- Added Chen-Yu's ACK.
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1 file
On Wed, May 24, 2017 at 09:32:43AM +0100, Lee Jones wrote:
> Plan is to push this through the MFD tree.
Great, thanks.
> Do you want a PR for this one?
Ideally but it's not super urgent if (I've started handling these by
keeping a note of the pull information and only merging if there's an
On Wed, May 24, 2017 at 06:05:58PM +0800, Icenowy Zheng wrote:
> Allwinner V3s features a audio codec with dedicated digital and analog parts,
> like the ones on A23/H3, but much simpler (lack of MIC2, LINE IN and MBIAS).
>
> Add support for it.
>
> In order to make the codec usable, DMA support
Fixed Arnd email now..
On Wed, May 24, 2017 at 04:10:08PM +0530, Vinod Koul wrote:
> On Wed, May 24, 2017 at 06:05:58PM +0800, Icenowy Zheng wrote:
> > Allwinner V3s features a audio codec with dedicated digital and analog
> > parts,
> > like the ones on A23/H3, but much simpler (lack of MIC2,
On 05/24/2017 12:32 PM, Vlastimil Babka wrote:
>
> Weird, I can reproduce the issue on my desktop's 4.11 distro kernel, but
> not in qemu and small kernel build, for some reason. So I couldn't test
Ah, Tetsuo's more aggressive testcase worked and I can confirm the fix.
However this would be
Check that the NFC_ATTR_TARGET_INDEX and NFC_ATTR_PROTOCOLS attributes (in
addition to NFC_ATTR_DEVICE_INDEX) are provided by the netlink client
prior to accessing them. This prevents potential unhandled NULL pointer
dereference exceptions which can be triggered by malicious user-mode
programs, if
On Tue, May 23, 2017 at 03:40:24PM +0100, Jose Abreu wrote:
> Hi Daniel,
>
>
> On 22-05-2017 16:31, Daniel Vetter wrote:
> > On Mon, May 22, 2017 at 09:56:00AM +0200, Daniel Vetter wrote:
> >> On Fri, May 19, 2017 at 01:52:09AM +0100, Jose Abreu wrote:
> >>> This series is a follow up from the
Allwinner V3s have two PWM channels, the first channel can be only at
PB4 pin, and the second channel PB5.
Add their pinmux configurations.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
The 40-pin LCD connector on Lichee Pi Zero has backlight pins, which is
controlled by the PWM0 controller of the V3s SoC, and the controlling
part is on the board.
Add the PWM and backlight device nodes in the device tree file, but
leave them disabled, as they can only be useful when the LCD is
As we have already the support for the PWM controller on V3s SoC, add
its device node in the SoC's DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi
On Wed, May 24, 2017 at 05:47:13AM -0700, Guenter Roeck wrote:
> On 05/24/2017 12:03 AM, Greg Kroah-Hartman wrote:
> > 54 passed? I had a bug here such that all x86 builds were crashing, in
> > the core tty layer, which seems odd that anything would be able to boot
> > with this tree...
> Final
Tobias Klauser wrote:
> frv's asm/device.h is merely including asm-generic/device.h. Thus, the
> arch specific header can be omitted and the generic header can be used
> directly.
>
> Signed-off-by: Tobias Klauser
Reviewed-by: David Howells
On Amlogic GX SoCs, there is two CEC controllers :
- An Amlogic CEC custom in the AO domain
- The Synopsys HDMI-TX Controller in the EE domain
Each of these controllers needs a 32.768KHz clock, but there is two paths :
- In the EE domain, the "32k_clk" this patchs is adding
- In the AO domain,
Past ramblings archived at
https://www.spinics.net/lists/arm-kernel/msg581128.html
Hello IRQ maintainers,
I'd like to ask for your help writing an interrupt controller
driver. So far, level interrupts work, but edge interrupts
apparently don't.
I'll recap the situation with a diagram.
Some old touchapd FWs have interrupt issue after FW updating.
Use reading 34 bytes before IC reset command to clean INT stauts
The modification has been tested in some chromebook system
It should not affect general touchpad in Linux system.
Signed-off-by: KT Liao
---
This patch adds support for 5-level paging during early boot.
It generalizes boot for 4- and 5-level paging on 64-bit systems with
compile-time switch between them.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/boot/compressed/head_64.S | 23
Short story:
Without these patches coherent DMA is broken for András and Alexandre,
so they cannot safely enable DMA on their platforms.
Patches have been circulated on a list since last year without much
attention to changes in dma-coherent.c and dma-noop.c. Meanwhile, ARM
bits have been
Commit-ID: d52e7d5a952c5e35783f96e8c5b7fcffbb0d7c60
Gitweb: http://git.kernel.org/tip/d52e7d5a952c5e35783f96e8c5b7fcffbb0d7c60
Author: Baoquan He
AuthorDate: Sat, 13 May 2017 13:46:28 +0800
Committer: Ingo Molnar
CommitDate: Wed, 24 May 2017 09:50:27
On 24/05/17 11:00, Robin Murphy wrote:
> On 23/05/17 20:15, Mason wrote:
>> On 23/05/2017 20:03, Robin Murphy wrote:
>>> On 23/05/17 18:54, Mason wrote:
On 23/05/2017 19:03, Bjorn Helgaas wrote:
> On Wed, May 17, 2017 at 04:56:08PM +0200, Marc Gonzalez wrote:
>> On 20/04/2017 16:28,
In case cpu could not be found the error message would always refer to
/codec/ not being found in DT. Fix this by catching the cpu node not found
case explicitly.
Signed-off-by: Julian Scheel
---
sound/soc/generic/simple-card.c | 8 +++-
1 file changed, 7 insertions(+), 1
On Wed, May 24, 2017 at 6:06 PM, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Originally we enable a special gate bit when the compatible indicates
> A23/33.
>
> But according to BSP sources and user manuals, more SoCs will need this
> gate bit.
>
> So make
Commit-ID: 7e6091209f7f73e2a81943020793b5ad26d645c6
Gitweb: http://git.kernel.org/tip/7e6091209f7f73e2a81943020793b5ad26d645c6
Author: Jan Kiszka
AuthorDate: Tue, 23 May 2017 18:27:54 +0200
Committer: Ingo Molnar
CommitDate: Wed, 24 May 2017
R/M classes of cpus can have memory covered by MPU which in turn might
configure RAM as Normal i.e. bufferable and cacheable. It breaks
dma_alloc_coherent() and friends, since data can stuck in caches now
or be buffered.
This patch factors out DMA support for NOMMU configuration into
separate
Commit-ID: ebd574994c63164d538a197172157318f58ac647
Gitweb: http://git.kernel.org/tip/ebd574994c63164d538a197172157318f58ac647
Author: Josh Poimboeuf
AuthorDate: Tue, 23 May 2017 10:37:29 -0500
Committer: Ingo Molnar
CommitDate: Wed, 24 May 2017
DMA operations for NOMMU case have been just factored out into
separate compilation unit, so don't keep dead code.
Tested-by: Benjamin Gaignard
Tested-by: Andras Szemzo
Tested-by: Alexandre TORGUE
Signed-off-by: Vladimir
This patch adds a simple implementation of mmap to dma_noop_ops.
Cc: Joerg Roedel
Cc: Christian Borntraeger
Reported-by: Benjamin Gaignard
Tested-by: Benjamin Gaignard
Tested-by: Andras Szemzo
Even though dma-noop-ops assumes 1:1 memory mapping DMA memory range
can be different to RAM. For example, ARM STM32F4 MCU offers the
possibility to remap SDRAM from 0xc000_ to 0x0 to get CPU
performance boost, but DMA continue to see SDRAM at 0xc000_. This
difference in mapping is handled
On Tue, May 23, 2017 at 05:30:43PM +, mario.limoncie...@dell.com wrote:
> (Sorry my email client is not going to wrap these at 80 columns)o
That's fine. It is more readable this way :)
> [0.467319] pci :00:1c.0: [8086:9d10] type 01 class 0x060400
> [0.467389] pci :00:1c.0:
On 05/24/2017 11:29 AM, Abdul Haleem wrote:
> Hi
>
> commit cf22cd5f3a: dm crypt: add cryptographic data integrity protection
> suspected to be bad.
Isn't this false positive? That commit changes only dm-crypt and that module
seems not to be even loaded...
(Moreover config has disabled block
Michael Bringmann writes:
> On 05/23/2017 04:49 PM, Reza Arbab wrote:
>> On Tue, May 23, 2017 at 03:05:08PM -0500, Michael Bringmann wrote:
>>> On 05/23/2017 10:52 AM, Reza Arbab wrote:
On Tue, May 23, 2017 at 10:15:44AM -0500, Michael Bringmann wrote:
> +static
Hi Palmer,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12-rc2 next-20170524]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Palmer-Dabbelt/lib-Add-shared-copies-of-some
Hi Palmer,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12-rc2]
[cannot apply to next-20170524]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Palmer-Dabbelt/lib-Add
From: Icenowy Zheng
The V3s SoC features an analog codec with headphone support but without
mic2 and linein.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt | 1 +
From: Steve Capper
As we regularly check for contiguous pte's in the huge accessors, remove
this extra check from find_num_contig.
Cc: David Woods
Signed-off-by: Steve Capper
[ Resolved rebase conflicts due to patch re-ordering
On 05/24/2017 01:38 PM, Xishi Qiu wrote:
>>
>> Race condition with what? Who else would isolate our pages?
>>
>
> Hi Vlastimil,
>
> I find the root cause, if the page was not cached on the current cpu,
> lru_add_drain() will not push it to LRU. So we should handle fail
> case in
Hi,
This patchset updates the hugetlb code to fix issues arising from
contiguous pte hugepages (such as on arm64). Compared to v3, This
version addresses a build failure on arm64 by including two cleanup
patches. Other than the arm64 cleanups, the rest are generic code
changes. The remaining
> Il giorno 23 mag 2017, alle ore 21:42, Tejun Heo ha scritto:
>
> Hello, Paolo.
>
> On Sat, May 20, 2017 at 09:27:33AM +0200, Paolo Valente wrote:
>> Consider a process or a group that is moved from a given source group
>> to a different group, or simply removed from a group
On Wed, May 24, 2017 at 2:02 AM, Masahiro Yamada
wrote:
> Most of DT files in ARM use #include "..." to make pre-processor
> include DT in the same directory, but we have some exceptional files
> that use #include <...> for that.
>
> Fix them to remove
On 2017/5/24 19:52, Vlastimil Babka wrote:
> On 05/24/2017 01:38 PM, Xishi Qiu wrote:
>>>
>>> Race condition with what? Who else would isolate our pages?
>>>
>>
>> Hi Vlastimil,
>>
>> I find the root cause, if the page was not cached on the current cpu,
>> lru_add_drain() will not push it to LRU.
Hi,
> From: Yoshihiro Shimoda
> Sent: Wednesday, May 24, 2017 9:04 PM
>
> The USB 3.0 PHY modules of R-Car Gen3 SoCs have:
> - Spread spectrum clock (ssc).
> - Using USB 2.0 EXTAL clock instead of USB 3.0 clock.
> - Enabling VBUS detection for usb3.0 peripheral.
>
> So, this driver supports
Use the correct mechanisms for translating a DMA-mapped IOVA
address into a virtual one. Without this fix, once SMMU is
enabled on Layerscape platforms, the Ethernet driver throws
IOMMU translation faults.
Signed-off-by: Nipun Gupta
Signed-off-by: Ioana Radulescu
WRIOP hardware may need to write to the hardware annotation
area of Tx buffers (e.g. frame status bits) and also to
the data area (e.g. L4 checksum in frame header).
Map these buffers as DMA_BIDIRECTIONAL, otherwise the
write transaction through SMMU will not be allowed.
Signed-off-by: Nipun
On Tue, May 23, 2017 at 12:27 PM, Chanwoo Choi wrote:
> Hi Hans,
>
> I'm sorry for late reply.
> I'll check this thread and then give you my opinion.
Just don't forget to Cc your mails to USB Type-C people (Heikki et al).
--
With Best Regards,
Andy Shevchenko
On Wed, May 24, 2017 at 05:20:45PM +0800, CK Hu wrote:
> On Tue, 2017-05-23 at 15:12 +0200, Daniel Vetter wrote:
> > On Tue, May 23, 2017 at 05:28:15PM +0800, CK Hu wrote:
> > > Hi, Bibby:
> > >
> > > I've applied this patch to my branch mediatek-drm-fixes-4.12-rc1,
> > > thanks.
> > >
> > >
Hi,
I am continuing to cleanup the memory hotplug code and
CONFIG_MOVABLE_NODE seems dubious at best. The following two patches
simply removes the flag and make it de-facto always enabled.
The current semantic of the config option is twofold 1) it automatically
binds hotplugable nodes to have
From: Michal Hocko
74d42d8fe146 ("memory_hotplug: ensure every online node has NORMAL
memory") has added can_offline_normal which checks the amount of
memory in !movable zones as long as CONFIG_MOVABLE_NODE is disable.
It disallows to offline memory if there is nothing left with
From: Michal Hocko
20b2f52b73fe ("numa: add CONFIG_MOVABLE_NODE for movable-dedicated
node") has introduced CONFIG_MOVABLE_NODE without a good explanation on
why it is actually useful. It makes a lot of sense to make movable node
semantic opt in but we already have that because
In the current form of the code, if a->replacementlen is 0, the reference
to *insnbuf for comparison touches potentially garbage memory. While it
doesn't affect the execution flow due to the subsequent a->replacementlen
comparison, it is (rightly) detected as use of uninitialized memory by a
Hello,
This issue occurs on VIA Epia M910E.
Both interfaces suffer from this.
Setting msglvl with ethtool has no effect on the info the driver
provides on any issues.
So how to proceed from here?
If this is a software issue, which I cannot determine, the driver is
useless in its present state.
On Wed, May 24, 2017 at 02:51:20PM +0200, Mateusz Jurczyk wrote:
> In the current form of the code, if a->replacementlen is 0, the reference
> to *insnbuf for comparison touches potentially garbage memory. While it
> doesn't affect the execution flow due to the subsequent a->replacementlen
>
Add basic support for Cortina PHY drivers. Support only CS4340 for now.
The phys are not compatible with IEEE 802.3 clause 45 registers. Implement
proper read_status support, so that phy polling does not cause bus
register access errors.
The driver should be described using the "ethernet-phy-id"
On Wed, May 24, 2017 at 01:15:47AM +0300, Rakesh Pandit wrote:
> Commit c5f6ce97c1210 tries to address multiple resets but fails as
> work_busy doesn't involve any synchronization and can fail. This is
> reproducible easily as can be seen by WARNING below which is triggered
> with line:
>
>
ould be pretty close to the armada-388-db. I can make my dts available
> if it's helpful.
Still works on 4.12-rc2. Fails on next-20170524.
This appears to be due to commit b566d9c055de ("mtd: nand: add support
for Micron on-die ECC"). Which based on the description seems intentional.
Si
On Tue, May 23, 2017 at 11:45 PM, Babu Moger wrote:
> Found this problem while enabling queued rwlock on SPARC.
> The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the
> specific byte in qrwlock structure. Without this parameter,
> we clear the wrong byte. Here is the
On 23/05/17 20:15, Mason wrote:
> On 23/05/2017 20:03, Robin Murphy wrote:
>> On 23/05/17 18:54, Mason wrote:
>>> On 23/05/2017 19:03, Bjorn Helgaas wrote:
On Wed, May 17, 2017 at 04:56:08PM +0200, Marc Gonzalez wrote:
> On 20/04/2017 16:28, Marc Gonzalez wrote:
>
>> +static int
A somewhat overdue update of the address for sending patches on Wolfson
parts to since our acquision a couple of years ago by Cirrus Logic.
Signed-off-by: Charles Keepax
---
Not 100% sure you are the best person to send this to Mark, but felt
like the right
The xinfo member of struct wm_coeff_ctl_ops is never used.
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm_adsp.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index a7dc760..5aff83b
The shift member of struct soc_mixer_control is unsigned int.
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm_adsp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index
Hi,
This series adds doorbell support to ARM MHU mailbox controller driver.
Since we need to callback the different client based on the doorbel bits
triggered from the remote, we can manage with single channel for the set
of 32 doorbells.
Regards,
Sudeep
v1->v2:
- Removed the notion od
In order to support doorbells, we need a bit of reword around data
structures that are per-channel. Since the number of doorbells are
not fixed though restricted to maximum of 20, the channel assignment
and initialization is move to xlate function.
This patch also adds the platform data for the
The ARM MHU has mechanism to assert interrupt signals to facilitate
inter-processor message based communication. It drives the signal using
a 32-bit register, with all 32-bits logically ORed together. It also
enables software to set, clear and check the status of each of the bits
of this register
This patch just re-orders some of the headers includes and also drop
the ones that are unnecessary.
Cc: Alexey Klimov
Cc: Jassi Brar
Signed-off-by: Sudeep Holla
---
drivers/mailbox/arm_mhu.c | 11 ---
1 file
Hi Fabio,
On 23 May 2017 17:26 Fabio Estevam wrote:
> Subject: Re: [PATCH V1] serial: imx: revert setup DCEDTE early and ensure DCD
> and RI irqs to be off
> On Tue, May 23, 2017 at 9:17 AM, Steve Twiss wrote:
> >
> > Revert the commit e61c38d85b7392e ("serial: imx: setup DCEDTE early and
> >
On 05/24/2017 10:32 AM, Yisheng Xie wrote:
> Hi Kefeng,
> Could you please try this patch.
>
> Thanks
> Yisheng Xie
> -
> From a70ae975756e8e97a28d49117ab25684da631689 Mon Sep 17 00:00:00 2001
> From: Yisheng Xie
> Date: Wed, 24 May 2017 16:01:24 +0800
>
On Wed, May 24, 2017 at 09:58:06AM +0200, Vlastimil Babka wrote:
> On 05/24/2017 09:50 AM, Mike Rapoport wrote:
> > On Mon, May 22, 2017 at 05:52:47PM +0200, Vlastimil Babka wrote:
> >> On 05/22/2017 04:29 PM, Mike Rapoport wrote:
> >>>
> >>> Probably I didn't explained it too well.
> >>>
> >>>
On Wed, May 24, 2017 at 12:28:21PM +0200, Lukas Wunner wrote:
> On Thu, May 18, 2017 at 05:38:56PM +0300, Mika Westerberg wrote:
> > Thunderbolt fabric consists of one or more switches. This fabric is
> > called domain and it is controlled by an entity called connection
> > manager. The connection
Am Sonntag, 7. Mai 2017, 20:00:42 CEST schrieb Paul Kocialkowski:
> Hi,
>
> Le lundi 01 mai 2017 à 08:49 -0700, Doug Anderson a écrit :
> > On Mon, May 1, 2017 at 7:07 AM, Heiko Stuebner wrote:
> > > Am Sonntag, 30. April 2017, 22:56:52 CEST schrieb Paul Kocialkowski:
> > > > Le
On Wed, May 24, 2017 at 3:46 PM, Sudeep Holla wrote:
>
> Hi,
>
> This series adds doorbell support to ARM MHU mailbox controller driver.
> Since we need to callback the different client based on the doorbel bits
> triggered from the remote, we can manage with single channel
On Wed, May 24, 2017 at 10:15:26AM +0200, Thomas Gleixner wrote:
> From: Sebastian Andrzej Siewior
>
> stp_work_fn() holds get_online_cpus() while invoking stop_machine().
>
> stop_machine() invokes get_online_cpus() as well. This is correct, but
> prevents the conversion
On Wednesday, May 24, 2017 4:13 AM, Xiaowei Song wrote:
>
> Hisilicon PCIe Driver shares the common functions for PCIe dw-host
>
> The poweron functions is developed on hi3660 SoC,
> while Others Functions are common for Kirin series SoCs.
>
> Low power mode(L1 sub-state and Suspend/Resume),
On Wednesday, May 24, 2017 4:13 AM, Xiaowei Song wrote:
>
> Before Version Patches
> ==
>
> patch V4
> https://www.spinics.net/lists/linux-pci/msg61406.html
>
> patch V3
> https://www.spinics.net/lists/linux-pci/msg61399.html
Hi Xiaowei Song,
I think that you need to
On Wed, May 24, 2017 at 12:01:51PM +0200, Luca Abeni wrote:
> > > So I'm terribly confused...
> > >
> > > By using the active bandwidth to select frequency we effectively
> > > reduce idle time (to 0 if we had infinite granular frequency steps
> > > and no margins).
> > >
> > > So !RECLAIM works
Allwinner V3s has an analog codec without MIC2 and Line In, which will
need a special set of mixer controls/widgets/routes, otherwise meaningless
controls will be exported to userspace and confuse the user.
Add the special set, and use it when the SoC has no MIC2 and Line In.
Signed-off-by:
I'm shocked this somehow made it into the commit. I wonder how that happened?
Anyway, fixed in my git repo, and will be part of the next series.
(Unless DaveM wants to fix it up trivially when/if he merges this v9,
which would be faster.)
Barring that, does this look good to you? Could I have
ext4_xattr_block_set() calls dquot_alloc_block() to charge for an xattr
block when new references are made. However if dquot_initialize() hasn't
been called on an inode, request for charging is effectively ignored
because ext4_inode_info->i_dquot is not initialized yet.
Add dquot_initialize() to
1 - 100 of 2206 matches
Mail list logo