Linus,
Please pull the latest efi-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
efi-urgent-for-linus
# HEAD: 7425826f4f7ac60f2538b06a7f0a5d1006405159 efi/bgrt: Skip
efi_bgrt_init() in case of non-EFI boot
Misc fixes:
- three boot crash
On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> > Unfortunately, converting all page tables to 4k pgste page tables is
> > not possible without provoking various race conditions.
>
> That is one approach we tried and was found to be buggy. The point is that
> you are not
On 2017-05-31 23:23, Stephen Boyd wrote:
On 05/30, Kiran Gunda wrote:
From: Subbaraman Narayanamurthy
Currently, cleanup_irq() is invoked when a peripheral's interrupt
fires and there is no mapping present in the interrupt domain of
spmi interrupt controller.
The
On 2.06.2017 02:02, Yu Zhao wrote:
> mem_cgroup_resize_limit() and mem_cgroup_resize_memsw_limit() have
> identical logics. Refactor code so we don't need to keep two pieces
> of code that does same thing.
>
> Signed-off-by: Yu Zhao
> ---
> mm/memcontrol.c | 71
>
This implements the setup of RS232 and the switch-over to RS485 or RS422
for the Siemens IOT2040. That uses an EXAR XR17V352 with external logic
to switch between the different modes. The external logic is controlled
via MPIO pins of the EXAR controller.
Only pin 10 can be exported as GPIO on the
On Thu, Jun 01, 2017 at 07:03:34PM -0700, Alexei Starovoitov wrote:
> diff --git a/kernel/bpf/arraymap.c b/kernel/bpf/arraymap.c
> index 172dc8ee0e3b..ab93490d1a00 100644
> --- a/kernel/bpf/arraymap.c
> +++ b/kernel/bpf/arraymap.c
> @@ -452,39 +452,18 @@ static void bpf_event_entry_free_rcu(struct
Hi,
Stefan Agner writes:
> Hi Felipe,
>
> On 2017-04-19 01:53, Krzysztof Opasiak wrote:
>> On 04/15/2017 03:35 AM, Stefan Agner wrote:
>>> Currently qw_sign requires UTF-8 character to set, but returns UTF-16
>>> when read. This isn't obvious when simply using cat since the
On 01/06/17 21:40, Auger Eric wrote:
> Hi Alex,
>
> On 31/05/2017 20:24, Alex Williamson wrote:
>> On Wed, 24 May 2017 22:13:18 +0200
>> Eric Auger wrote:
>>
>>> We add two new fields in vfio_pci_irq_ctx struct: deoi and handler.
>>> If deoi is set, this means the physical
Added device tree binding documentation for Aspeed I2C Interrupt
Controller.
Signed-off-by: Brendan Higgins
Acked-by: Rob Herring
---
Added in v6:
- Pulled "aspeed_i2c_controller" out into a interrupt controller since that is
what it actually
Added initial master support for Aspeed I2C controller. Supports
fourteen busses present in AST24XX and AST25XX BMC SoCs by Aspeed.
Signed-off-by: Brendan Higgins
---
Changes for v2:
- Added single module_init (multiple was breaking some builds).
Changes for v3:
-
The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
separate I2C busses. This adds a dummy irqchip which maps the single
hardware interrupt to software interrupts for each of the busses.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled
On 01/06/17 21:22, Bandan Das wrote:
> Jintack Lim writes:
>
>> From: Christoffer Dall
>>
>> Set up virutal EL2 context to hardware if the guest exception level is
>> EL2.
>>
>> Signed-off-by: Christoffer Dall
On Thu, 1 Jun 2017 15:01:56 -0700
Brian Norris wrote:
> On Thu, Jun 01, 2017 at 10:47:12PM +0200, Boris Brezillon wrote:
> > Le Thu, 1 Jun 2017 11:43:40 -0700,
> > Brian Norris a écrit :
> > > On Wed, May 17, 2017 at 05:29:11PM +0200,
On Wed, May 31, 2017 at 05:10:08PM -0400, David Miller wrote:
> A fix for this is in Linus's tree and was submitted to -stable last
> night:
What remains to be fixed though is that the gcc-7 testsuite
*reproducibly* kills the kernel on sparc64 when building with more than
around 20 jobs:
Hello!
On 6/2/2017 2:56 AM, Michael S. Tsirkin wrote:
commit d85b758f72b0 "virtio_net: fix support for small rings"
Commit d85b758f72b0 ("virtio_net: fix support for small rings")
was supposed to increase the buffer size for small rings
but had an unintentional side effect of decreasing
Hi,
Ruslan Bilovol writes:
> Abstract the peripheral side ALSA sound card code from
> the f_uac2 function into a component that can be called
> by various functions, so the various flavors can be split
> apart and selectively reused.
>
> Visible changes:
> - add
On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote:
> From: Corentin Labbe
> Date: Wed, 31 May 2017 09:18:31 +0200
>
> > This patch series add the driver for dwmac-sun8i which handle the Ethernet
> > MAC
> > present on Allwinner H3/H5/A83T/A64 SoCs.
>
>
I'm working on a driver for an i2c based media controller device that
uses pages. By that I mean there are several pages of 8bit registers
and a page-select register that holds the current page. Multiple
accesses to the same page can occur without writing to this page
register but if you want to
On 06/02/2017 09:18 AM, Christian Borntraeger wrote:
> On 06/02/2017 09:16 AM, Martin Schwidefsky wrote:
>> On Fri, 2 Jun 2017 09:13:03 +0200
>> Christian Borntraeger wrote:
>>
>>> On 06/02/2017 09:02 AM, Heiko Carstens wrote:
On Thu, Jun 01, 2017 at 12:46:51PM +0200,
On 04/07/2017 05:57 PM, Deepa Dinamani wrote:
> CURRENT_TIME macro is not y2038 safe on 32 bit systems.
>
> The patch replaces all the uses of CURRENT_TIME by
> current_time().
>
> This is also in preparation for the patch that transitions
> vfs timestamps to use 64 bit time and hence make them
This prepares the addition of IOT2040 platform support by preparing the
needed setup and rs485_config hooks.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
drivers/tty/serial/8250/8250_exar.c | 32 +++-
The UART driver already maps the resource for us. Trying to do this here
only fails and leaves us with a non-working device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Acked-by: Linus Walleij
---
Set the parent of the exar gpiochip to its platform device, like other
gpiochips are doing it. In order to keep the relationship discoverable
for ACPI systems, set the platform device companion to the PCI device.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
Aligns us with device_add_properties, the function we call.
Signed-off-by: Jan Kiszka
---
drivers/base/platform.c | 2 +-
include/linux/platform_device.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/base/platform.c
On Fri, Jun 02, 2017 at 09:28:56AM +0200, Michal Hocko wrote:
> On Fri 02-06-17 07:17:22, Sasha Levin wrote:
> > On Mon, Mar 06, 2017 at 11:30:24AM +0100, Michal Hocko wrote:
> > > +void *kvmalloc_node(size_t size, gfp_t flags, int node)
> > > +{
> > > + gfp_t kmalloc_flags = flags;
> > > + void
struct irq_domain_ops is not modified, so it can be made const.
Cc: Yoshinori Sato
Cc: uclinux-h8-de...@lists.sourceforge.jp
Signed-off-by: Tobias Klauser
---
drivers/irqchip/irq-renesas-h8300h.c | 2 +-
1 file changed, 1 insertion(+), 1
Greg Kroah-Hartman writes:
> On Fri, Apr 28, 2017 at 12:56:42PM +0400, Sevak Arakelyan wrote:
>> From: John Youn
>>
>> Set 'lpm_capable' flag in the gadget structure so
>> indicating that LPM is supported.
>>
>> Signed-off-by: Sevak Arakelyan
When opening the slave end of a PTY, it is not possible for userspace to
safely ensure that /dev/pts/$num is actually a slave (in cases where the
mount namespace in which devpts was mounted is controlled by an
untrusted process). In addition, there are several unresolvable
race conditions if
Changes in v2:
* Reordered addition to ioctls.h to follow correct hex ordering.
Aleksa Sarai (1):
tty: add TIOCGPTPEER ioctl
arch/alpha/include/uapi/asm/ioctls.h | 1 +
arch/mips/include/uapi/asm/ioctls.h| 1 +
arch/parisc/include/uapi/asm/ioctls.h | 1 +
This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
On Fri, Jun 02, 2017 at 08:37:52AM +0200, Maxime Ripard wrote:
> On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote:
> > From: Corentin Labbe
> > Date: Wed, 31 May 2017 09:18:31 +0200
> >
> > > This patch series add the driver for dwmac-sun8i which handle the
The dwmac-sun8i hardware is present on the bananapi m3
It uses an external PHY rtl8211e via RGMII.
This patch create the needed emac and phy nodes.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 17 +
1 file changed,
From: Chen-Yu Tsai
The BPI-M3 is an Allwinner A83T based SBC in the Bananapi/Bpi family.
It is roughly the same form factor as the BPI-M1+, with roughly the
same peripherals and connectors:
- 2GB LPDDR3 DRAM
- 8GB eMMC
- Micro-SD card slot
- HDMI output
- Headset
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 28
1 file changed,
>-Original Message-
>From: Alex Williamson [mailto:alex.william...@redhat.com]
>Sent: Friday, June 02, 2017 11:35 AM
>To: Chen, Xiaoguang
>Cc: kra...@redhat.com; ch...@chris-wilson.co.uk; intel-
>g...@lists.freedesktop.org; linux-kernel@vger.kernel.org;
On 16/05/17 08:57, Andrew Jeffery wrote:
> In addition to introducing the new compatible string the bindings
> description is reworked to be more generic.
>
> Signed-off-by: Andrew Jeffery
Queued for 4.13.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Hello,
The Marvell Armada 7K/8K SoCs are composed of two parts: the AP (which
contains the CPU cores) and the CP (which contains most
peripherals). The 7K SoCs have one CP, while the 8K SoCs have two CPs,
doubling the number of available peripherals.
In terms of interrupt handling, all devices
This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files
to describe the ICU and GICP units, and use ICU interrupts for all
devices in the CP110 blocks.
Signed-off-by: Thomas Petazzoni
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi |
This commit adds the Device Tree binding documentation for the Marvell
GICP, an extension to the GIC that allows to trigger GIC SPI interrupts
using memory transactions. It is used by the ICU unit in the Marvell
CP110 block to turn wired interrupts inside the CP into SPI interrupts
at the GIC
On Thu, 2017-06-01 at 23:25 -0600, Ross Zwisler wrote:
> On Wed, May 31, 2017 at 08:45:23AM -0400, Jeff Layton wrote:
> > v5: don't retrofit old API over the new infrastructure
> > add fstype flag to indicate how wb errors are tracked within that fs
> > add more function variants that take
On Fri, Jun 2, 2017 at 11:07 AM, Florian Fainelli wrote:
>
>
> On 05/26/2017 02:24 AM, Anup Patel wrote:
>> The Broadcom Stingray SoC is a new member in Broadcom iProc
>> SoC family.
>>
>> This patch adds initial DTS files for Broadcom Stingray SoC
>> and two of its
On 2 June 2017 at 00:48, Ian W MORRISON wrote:
> On 6/1/17 5:49 PM, Ian W MORRISON wrote:
>> On 31 May 2017 at 10:53, Doug Smythies wrote:
>>> Note Before:
>>> I might not have the address list correct, as I have re-created this
>>> e-mail from the
Add support for battery monitor MAX1721x (power_supply class).
Maxim Semiconductor MAX1721x Standalone Fuel Gauge battery monitor.
MAX17211 used for singlecell, MAX17215 for multicell batteryes.
---
drivers/power/supply/Kconfig| 14 ++
drivers/power/supply/Makefile | 1 +
Codding style fix. Maillist message subject fix.
Soryy for all. It's hard to be stuppid :-(
Alex A. Mihaylov (3):
regmap: Add 1-Wire bus support
w1: MAX1721x Stanalone Fuel Gauge - add 1-Wire slave drivers
power: supply: Add support MAX1721x battery monitor
drivers/base/regmap/Kconfig
On Thu, Jun 01, 2017 at 01:27:28PM +0200, David Hildenbrand wrote:
> An alternative: Have some process that enables PGSTE for all of its
> future children. Fork+execv qemu. However, such a process in between
> will most likely confuse tooling like libvirt when it comes to process ids.
That would
Call directly into acpica to load a table to obtain its index on return.
We choose the direct call of acpica internal functions to avoid having
to modify its API which is used outside of Linux as well.
Use that index to unload the table again when the corresponding
directory in configfs gets
this patch add compatible support for mt7622 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3d7cd2d..ebc4b1a 100644
---
this patch adds support for adjust register design.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff
This patch adds a DT binding documentation for the MT7622 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-mt65xx.txt |1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
On 06/02/2017 09:16 AM, Martin Schwidefsky wrote:
> On Fri, 2 Jun 2017 09:13:03 +0200
> Christian Borntraeger wrote:
>
>> On 06/02/2017 09:02 AM, Heiko Carstens wrote:
>>> On Thu, Jun 01, 2017 at 12:46:51PM +0200, Martin Schwidefsky wrote:
> Unfortunately,
This series are based on 4.12-rc1 and provide 4 patches to support mt7622 IC.
Change in this series:
1. update document to add mt7622;
2. add adjust register define support;
3. add mt7622_compat.
Leilk Liu (3):
dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc
platform
Thomas,
Am 02.06.2017 um 07:49 schrieb Florian Fainelli:
>> the put_fp_registers fails with errno 4 if I recall correctly.
>>
>> I didn't investigate yet further, why the the xstate ptrace call fails.
>
> Which of the branches is put_fp_registers() taking? The
> restore_fpx_registers() or
Ls1088a is new introduced arm-based soc with sata support with
following features:
* Complies with the serial ATA 3.0 specification
and the AHCI 1.3.1 specification
* Contains a high-speed descriptor-based DMA controller
* Supports the following:
* Speeds of 1.5 Gb/s (first-generation SATA),
Hi maintainers,
Is this patch series (v6) OK for merging?
Thanks
Jin Yao
On 4/20/2017 5:36 PM, Jiri Olsa wrote:
On Thu, Apr 20, 2017 at 08:07:48PM +0800, Jin Yao wrote:
v6:
Update according to the review comments from
Jiri Olsa . Major modifications are:
1.
On Thu 01-06-17 19:41:13, Roman Gushchin wrote:
> On Wed, May 31, 2017 at 06:39:29PM +0200, Michal Hocko wrote:
> > On Tue 30-05-17 19:52:31, Roman Gushchin wrote:
> > > >From c57e3674efc609f8364f5e228a2c1309cfe99901 Mon Sep 17 00:00:00 2001
> > > From: Roman Gushchin
> > > Date:
Am Donnerstag, 1. Juni 2017, 15:51:45 CEST schrieb Arvind Yadav:
> clk_prepare_enable() can fail here and we must check its return value.
>
> Signed-off-by: Arvind Yadav
looks good, but you may want to include
Bjorn Helgaas
who is the
On 01/06/17 12:39, Daniel Lezcano wrote:
> Some hardware have clusters with different idle states. The current code does
> not support this and fails as it expects all the idle states to be identical.
>
> Because of this, the Mediatek mtk8173 had to create the same idle state for a
> big.Little
Save a bit of code by using the kernel extension.
$ size net/core/net-procfs.o*
textdata bss dec hex filename
3701 120 03821 eed net/core/net-procfs.o.new
3764 120 03884 f2c net/core/net-procfs.o.old
Signed-off-by: Joe Perches
On 02/06/17 09:46, Brendan Higgins wrote:
> The Aspeed 24XX/25XX chips share a single hardware interrupt across 14
> separate I2C busses. This adds a dummy irqchip which maps the single
> hardware interrupt to software interrupts for each of the busses.
>
> Signed-off-by: Brendan Higgins
On 2017-05-31 22:59, Stephen Boyd wrote:
On 05/30, Kiran Gunda wrote:
diff --git a/drivers/spmi/spmi-pmic-arb.c
b/drivers/spmi/spmi-pmic-arb.c
index 2afe359..412481d 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -1003,6 +1003,12 @@ static int
On Mon, 15 May 2017 10:16:15 -0700
Eric Anholt wrote:
> Failing to do so meant that we got a resume() callback on first use of
> the device, so we would leak the bin BO that we allocated during
> probe.
>
> Signed-off-by: Eric Anholt
> Fixes: 553c942f8b2c
Avoids reimplementation of DMI matching in stmmac_pci_find_phy_addr.
Signed-off-by: Jan Kiszka
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 99
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git
No need to carry this reference in stmmac_pci_info - the Quark-specific
setup handler knows that it needs to use the Quark-specific DMI table.
This also allows to drop the stmmac_pci_info reference from the setup
handler parameter list.
Signed-off-by: Jan Kiszka
Some cleanups of the way we probe DMI platforms in the driver. Reduces
a bit of open-coding and makes the logic easier reusable for any
potential DMI platform != Quark.
Tested on IOT2000 and Galileo Gen2.
Changes in v4:
- Refactor patch 5 according to feedback
Jan
Jan Kiszka (6):
stmmac:
Make stmmac_default_data compatible with stmmac_pci_info.setup and use
an info structure for all devices. This allows to make the probing more
regular.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
On Thu 01-06-17 12:56:35, Yu Zhao wrote:
> Saw need_resched() warnings when swapping on large swapfile (TBs)
> because page allocation in swap_cgroup_prepare() took too long.
Hmm, but the page allocator makes sure to cond_resched for sleeping
allocations. I guess what you mean is something
Thomas,
Am 02.06.2017 um 10:04 schrieb Thomas Meyer:
> Am Donnerstag, den 01.06.2017, 22:49 -0700 schrieb Florian Fainelli:
> I see this in the kernel log:
>
> [0.00] [ cut here ]
> [0.00] WARNING: CPU: 0 PID: 0 at arch/x86/kernel/fpu/xstate.c:595
>
On 06/01/2017, 03:58 PM, Jiri Slaby wrote:
> On 06/01/2017, 03:50 PM, Ingo Molnar wrote:
>> That's not what I meant! The speedup comes from (hopefully) being able to
>> disable
>> CONFIG_FRAME_POINTER, which:
>
> BTW when you are mentioning this -- my measurements were with FP disabled.
>
> Is
On 23/05/2017 14:55, Daniel Lezcano wrote:
> On 16/05/2017 21:44, Daniel Lezcano wrote:
>> An interrupt behaves with a burst of activity with periodic interval of time
>> followed by one or two peaks of longer interval.
>>
>> As the time intervals are periodic, statistically speaking they follow a
From: Colin Ian King
function mwifiex_ret_pkt_aggr_ctrl can be made static as it does not
need to be in global scope.
Cleans up sparse warning: "symbol 'mwifiex_ret_pkt_aggr_ctrl' was not
declared. Should it be static?"
Signed-off-by: Colin Ian King
Am Freitag, den 02.06.2017, 10:30 +0200 schrieb Richard Weinberger:
> Thomas,
>
> Am 02.06.2017 um 10:04 schrieb Thomas Meyer:
> > Am Donnerstag, den 01.06.2017, 22:49 -0700 schrieb Florian
> > Fainelli:
> > I see this in the kernel log:
> >
> > [0.00] [ cut here
On 02/06/2017 11:39, Sudeep Holla wrote:
>
>
> On 02/06/17 10:25, Daniel Lezcano wrote:
>> On 02/06/2017 11:20, Sudeep Holla wrote:
>>>
>>>
>>> On 01/06/17 12:39, Daniel Lezcano wrote:
Some hardware have clusters with different idle states. The current code
does
not support this
On 02/06/17 09:20, Tobias Klauser wrote:
> Constify all remaining non-const instances of irq_domain_ops in the irqchip
> drivers. These can be made const as they are never modified.
>
> Tobias Klauser (7):
> irqchip/aspeed-vic: constify irq_domain_ops
> irqchip/i8259: constify irq_domain_ops
On Fri, Jun 2, 2017 at 10:48 AM, Aleksa Sarai wrote:
> When opening the slave end of a PTY, it is not possible for userspace to
> safely ensure that /dev/pts/$num is actually a slave (in cases where the
> mount namespace in which devpts was mounted is controlled by an
> untrusted
On 06/01/2017 02:59 PM, David Hildenbrand wrote:
>
>> diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
>> index d4d409b..b22c2b6 100644
>> --- a/arch/s390/mm/pgtable.c
>> +++ b/arch/s390/mm/pgtable.c
>> @@ -196,7 +196,7 @@ static inline pgste_t ptep_xchg_start(struct mm_struct
>>
> /* Address of data segment in memory after it is loaded.
> Note that it is up to you to define SEGMENT_SIZE
> on machines not listed here. */
> -#if defined(vax) || defined(hp300) || defined(pyr)
> +#if defined(__vax__) || defined(__hp300__) || defined(__pyr__)
> #define SEGMENT_SIZE
By now, stmmac_pci_info only contains a single entry. Register this
directly with the PCI device table, removing one indirection.
Signed-off-by: Jan Kiszka
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 34 +---
1 file changed, 12
Move the special case for the early Galileo firmware into
quark_default_setup. This allows to use stmmac_pci_find_phy_addr for
non-quark cases.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
By removing the PCI device reference from the structure and passing it
as parameters to the interested functions, we can make quark_pci_info
const.
Signed-off-by: Jan Kiszka
Reviewed-by: Andy Shevchenko
---
> struct vfio_vgpu_surface_info {
> __u64 start;
> __u32 width;
> __u32 height;
> __u32 stride;
> __u32 size;
> __u32 x_pos;
> __u32 y_pos;
> __u32 padding;
> /* Only used when VFIO_VGPU_SURFACE_DMABUF_* flags set */
>
Added device tree binding documentation for Aspeed I2C busses.
Signed-off-by: Brendan Higgins
Acked-by: Rob Herring
---
Changes for v2:
- None
Changes for v3:
- Removed reference to "bus" device tree param
Changes for v4:
- None
Changes for v5:
Added slave support for Aspeed I2C controller. Supports fourteen busses
present in AST24XX and AST25XX BMC SoCs by Aspeed.
Signed-off-by: Brendan Higgins
---
Added in v6:
- Pulled slave support out of initial driver commit into its own commit.
- No longer
Addressed comments from:
- Ben in: http://www.spinics.net/lists/devicetree/msg179006.html
Changes since previous update:
- Fairly minimal changes in master support patch, all else is the same
As before, tested on Aspeed 2500 evaluation board and a real platform with an
Aspeed 2520.
Enable configs for hi6421v530 mfd and regulator driver
+ CONFIG_MFD_HI6421_PMIC=y
+ CONFIG_REGULATOR_HI6421V530=y
Signed-off-by: Guodong Xu
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig
Add support for HiSilicon Hi6421v530 PMIC. Hi6421v530 communicates with
main SoC via memory-mapped I/O.
Hi6421v530 and Hi6421 are PMIC chips from the same vendor, HiSilicon,
but at different revisions. They share the same memory-mapped I/O
design. They differ in integrated devices, such as
The hi6421-regulator driver consumes a similarly named platform device.
Adding that to the module device table, allows modprobe to locate this
driver once the device is created.
Cc: Jeremy Linton
Cc: Mark Brown
Signed-off-by: Guodong Xu
printk() is quite complex internally and, basically, it does two
slightly independent things:
a) adds a new message to a kernel log buffer (log_store())
b) prints kernel log messages to serial consoles (console_unlock())
while (a) is guaranteed to be executed by printk(), (b) is not, for a
It's not always possible/safe to wake_up() printk kernel
thread. For example, late suspend/early resume may printk()
while timekeeping is not initialized yet, so calling into the
scheduler may result in recursive warnings.
Another thing to notice is the fact PM at some point
freezes user space
This param permits user-space to forcibly on/off printk emergency
mode via /sys/module/printk/parameters/enforce_emergency node.
Signed-off-by: Sergey Senozhatsky
---
kernel/printk/printk.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git
Hello,
RFC
This patch set adds a printk() SMP kernel threads which let us
to print kernel messages to the console from a non-atomic/schedule-able
context, avoiding different sort of lockups, stalls, etc.
A completely reworked version, for more details please
see 0003
Do not keep `printk_pending' in per-CPU area. We set the following bits
of printk_pending:
a) PRINTK_PENDING_WAKEUP
when we need to wakeup klogd
b) PRINTK_PENDING_OUTPUT
when there is a pending output from deferred printk and we need
to call console_unlock().
So none of
Christophe Leroy writes:
> Only the get_user() in store_updates_sp() has to be done outside
> the mm semaphore. All the comparison can be done within the semaphore,
> so only when really needed.
>
> As we got a DSI exception, the address pointed by regs->nip is
>
On 06/01/2017 11:04 PM, Jiri Olsa wrote:
> On Thu, Jun 01, 2017 at 10:20:38AM -0300, Arnaldo Carvalho de Melo wrote:
>> Em Thu, Jun 01, 2017 at 02:34:41PM +0200, Thomas Richter escreveu:
>>> Command perf test -v 14 (Setup struct perf_event_attr test)
>>> always reports success even if the test
The Marvell ICU unit is found in the CP110 block of the Marvell Armada
7K and 8K SoCs. It collects the wired interrupts of the devices located
in the CP110 and turns them into SPI interrupts in the GIC located in
the AP806 side of the SoC, by using a memory transaction.
Until now, the ICU was
The rpmsg devices are allocated in the backends and as such must be
freed there as well.
Signed-off-by: Bjorn Andersson
---
drivers/rpmsg/qcom_smd.c | 11 +++
drivers/rpmsg/virtio_rpmsg_bus.c | 9 +
2 files changed, 20 insertions(+)
diff
Hi,
Jerry Huang writes:
>> Jerry Huang writes:
>> >> >> --
>> >> >> 1.7.9.5
>> >> > Hi, Balbi and all guys,
>> >> > Any comment for these patches? Can they be accepted?
>> >>
>> >> Rob had comments which you didn't reply yet. I cannot take this
>> >>
On Wed, May 31, 2017 at 4:36 PM, Johannes Berg
wrote:
> Hi,
>
>> > #include
>> > #include
>> > #include
>> > #include
>> > #include
>> >
>> > DEFINE_MUTEX(mtx);
>> > static struct workqueue_struct *wq;
>> > static struct work_struct w1, w2;
>> >
>> > static void
This series adds support for usb on rk322x SoCs.
William Wu (2):
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: enable usb for rk3229 evb board
Tested on rk3229 evb board, and depended on the following
patches and config.
[1] https://patchwork.kernel.org/patch/9761507/
[2]
Rockchip's rk3229 evaluation board has one usb otg controller
and three usb host controllers. Each usb controller connect
with one usb2 phy port through UTMI+ interface. And the three
usb host interfaces use the same GPIO VBUS drive. Let's enable
them to support usb on rk3229 evb board.
This patch adds usb otg/host controllers and phys nodes on rk322x.
Signed-off-by: William Wu
---
arch/arm/boot/dts/rk322x.dtsi | 138 +-
1 file changed, 137 insertions(+), 1 deletion(-)
diff --git
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