Hi Thomas,
with 2.6.20.4 it works great, but when switching to 2.6.21-rcX it breaks
with this:
drivers/crypto/Kconfig:55: can't open file arch/s390/crypto/Kconfig
arch/s390/crypto/Kconfig is included there since that is the right place
for the config options to show up.
I tried to fix
On Fri, 2007-03-30 at 05:55 -0400, Robert P. J. Day wrote:
i'm betting the S390 folks would *really* hate that idea but, if you
look closely, the generic Kconfig file *already* has some
arch-dependent content:
...
config CRYPTO_DEV_PADLOCK
tristate Support for VIA PadLock ACE
On Sat, 2007-11-10 at 18:27 +1100, Rusty Russell wrote:
We fail rather than sleep in the dependency isn't ready case. Partially
because it's not happened before, but partially because we risk nasty loops.
If we fail since we have to in the dependency isn't ready case then
the warning seems
in that case and causes the warning.
---
Signed-off-by: Jan Glauber [EMAIL PROTECTED]
Index: linux-2.6/kernel/module.c
===
--- linux-2.6.orig/kernel/module.c 2007-11-12 13:53:44.0 +
+++ linux-2.6/kernel/module.c
On Tue, 2007-11-13 at 13:52 +1100, Rusty Russell wrote:
On Tuesday 13 November 2007 09:23:12 Rusty Russell wrote:
Better might be to put in a waitqueue and wake it up whenever a module is
deleted or changes status. Then use_module() can wait if
strong_try_module_get() returns -EBUSY (up
Hi Ingo,
an outcome from the previous discussion about a virtual sched_clock() on s390
was that scheduler_tick() should also be called based on virtual time.
The second patch changes the scheduler_tick() call to only happen after a tick
passed for the virtual cpu.
The patches cause nothing
From: Jan Glauber [EMAIL PROTECTED]
From: Christian Borntraeger [EMAIL PROTECTED]
This patch introduces a cpu time clock for s390 (only ticking if
the virtual cpu is running) and bases the s390 implementation of
sched_clock() on it.
The time slice length on a virtual cpu can be anything
Make the scheduler_tick() dependent on the s390 cpu timer so it gets only
called after
a virtual cpu has completed a tick. Together with the virtual sched_clock()
this
should make the scheduler decisions for s390 based on virtual time.
Signed-off-by: Jan Glauber [EMAIL PROTECTED]
Signed-off
The flogr instruction scans a bitmap starting from the leftmost bit.
Implement support for these bitops. This could be useful to scan
bitmaps like an interrupt vector set by the hardware starting
at the leftmost bit.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
drivers/gpu/vga/Kconfig | 2 +-
include/video/vga.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/vga/Kconfig b/drivers/gpu/vga/Kconfig
index f348388..29437ea 100644
--- a/drivers/gpu/vga/Kconfig
+++ b
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/Kconfig | 56 +--
1 file changed, 50 insertions(+), 6 deletions(-)
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 5dba755..e3dd4aec 100644
--- a/arch/s390/Kconfig
+++ b
CLP instructions are used to query the firmware about detected PCI
functions, the attributes of those functions and to enable or disable
a PCI function. The CLP interface is the equivalent to a PCI bus scan.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm/clp.h
Add some s390 specific sysfs attributes to the PCI device directory.
The following attributes are introduced:
- function_id (PCI function ID)
- function_handle (PCI function handle)
- pchid (PCI channel ID)
- pfgid (PCI function group ID aka PCI root complex)
Signed-off-by: Jan Glauber j
/slots/fid/power the PCI function
is moved to stand-by or configured state. If moved to the configured
state the device is automatically scanned by the s390 PCI layer.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm/pci.h| 11 ++
arch/s390/include/asm/sclp.h
Add CHSC store-event-information support for PCI (notfication type 2)
and report error and availability events to the PCI architecture layer.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm/pci.h | 4 ++
arch/s390/pci/Makefile | 3 +-
arch/s390/pci
function.
A hash table is used to map interrupt numbers to MSI descriptors.
The interrupt vector is scanned using the flogr instruction.
Only MSI/MSI-X interrupts are supported, no legacy INTs.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm/hw_irq.h | 22 ++
arch/s390
Add DMA IOMMU support using 4K page table entries. Implement dma_map_ops.
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/include/asm/dma-mapping.h | 76 ++
arch/s390/include/asm/dma.h | 19 +-
arch/s390/include/asm/pci.h | 21 ++
arch/s390/include/asm
, NO_SOUND, ...
c) Introduce a special CONFIG_PCI_S390 and add that explicitely to all
subsystems that we want to enable on s390
None of the above looks like the obvious winner to me.
Hope to get some feedback,
TIA, Jan
Jan Glauber (10):
s390/pci: base support
s390/pci: CLP interface
s390
special pcilg/pcistg
- device, bus and domain allocation
Signed-off-by: Jan Glauber j...@linux.vnet.ibm.com
---
arch/s390/Kbuild | 1 +
arch/s390/include/asm/io.h | 55 +++-
arch/s390/include/asm/pci.h | 82 +-
arch/s390/include/asm/pci_insn.h | 280
On Fri, 2007-07-20 at 09:22 +0200, Ingo Molnar wrote:
* Paul Mackerras [EMAIL PROTECTED] wrote:
As with s390, 64-bit PowerPC also uses CONFIG_VIRT_CPU_ACCOUNTING.
That affects how tsk-utime and tsk-stime are accumulated (we call
account_user_time and account_system_time directly rather
On Tue, 2006-12-05 at 14:07 +0100, Jan Glauber wrote:
Yes, if an attacker knows the initial clock value a brute-force attack
would be feasible to predict the output. But I don't know if the
hardware completely relies on the clock values or if there is any
internal state which is not visible
On Thu, 2006-12-07 at 16:06 +0100, Arnd Bergmann wrote:
On Friday 01 December 2006 14:19, Jan Glauber wrote:
I've chosen the char driver since it allows the user to decide which
pseudo-random
numbers he wants to use. That means there is a new interface for the s390
PRNG, called /dev
On Thu, 2006-12-07 at 19:43 +0100, Arnd Bergmann wrote:
On Thursday 07 December 2006 16:19, Jan Glauber wrote:
Hm, why is /dev/urandom implemented in the kernel?
It could be done completely in user-space (like libica already does)
but I think having a device node where you can read from
@@
+/*
+ * Copyright 2006 IBM Corporation
+ * Author(s): Jan Glauber [EMAIL PROTECTED]
+ * Driver for the s390 pseudo random number generator
+ */
+#include linux/fs.h
+#include linux/init.h
+#include linux/kernel.h
+#include linux/miscdevice.h
+#include linux/module.h
+#include linux/moduleparam.h
IBM Corporation
+ * Author(s): Jan Glauber [EMAIL PROTECTED]
+ * Driver for the s390 pseudo random number generator
+ */
+#include linux/fs.h
+#include linux/init.h
+#include linux/kernel.h
+#include linux/miscdevice.h
+#include linux/module.h
+#include linux/moduleparam.h
+#include linux/random.h
On Mon, 2006-12-04 at 11:15 -0500, [EMAIL PROTECTED] wrote:
On Fri, 01 Dec 2006 14:19:15 +0100, Jan Glauber said:
New s390 machines have hardware support for the generation of pseudo-random
numbers. This patch implements a simple char driver that exports this
numbers
to user-space. Other
On Fri, 2007-02-09 at 09:42 +0100, Heiko Carstens wrote:
I just want to avoid that s390 has different semantics for
smp_call_functiom*() than any other architecture. But then again it
will probably not hurt since we allow more.
Another thing that comes into my mind is smp_call_function
Hi Rusty,
I've seen a symbol-resolving race on s390. The qeth module uses symbols
from qdio and although the loading order seems correct and the qdio
symbols should be available the following error appears:
qdio: loading QDIO base support version 2
qeth: Unknown symbol qdio_synchronize
qeth:
On Thu, 2007-11-08 at 13:10 +1100, Rusty Russell wrote:
On Wednesday 07 November 2007 21:01:30 Jan Glauber wrote:
Hi Rusty,
I've seen a symbol-resolving race on s390. The qeth module uses symbols
from qdio and although the loading order seems correct and the qdio
symbols should
package?
thanks, Jan
--
--- /dev/null 2012-12-04 10:52:46.657720288 +0100
+++ s390_runtime_instr.22012-10-09 13:55:39.0 +0200
@@ -0,0 +1,73 @@
+.\ Copyright IBM Corp. 2012
+.\ Author: Jan Glauber j...@linux.vnet.ibm.com
+.\
+.TH S390_RUNTIME_INSTR 2 2012-10-09 Linux Programmer's
On Mon, 2012-12-10 at 14:14 -0700, Bjorn Helgaas wrote:
On Wed, Nov 14, 2012 at 2:41 AM, Jan Glauber j...@linux.vnet.ibm.com wrote:
Add PCI support for s390, (only 64 bit mode is supported by hardware):
- PCI facility tests
- PCI instructions: pcilg, pcistg, pcistb, stpcifc, mpcifc, rpcit
later when the official documentation is released which
did not yet happen.
thanks, Jan
--- /dev/null 2012-12-17 11:58:11.967183723 +0100
+++ s390_runtime_instr.22012-12-17 12:55:20.942872393 +0100
@@ -0,0 +1,91 @@
+.\ Copyright IBM Corp. 2012
+.\ Author: Jan Glauber j
This patch introduces a cpu time clock for s390 (only ticking
if the virtual cpu is running) and bases the s390 implementation
of sched_clock() on it.
The times lice length on a virtual cpu can be anything
between the calculated time slice and zero. In reality
this doesn't seem to be problem,
On Thu, 2007-07-19 at 18:00 +0200, Ingo Molnar wrote:
* Jeremy Fitzhardinge [EMAIL PROTECTED] wrote:
/*
- * Monotonic_clock - returns # of nanoseconds passed since time_init()
+ * Scheduler clock - returns current time in nanosec units.
+ * Now based on virtual cpu time to only
On Thu, 2007-07-19 at 21:38 +0200, Ingo Molnar wrote:
* Jan Glauber [EMAIL PROTECTED] wrote:
still, CFS needs time measurement across idle periods as well, for
another purpose: to be able to do precise task statistics for /proc.
(for top, ps, etc.) So it's still true
Commit b764375 added annotations of thread stacks. This annotation can be
wrong depending on the memory layout of a task (will probably only happen
under 32 bit).
If a large allocation happens before the creation of a thread you can get:
root@box:~# cat /proc/2032/maps
08048000-08049000 r-xp
Make sys_recv a first class citizen by using the SYSCALL_DEFINEx
macro. Besides being cleaner this will also generate meta data
for the system call so tracing tools like ftrace or LTTng can
resolve this system call.
Signed-off-by: Jan Glauber jan.glau...@gmail.com
---
net/socket.c |4 ++--
1
On Wed, Jun 26, 2013 at 10:05:41PM +0530, Siddhesh Poyarekar wrote:
On 26 June 2013 17:13, Jan Glauber jan.glau...@gmail.com wrote:
Any ideas how that can be fixed? The only solution that comes to my mind
is to prevent merging vma's that are used for thread stacks. There is
already
On Thu, Jun 27, 2013 at 10:00:51PM +0530, Siddhesh Poyarekar wrote:
On 27 June 2013 21:32, Jan Glauber jan.glau...@gmail.com wrote:
But isn't that confusing to the user? At least it is to me. Imagine someone
who uses the maps or smaps output to determine the size of code, data and
stack
Remove the warning about a too long SMBUS message because
the ipmi_ssif driver triggers this warning too frequently so it
spams the message log.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
Testing ipmi_ssif on ThunderX several bugs were found that also
apply to the Octeon i2c driver changes coming with 4.7.
I'll need to rebase the pending ThunderX driver series after this
fixes which I'll do shortly.
Please consider for 4.7.
thanks,
Jan
Jan Glauber (3):
i2c: octeon: Missing
are to be received.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index aa5f01e..1922e4a 100644
--- a/drivers/i2c/buss
The controller specification states that when receiving STAT_RXADDR_NAK
the START should be sent again. Retry several times before finally
failing with -ENXIO.
Without this change the IPMI SSIF driver fails executing several commands
like 'ipmitool fru' on ThunderX.
Signed-off-by: Jan Glauber
On Thu, Jun 09, 2016 at 10:11:51PM +0200, Wolfram Sang wrote:
> On Wed, Jun 08, 2016 at 08:51:18AM +0200, Jan Glauber wrote:
> > The controller specification states that when receiving STAT_RXADDR_NAK
> > the START should be sent again. Retry several times before finally
> >
Initialize booleon values with true instead of 1.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-cavium.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index 56b23c2..3
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Functions are slightly re-ordered but no other changes are included.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSI-X. The
clock rates can be set via device tree or ACPI.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
d
Add SMBUS alert interrupt support. For now only device tree is
supported for specifying the alert. In case of ACPI an error
is returned.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-cavium.h| 6
drivers/i2c/busses/i2c-thunderx-core.
of of_find_node_by_name
- Simplify adap.name by using device name
- SMBUS ACPI handling
- Re-phrase SMBUS error/not-specified message
Thanks,
Jan
-
Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c: octeon: Split the driver into two parts
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/Makefile
Sort include files alphabetically to reduce probability of merge
conflicts.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon-core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon-core.c
b/drive
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-ca
The i2c Octeon and ThunderX drivers are maintained by Cavium.
While at it fix the whitespace errors of the next entry.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <david.da...@cavium.com>
---
MAINTAINERS | 25 +
1 file changed, 1
uncore/uncore_cavium.c
@@ -0,0 +1,210 @@
+/*
+ * Cavium Thunder uncore PMU support. Derived from Intel and AMD uncore code.
+ *
+ * Copyright (C) 2015,2016 Cavium Inc.
+ * Author: Jan Glauber <jan.glau...@cavium.com>
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
Support counters for the CCPI Interface controller (OCX) lanes.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
Support counters on the DRAM controllers.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
arch/arm64/kernel/
Support counters of the L2 Cache tag and data units.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 6 +-
arch/arm64/kernel/uncore/uncore_cavium.h | 6 +-
arch
Support counters of the L2 cache crossbar connect.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
arch/arm64/
Support for the OCX transmit link counters.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
arch/arm64/kernel/
Support for the OCX alignment counters.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
arch/arm64/kernel/
uld be put somewhere under drivers/
instead.
Feedback welcome!
Jan
Jan Glauber (7):
arm64/perf: Basic uncore counter support for Cavium ThunderX
arm64/perf: Cavium ThunderX L2C TAD uncore support
arm64/perf: Cavium ThunderX L2C CBC uncore support
arm64/perf: Cavium ThunderX LMC unco
On Wed, Feb 03, 2016 at 06:11:55PM +0100, Jan Glauber wrote:
> Hi,
>
> I'm reposting the whole series just in case my previous attempt to
> repost only the broken patch was confusing. Patches are based on
> 4.5-rc2.
Can I get a review for these patches?
thanks,
Jan
> Patch
a note to
> help improving the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Jan-Glauber/Cavium-ThunderX-PMU-support/20160128-225855
> base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux for-next
> config: arm-corgi_defconfig (attached as .config)
ARMv8.1 increases the PMU event number space. Detect the
presence of this PMUv3 type and extend the event mask.
The event mask is moved to struct arm_pmu so different event masks
can exist, depending on the PMU type.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm/
. Without this change perf does not work at all on ThunderX.
Patch 5 extends the event mask according to ARMv8.1 and also affects arm32.
Changes to v2:
- fixed arm compile errors
Changes to v1:
- renamed thunderx dt pmu binding to thunder
--Jan
Jan Glauber (5):
arm64/perf: Rename Cortex A57
icache prefetch counters
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.c | 69 +-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 3
counter always sets the upper
32 bits so overflow interrupts are generated as before.
Original patch from Andrew Pinksi <andrew.pin...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.c | 21 -
1 file changed, 1
The implemented Cortex A57 events are not A57 specific.
They are recommended by ARM and can be found on other
ARMv8 SOCs like Cavium ThunderX too. Therefore move
these events to the common PMUv3 table.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.
ARMv8.1 increases the PMU event number space. Detect the
presence of this PMUv3 type and extend the event mask.
The event mask is moved to struct arm_pmu so different event masks
can exist, depending on the PMU type.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm/
Add a compatible string for the Cavium ThunderX PMU.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bi
counter always sets the upper
32 bits so overflow interrupts are generated as before.
Original patch from Andrew Pinksi <andrew.pin...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.c | 21 -
1 file changed, 1
The implemented Cortex A57 events are not A57 specific.
They are recommended by ARM and can be found on other
ARMv8 SOCs like Cavium ThunderX too. Therefore move
these events to the common PMUv3 table.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.
ARMv8.1 increases the PMU event number space. Detect the
presence of this PMUv3 type and extend the event mask.
The event mask is moved to struct arm_pmu so different event masks
can exist, depending on the PMU type.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/
icache prefetch counters
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
arch/arm64/kernel/perf_event.c | 69 +-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 3
Hi Mark & Will,
I'm resending the arm64 PMU patches. The only difference to the first
version is that I dropped the x on thunder in order to be consistent
with the existing device tree name.
Thanks,
Jan
Jan Glauber (5):
arm64/perf: Rename Cortex A57 events
arm64/perf: Add Cavium Thun
Add a compatible string for the Cavium ThunderX PMU.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bi
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI.
Split the current Octeon driver into an Octeon and a common part
and add the ThunderX support.
Signed-off-by: Jan Glauber <jg
Hi,
these two patches add support for the Cavium ThunderX SOC.
The patches are on-top of the previous i2c-octeon series.
Please review, feedback welcome!
Jan
Jan Glauber (2):
i2c: Split i2c-octeon driver and add ThunderX support
i2c
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/busses/i2c-cavium.h| 4
drivers/i2c/busses/i2c-thunderx-core.c | 31 +++
2 files changed, 3
On Thu, Feb 18, 2016 at 05:34:28PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> > With the long cycle counter bit (LC) disabled the cycle counter is not
> > working on ThunderX SOC (ThunderX only implements Aarch64).
>
On Thu, Feb 18, 2016 at 05:32:48PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:12PM +0100, Jan Glauber wrote:
> > Add a compatible string for the Cavium ThunderX PMU.
>
> Stupid question, but is "thunder" the name of the CPU or the SoC or ...?
>
&
or of ACK on final byte of non-final read
msgs too.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 583 ++--
1 file changed, 504 insertions(+), 79 del
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-cavium.h| 4
drivers/i2c/busses/i2c-thunderx-core.c | 31 +++
2 files changed, 35 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavi
From: David Daney <dda...@caviumnetworks.com>
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/
easure ~5.2kB/s, about 1/2 what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain <psw...@cavium.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/
Daney (4):
i2c-octeon: Support I2C_M_RECV_LEN
i2c-octeon: Enable high-level controller and improve on bus contention
i2c-octeon: Add support for cn78XX chips
i2c-octeon: Add workaround for chips with broken irqs
Jan Glauber (4):
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c: add
From: Peter Swain <psw...@cavium.com>
Signed-off-by: Peter Swain <psw...@cavium.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 in
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring <robh...@kernel.org>
Cc: Pawel Moll <pawel.m...@arm.com>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Ian Campbell <ijc+devicet...@hellion.org.uk>
Cc: Kumar Gala <ga...@codeaurora.org>
Sig
;
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 46 +
1 file changed, 46 insertions(+)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index e3552e5..3c2f848 100644
--- a/drivers/i2c/b
Cleanup only without functional change.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --g
From: David Daney <dda...@caviumnetworks.com>
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 1
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI.
Split the current Octeon driver into an Octeon and a common part
and add the ThunderX support.
Signed-off-by: Jan Glauber <jg
On Tue, Feb 16, 2016 at 03:12:53PM +, Will Deacon wrote:
> On Tue, Feb 16, 2016 at 09:00:15AM +0100, Jan Glauber wrote:
> > On Mon, Feb 15, 2016 at 08:04:04PM +, Will Deacon wrote:
> >
> > [...]
> >
> > > On Wed, Feb 03, 2016 at
for chips with broken irqs
Jan Glauber (2):
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c: add Octeon cn78xx TWSI
Peter Swain (2):
i2c-octeon: Flush TWSI writes with readback
i2c-octeon: Faster operation when IFLG signals late
.../devicetree/bindings/i2c/i2c-octeon.txt
Cleanup only without functional change.
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --g
From: David Daney <dda...@caviumnetworks.com>
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 1
easure ~5.2kB/s, about 1/2 what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain <psw...@cavium.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/
From: Peter Swain <psw...@cavium.com>
Signed-off-by: Peter Swain <psw...@cavium.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
Acked-by: David Daney <dda...@caviumnetworks.com>
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 in
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring <robh...@kernel.org>
Cc: Pawel Moll <pawel.m...@arm.com>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Ian Campbell <ijc+devicet...@hellion.org.uk>
Cc: Kumar Gala <ga...@codeaurora.org>
Sig
From: David Daney <dda...@caviumnetworks.com>
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Jan Glauber <jglau...@cavium.com>
---
drivers/i2c/busses/
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