On Wed, 2017-01-25 at 11:53 +0100, Jerome Brunet wrote:
> During meson8b clock probe, clk81 register address is fixed twice.
> First using the meson8b_clk_gates array, then by directly changing
> meson8b_clk81 register.
>
> As a result meson8b_clk81.reg = HHI_MPEG_CLK_CNTL + clk_ba
CLKID_ETH is define in the dt-bindings but has not be commented out in the
clock driver. Just do it now.
Fixes: 738f66d3211d ("clk: gxbb: add AmLogic GXBB clk controller driver")
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Patch based on khilman/linux-amlogic.g
("meson: clk: Add support for clock gates")
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Patch based on khilman/linux-amlogic.git master branch.
I don't have a meson8b HW so this patch so this patch has not been
tested on real HW.
drivers/clk/meson/meson8b.c | 1 -
1
On Thu, 2017-01-26 at 15:57 -0800, Stephen Boyd wrote:
> On 01/25, Jerome Brunet wrote:
> >
> > During meson8b clock probe, clk81 register address is fixed twice.
> > First using the meson8b_clk_gates array, then by directly changing
> > meson8b_clk81 register.
> &g
reset with shared reset")
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Hi Philipp,
I found this issue while testing your patch [0]
It fixes a regression we have been having with usb. On meson-gxbb
platforms, usb0 and usb1 share the same reset line. Martin had
reports that usb0 rec
On Wed, 2017-02-15 at 00:36 +0100, Martin Blumenstingl wrote:
> Hi Philipp,
>
> sorry for the late reply.
> unfortunately my GXBB board (which is supported by the driver below)
> is dead.
> I CC'ed Jerome Brunet - maybe he can give it a go on one of his
> (GXBB) boards.
>
parameter val is not enclosed in parenthesis which is buggy when given an
expression instead of a simple value
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/clkc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/clkc.h b/d
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/meson8b.c | 103
drivers/clk/meson/meson8b.h | 20 -
2 files changed, 122 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk
This patch adds new callbacks to the meson-mpll driver to control
and set the pll rate. For this, we also need to add the enable bit and
sdm enable bit. The corresponding parameters are added to mpll data
structure.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/mes
Gxbb datasheet says N2 maximum value is 127 but the register field is
9 bits wide, the maximum value should 511.
Test shows value greater than 127, all the way to 511, works well
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/clk-mpll.c | 2 +-
1 file chan
-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/gxbb.c | 28
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 1c1ec137a3cc..388b0c8838af 100644
--- a/drivers/clk/meson/gxbb.c
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/gxbb.h | 10 +-
include/dt-bindings/clock/gxbb-clkc.h | 5 +
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index dc4871
Use read/write operations for the mpll clocks instead of the
read-only ones.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/gxbb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
er on the i2s output.
These patches have been tested on the meson gxbb p200 board, as part of the
ongoing work to bring audio support for meson SoC family.
Jerome Brunet (7):
clk: meson8b: put dividers and muxes in tables
clk: gxbb: put dividers and muxes in tables
clk: meson: mpll: add rw operatio
-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/meson8b.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 888494d4fb8a..44c24bf754cd 100644
--- a/drivers/clk/meson/meson8b.c
On Tue, 2017-02-28 at 13:26 -0800, Stephen Boyd wrote:
> On 02/28, Jerome Brunet wrote:
> > parameter val is not enclosed in parenthesis which is buggy when
> > given an
> > expression instead of a simple value
> >
> > Signed-off-by: Jerome Brunet <
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Documentation/devicetree/bindings/sound/everest,es7134.txt | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/everest,es7134.txt
diff --git a/Documentation/devicetree/bindings
This patchset adds the support for the es7134 from Everest Semiconductor.
The es7134 is simple i2s DAC with no configuration interface.
It has been tested on Amlogic's meson-gxbb-p200 board.
Jerome Brunet (2):
ASoC: es7134: add es7134 DAC driver
ASoC: es7134: add dt-bindings for the es7134
_ids),
+ },
+ .probe = es7134_probe,
+ .remove = es7134_remove,
+};
+
+module_platform_driver(es7134_driver);
+
+MODULE_DESCRIPTION("ASoC ES7134 audio codec driver");
+MODULE_AUTHOR("Jerome Brunet <jbru...@baylibre.com>");
+MODULE_LICENSE("GPL");
--
2.9.3
From: Neil Armstrong
Signed-off-by: Neil Armstrong
---
drivers/spi/spi-meson-spifc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-meson-spifc.c b/drivers/spi/spi-meson-spifc.c
index 2465259..616566e 100644
---
the kernel to properly deactivate this if necessary.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
b/drivers/pinctrl/meson/p
This patch series adds the necessary pins, clocks and device tree nodes to
enable the spifc controller on the GXBB family. I had to add the nand pins
in pintctrl as the pinmux setting left by u-boot was conflicting with the
spifc pinmux during my test on the P200.
Jerome Brunet (4):
pinctrl
Add EE domains pins for the SPI flash controller
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
b/drivers/pinctrl/meson/p
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/clk/meson/gxbb.h | 2 +-
include/dt-bindings/clock/gxbb-clkc.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
From: Neil Armstrong
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/spi/spi-meson.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt
From: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 762f368..b35fc94 100644
---
Add EE domains pins for the i2c devices A,B,C
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
b/drivers/pinctrl
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 762f3681a49c..49e803e42e10
From: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
controller pins from spifc_* to nor_* to keep the
name aligned with the datasheet
Jerome Brunet (3):
pinctrl: amlogic: gxbb: add spi nor pins
pinctrl: amlogic: gxbb: add nand pins
ARM64: dts: amlogic: add spi nor pins
Neil Armstrong (1):
ARM64: dts: meson-gxbb: Add SPIFC node
arch/arm64
Add EE domains pins for the SPI flash controller
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
b/drivers/pinctrl/meson/p
the kernel to properly deactivate this if necessary.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Acked-by: Kevin Hilman <khil...@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/pinctrl/m
On Tue, 2016-10-25 at 20:20 +0200, Linus Walleij wrote:
> On Tue, Oct 25, 2016 at 5:31 PM, Jerome Brunet <jbru...@baylibre.com>
> wrote:
> >
> > On Tue, 2016-10-25 at 15:47 +0100, Marc Zyngier wrote:
>
> >
> > >
> > > Is gpio_to
On Tue, 2016-10-25 at 20:10 +0200, Linus Walleij wrote:
> On Tue, Oct 25, 2016 at 4:47 PM, Marc Zyngier <marc.zyng...@arm.com>
> wrote:
> >
> > On 25/10/16 15:22, Jerome Brunet wrote:
>
> >
> > >
> > > There is a few problems to guarant
On Thu, 2016-10-27 at 10:32 +0100, Mark Rutland wrote:
> On Wed, Oct 26, 2016 at 04:42:35PM -0500, Rob Herring wrote:
> >
> > On Wed, Oct 19, 2016 at 05:21:13PM +0200, Jerome Brunet wrote:
> > >
> > >
> > > This commit adds the device tree bin
On Wed, 2016-10-26 at 16:44 +0200, Linus Walleij wrote:
> On Wed, Oct 26, 2016 at 4:23 PM, Jerome Brunet <jbru...@baylibre.com>
> wrote:
> >
> > [Me]
> > >
> > > We usually refer to the local numberspace on the GPIO controller
> > > as &quo
On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
> >
> On 25/10/16 10:14, Linus Walleij wrote:
> >
> > On Fri, Oct 21, 2016 at 11:06 AM, Jerome Brunet <jbrunet@baylibre.c
> > om> wrote:
> >
> > >
> > > >
>
On Tue, 2016-10-25 at 14:38 +0100, Marc Zyngier wrote:
> On 25/10/16 14:08, Jerome Brunet wrote:
> >
> > On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote:
> > >
> > > >
> > > >
> > > On 25/10/16 10:14, Linus Walleij wrote:
> >
On Tue, 2016-10-25 at 15:47 +0100, Marc Zyngier wrote:
>
> > > But why are those number different? Why don't you use the same
> > > namespace? If gpio == hwirq, all your problems are already
> > > solved. If
> > > you don't find the mapping in the irqdomain, then there is no
> > > irq,
> > > end
Add description for the interrupt-parent property of the gpio sub-node
If provided here, this property must be a phandle to an interrupt
controller suitable for meson pinctrl, like the meson gpio interrupt
controller.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Jerome Brunet
Add the ability for gpio to request irq from the gpio interrupt controller
if present. We have to specificaly that the parent interrupt controller is
the gpio interrupt controller because gpio on meson SoCs can't generate
interrupt directly on the GIC.
Signed-off-by: Jerome Brunet <j
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 11 +++
arch/arm/boot/dts/meson8b.dtsi | 11 +++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 45619f6162c5..713a22
This commit adds the device tree bindings description for Amlogic's GPIO
interrupt controller available on the meson8, meson8b and gxbb SoC families
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Rob, I did not include the Ack you gave for the RFC as bindings have slightly
c
-jbru...@baylibre.com
Jerome Brunet (9):
irqchip: meson: add support for gpio interrupt controller
dt-bindings: interrupt-controller: add DT binding for meson GPIO
interrupt controller
pinctrl: meson: update pinctrl data with gpio irq data
pinctrl: meson: allow gpio to request irq
dt
Add select MESON_IRQ_GPIO in Kconfig for Amlogic's meson8 and meson8b SoC
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm/mach-meson/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index b6e3ac
Add description for the interrupt-parent property of the gpio sub-node
If provided here, this property must be a phandle to an interrupt
controller suitable for meson pinctrl, like the meson gpio interrupt
controller.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Jerome Brunet
and
polarity) any single SoC pad to one of the 8 GIC's interrupts it owns.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-meson-gpio.c | 423 +++
3
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index aad639ab0112..5208cb80b55e
Add the ability for gpio to request irq from the gpio interrupt controller
if present. We have to specificaly that the parent interrupt controller is
the gpio interrupt controller because gpio on meson SoCs can't generate
interrupt directly on the GIC.
Signed-off-by: Jerome Brunet <j
Add select MESON_IRQ_GPIO in Kconfig for Amlogic's meson8 and meson8b SoC
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm/mach-meson/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index b6e3ac
://lkml.kernel.org/r/1448987062-31225-1-git-send-email-ca...@caione.org
[2] :
http://lkml.kernel.org/r/1475593708-10526-1-git-send-email-jbru...@baylibre.com
[3] :
http://lkml.kernel.org/r/1476871709-8359-1-git-send-email-jbru...@baylibre.com
Jerome Brunet (9):
irqchip: meson: add support for gpio interrupt
Add select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index cfbdf0
Add select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index cfbdf0
Add the ability for gpio to request irq from the gpio interrupt controller
if present. We have to specificaly that the parent interrupt controller is
the gpio interrupt controller because gpio on meson SoCs can't generate
interrupt directly on the GIC.
Signed-off-by: Jerome Brunet <j
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm/boot/dts/meson8.dtsi | 11 +++
arch/arm/boot/dts/meson8b.dtsi | 11 +++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 45619f6162c5..713a22
This patch extends meson's pinctrl SoC specific data by adding the gpio
irq base number and the compatible controller for each SoC. This will
allow gpios to request an interrupt on the gpio interrupt controller
using this base irq number the pin offset inbank
Signed-off-by: Jerome Brunet <j
This commit adds the device tree bindings description for Amlogic's GPIO
interrupt controller available on the meson8, meson8b and gxbb SoC families
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Rob, I did not include the Ack you gave for the RFC as bindings have slightly
changed
and
polarity) any single SoC pad to one of the 8 GIC's interrupts it owns.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-meson-gpio.c | 423 +++
3
This patch extends meson's pinctrl SoC specific data by adding the gpio
irq base number and the compatible controller for each SoC. This will
allow gpios to request an interrupt on the gpio interrupt controller
using this base irq number the pin offset inbank
Signed-off-by: Jerome Brunet <j
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index aad639ab0112..5208cb80b55e
On Mon, 2016-11-21 at 21:35 -0800, Florian Fainelli wrote:
> Le 21/11/2016 à 08:47, Andrew Lunn a écrit :
> >
> > >
> > > What I did not realize when doing this patch for the realtek
> > > driver is
> > > that there is already 6 valid modes defined in the kernel
> > >
> > > #define
On Thu, 2016-11-24 at 18:10 +0100, Martin Blumenstingl wrote:
> On Thu, Nov 24, 2016 at 5:01 PM, Jerome Brunet <jbru...@baylibre.com>
> wrote:
> >
> > On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote:
> > >
> > > Hi Jerome,
> > >
&
On Mon, 2016-11-28 at 13:31 +0100, Andreas Färber wrote:
> Am 28.11.2016 um 10:46 schrieb Jerome Brunet:
> >
> > Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
> > ---
> > arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 16
> >
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Tested-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Reviewed-by: Andreas Färber <afaer...@suse.de>
Tested-by: Neil Armstrong <narmstr...@baylibre.com>
---
Documentation/devicetree/bindings/net/phy.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devic
79742524-30222-1-git-send-email-jbru...@baylibre.com
[3] :
http://lkml.kernel.org/r/1480326409-25419-1-git-send-email-jbru...@baylibre.com
Jerome Brunet (4):
net: phy: add an option to disable EEE advertisement
dt-bindings: net: add EEE capability constants
dt: bindings: add ethernet phy eee
provides a convenient way for these
platforms to disable EEE advertisement and work around the issue.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Tested-by: Yegor Yefremov <yegorsli...@googlemail.com>
Tested-by: Andreas Färber <afaer...@suse.de>
Tested-by: Neil Armstrong <na
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Tested-by: Yegor Yefremov <yegorsli...@googlemail.com>
Tested-by: Andreas Färber <afaer...@suse.de>
Tested-by: Neil Armstrong <narmstr...@baylibre.com>
---
include/dt-bindings/net/mdio.h | 19 +++
1 fil
On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote:
> Hi Jerome,
>
> On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet <jbru...@baylibre.com>
> wrote:
> >
> > This patchset fixes an issue with the OdroidC2 board (DWMAC +
> > RTL8211F).
> > Initi
provides a convenient way for these
platforms to disable EEE advertisement and work around the issue.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/net/phy/phy.c| 3 ++
drivers/net/phy/phy_device.c | 80 +++-
include/linux
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Documentation/devicetree/bindings/net/phy.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/phy.txt
b/Documentation/devicetree/bindings/net/phy.txt
index 4627da3d52c4..54749b60a466
79220154-25851-1-git-send-email-jbru...@baylibre.com
[2] :
http://lkml.kernel.org/r/1479742524-30222-1-git-send-email-jbru...@baylibre.com
Jerome Brunet (4):
net: phy: add an option to disable EEE advertisement
dt-bindings: net: add EEE capability constants
dt: bindings: add ethernet phy eee
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
include/dt-bindings/net/mdio.h | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 include/dt-bindings/net/mdio.h
diff --git a/include/dt-bindings/net/mdio.h b/include/dt-bindings/net/mdio.h
new file mode
t;alexandre.tor...@st.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
Tested-by: Andre Roth <neol...@gmail.com>
---
drivers/net/phy/realtek.c | 65 ++-
1 file changed, 64 inse
On Wed, 2016-11-16 at 22:36 +0530, Anand Moon wrote:
> Hi Jerome.
>
> On 15 November 2016 at 19:59, Jerome Brunet <jbru...@baylibre.com>
> wrote:
> >
> > On some platforms, energy efficient ethernet with rtl8211 devices
> > is
> > causing
to disable EEE
advertisement, through device tree, for the phy version supporting EEE.
Then EEE is disabled in the OdroidC2 device tree for Gigabit speed.
100M is not affected by this issue.
Jerome Brunet (3):
net: phy: realtek: add eee advertisement disable options
dt-bindings: net: add DT
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
.../devicetree/bindings/net/realtek-phy.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings
Reported-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
Cc: Giuseppe Cavallaro <peppe.cavall...@st.com>
Cc: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre
On Tue, 2016-11-15 at 09:03 -0800, Florian Fainelli wrote:
> On 11/15/2016 08:30 AM, Andrew Lunn wrote:
> >
> > On Tue, Nov 15, 2016 at 03:29:12PM +0100, Jerome Brunet wrote:
> > >
> > > On some platforms, energy efficient ethernet with rtl8211 devices
&
On Wed, 2016-11-16 at 09:11 -0600, Rob Herring wrote:
> On Tue, Nov 15, 2016 at 03:29:13PM +0100, Jerome Brunet wrote:
> >
> > Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
> > Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
> > ---
> >
On Wed, 2016-11-16 at 14:23 +0100, Andrew Lunn wrote:
> >
> > There two kind of PHYs supporting eee, the one advertising eee by
> > default (like realtek) and the one not advertising it (like
> > micrel).
This is just the default register value.
>
> I don't know too much about EEE. So maybe a
On Wed, 2016-11-16 at 16:06 +0100, Andrew Lunn wrote:
> On Wed, Nov 16, 2016 at 03:51:30PM +0100, Jerome Brunet wrote:
> >
> > On Wed, 2016-11-16 at 14:23 +0100, Andrew Lunn wrote:
> > >
> > > >
> > > >
> > > > Th
On Thu, 2016-11-17 at 23:30 +0530, Anand Moon wrote:
> Hi Jerone,
>
> > > How about adding callback functionality for .soft_reset to handle
> > > BMCR
> > > where we update the Auto-Negotiation for the phy,
> > > as per the datasheet of the rtl8211f.
I think BMCR is already pretty well handled
provides a convenient way for these
platforms to disable EEE advertisement and work around the issue.
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/net/phy/phy.c| 3 ++
drivers/net/phy/phy_device.c | 80 +++-
include/linux
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Documentation/devicetree/bindings/net/phy.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/phy.txt
b/Documentation/devicetree/bindings/net/phy.txt
index bc1c3c8bf8fa..7f066b7c1e2c
, I can rebase on
net-next instead.
Chnages since V1: [1]
- Disable the advertisement of EEE in the generic code instead of the
realtek driver.
[1] :
http://lkml.kernel.org/r/1479220154-25851-1-git-send-email-jbru...@baylibre.com
Jerome Brunet (3):
net: phy: add an option to disable EEE
On Mon, 2016-11-21 at 17:01 +0100, Andrew Lunn wrote:
> On Mon, Nov 21, 2016 at 04:35:23PM +0100, Jerome Brunet wrote:
> >
> > Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
> > ---
> > Documentation/devicetree/bindings/net/phy.txt | 5 +
On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:
> Jerome,
>
> On 19/10/16 16:21, Jerome Brunet wrote:
> >
> > Add support for the interrupt gpio controller found on Amlogic's
> > meson
> > SoC family.
> >
> > Unlike what the IP name sugge
On Thu, 2016-10-20 at 21:21 +0200, Linus Walleij wrote:
> On Wed, Oct 19, 2016 at 12:08 PM, Jerome Brunet <jbru...@baylibre.com
> > wrote:
>
> >
> > Add the ability for gpio to request irq from the gpio interrupt
> > controller
> > if present. We have t
On Fri, 2016-10-21 at 11:10 +0100, Mark Rutland wrote:
> On Fri, Oct 21, 2016 at 10:49:11AM +0200, Jerome Brunet wrote:
> >
> > On Thu, 2016-10-20 at 17:33 +0100, Marc Zyngier wrote:
> > >
> > > On 19/10/16 16:21, Jerome Brunet wrote:
> > > &
On Thu, 2017-01-12 at 16:52 -0800, Kevin Hilman wrote:
> Jerome Brunet <jbru...@baylibre.com> writes:
>
> >
> > OdroidC2 GbE link breaks under heavy tx transfer. This happens even
> > if the
> > MAC does not enable Energy Efficient Ethernet (No Low Pow
On Mon, 2016-11-28 at 09:54 -0800, Florian Fainelli wrote:
> On 11/28/2016 07:50 AM, Jerome Brunet wrote:
> >
> > This patchset fixes an issue with the OdroidC2 board (DWMAC +
> > RTL8211F).
> > The platform seems to enter LPI on the Rx path too often while
> >
On Fri, 2017-01-06 at 11:42 +, Russell King - ARM Linux wrote:
> On Fri, Jan 06, 2017 at 11:11:36AM +0100, Jerome Brunet wrote:
> >
> > The purpose of this patch is to provide a way to mark as broken a
> > particular eee mode. At first, it had nothin
On Thu, 2017-01-05 at 23:25 +, Russell King - ARM Linux wrote:
> On Mon, Nov 28, 2016 at 09:54:28AM -0800, Florian Fainelli wrote:
> >
> > If we start supporting generic "enable", "disable" type of
> > properties
> > with values that map directly to register definitions of the HW, we
> >
com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
Documentation/devicetree/bindings/net/phy.txt | 10 --
include/dt-bindings/net/mdio.h| 19 ---
2 files changed, 8 insertions(+), 21 deletions(-)
delete mode 100644 include/dt-bindings/net/
e EEE advertisement")
Reported-by: Julia Lawall <julia.law...@lip6.fr>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
drivers/net/phy/phy_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_devic
r each EEE broken mode.
[0]:
http://lkml.kernel.org/r/1480326409-25419-1-git-send-email-jbru...@baylibre.com
[1]:
http://lkml.kernel.org/r/1480348229-25672-1-git-send-email-jbru...@baylibre.com
[2]: http://lkml.kernel.org/r/e14a3b0c-dc34-be14-48b3-518a0ad0c...@gmail.com
Jerome Brunet (3):
net
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