The MSB of the first byte read via I2C seems to indicate whether the
data is valid (or ready) when an interrupt is raised. Previously, this
bit was ignored, which resulted in a lot of incorrect detections of
finger removed events.
Signed-off-by: Paul Cercueil p...@crapouillou.net
---
drivers
-off-by: Paul Cercueil p...@crapouillou.net
---
v2: Fix commit message
drivers/input/touchscreen/goodix.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/input/touchscreen/goodix.c
b/drivers/input/touchscreen/goodix.c
index ca19668..9fa6c5f 100644
--- a/drivers/input/touchscreen
: Move the detection of clang after the inclusion of the
arch/*/Makefile (as they might set $(CROSS_COMPILE))
Signed-off-by: Paul Cercueil p...@crapouillou.net
---
Makefile | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/Makefile b/Makefile
index fbd43bf..e1e8c7e
.
Signed-off-by: Paul Cercueil p...@crapouillou.net
---
Makefile | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/Makefile b/Makefile
index 54430f9..5fff1b2 100644
--- a/Makefile
+++ b/Makefile
@@ -335,15 +335,6 @@ endif
export KBUILD_MODULES KBUILD_BUILTIN
export
()
fails, the driver no longer reverts to using the internal vref,
but returns an error instead.
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/ad5064.c | 36 +++-
include/linux/platform_data/ad5064.
-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/ad5064.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
v2: No change in this patch
diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
index e77631d..18674e5 100644
--- a/drive
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
.../devicetree/bindings/iio/dac/ad5064.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5064.txt
v2: No change in this patch
diff
This patch adds support for the AD5592R (spi) and AD5593R (i2c)
ADC/DAC devices.
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/Kconfig | 27
drivers/iio/dac/Makefile | 3 +
drivers/iio/dac/ad5592r-base.c
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
.../devicetree/bindings/iio/dac/ad5592r.txt| 43 ++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5592r.txt
v2: Fix indentation issue
diff
()
fails, the driver no longer reverts to using the internal vref,
but returns an error instead.
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/ad5064.c | 36 +++-
include/linux/platform_data/ad5064.
This patch adds support for the AD5592R (spi) and AD5593R (i2c)
ADC/DAC devices.
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/Kconfig | 22 +++
drivers/iio/dac/Makefile | 2 +
drivers/iio/dac/ad5592r-base.c
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
.../devicetree/bindings/iio/dac/ad5592r.txt| 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5592r.txt
diff --git a/Documentation/devicetree/bi
-by: Paul Cercueil <paul.cercu...@analog.com>
---
drivers/iio/dac/ad5064.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
index 7146f42..daee39e 100644
--- a/drivers/iio/dac/ad5064.c
+++ b/drivers/iio/dac/ad
Signed-off-by: Paul Cercueil <paul.cercu...@analog.com>
---
.../devicetree/bindings/iio/dac/ad5064.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5064.txt
diff --git a/Documentation/devicetree/bindin
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
v2: Added changelog; nothing else changed
v1: First version of this patch
drivers/tty/serial/8250/8250_ingenic.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_ingenic.c
b/d
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/tty/serial/8250/8250_ingenic.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_ingenic.c
b/drivers/tty/serial/8250/8250_ingenic.c
index 155b785..aa1f156 100644
--- a/drive
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/rtc/rtc-jz4740.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 47617bd..3914b1c 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drive
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 2 ++
arch/mips/jz4740/reset.c | 64 --
2 files changed, 2 insertions(+), 64 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../devicetree/bindings/rtc/ingenic,jz4740-rtc.txt | 38 ++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
diff --git a/Documentation/devicetree/bi
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/rtc/Kconfig | 6 +++---
drivers/rtc/rtc-jz4740.c | 50 ++--
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index e
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/rtc/rtc-jz4740.c | 77
1 file changed, 77 insertions(+)
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 3914b1c..f53cfd6 100644
--- a/drivers/rtc/rtc-jz
Hi,
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there should only be 1 node.
Well, that's what I had until Linus W. just told me to do the opposite:
Just pull all these down two
Le 2017-01-31 15:05, Linus Walleij a écrit :
If I didn't mention before this could pperhaps just use "pins"?
You commented this on v2 after I sent the v3 :)
I will fix it for v4.
If you just use "pins" can this even be parsed by a generic parser
function
Le 2017-01-31 15:20, Linus Walleij a écrit :
+ of_property_read_u32(dev->of_node, "base", >gc.base);
Remove this. Dynamic allocation should be fine, if you're using the
new userspace ABI like tools/gpio/* or libgpiod and only that and
in-kernel
consumers, dynamic numbers are just fine.
This commit adds documentation for the devicetree bidings of the
pinctrl-gpio driver, which handles GPIOs of the Ingenic SoCs
currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../devicetree/bindings/gpio/ingenic,gpio.txt
This driver handles pin configuration and pin muxing for the
JZ4740 and JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pinctrl/Kconfig | 8 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-ingenic.c
For a description of the pinctrl devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.
This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/i
There is a pinctrl driver for each of the Ingenic SoCs supported by the
upstream Linux kernel. In order to switch away from the old GPIO
platform code, we now enable the pinctrl drivers by default for the
Ingenic SoCs.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/Kconf
All the drivers for the various hardware elements of the jz4740 SoC have
been modified to use the pinctrl framework for their pin configuration
needs.
As such, this platform code is now unused and can be deleted.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/include/as
This driver handles the GPIOs of all the Ingenic JZ47xx SoCs
currently supported by the upsteam Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/gpio/Kconfig| 10 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-ingenic.c
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/video/fbdev/jz4740_fb.c | 104 ++--
1 file changed, 3 inse
For a description of the devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
connected PWM pins in PWM function
mode, since those are not used by other drivers nor by GPIOs on the
board.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pwm/pwm-jz4740.c | 29 -
1 file changed, 29 deletions(-)
v2: No changes
diff --git a/d
We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/ci20.dts | 60 +
1 file changed, 60 insertions(+)
v2: Changed the devicetree bindings to match t
Before, this NAND driver would set itself the configuration of the
chip-select pins for the various NAND banks.
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.
Hi,
This is the v2 of my ingenic pinctrl patch series.
Huge changes in there, the pinctrl driver was completely rewritten, and the
GPIO code was split into a separate driver.
It now uses the generic functions to handle pin groups, as well as generic
devicetree bindings.
Best regards,
- Paul
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/mmc/host/jz4740_mmc.c | 45 +--
1 file changed, 5 inse
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../bindings/pinctrl/ingenic,pinct
Hi Kbuild Test Robot,
drivers/mmc/host/jz4740_mmc.c: In function 'jz4740_mmc_set_ios':
drivers/mmc/host/jz4740_mmc.c:864:7: error: implicit declaration of
function 'gpio_is_valid' [-Werror=implicit-function-declaration]
if (gpio_is_valid(host->pdata->gpio_power))
^
Uuh, I'm
Le 2017-01-19 11:55, Ulf Hansson a écrit :
Shouldn't this be replaced with a call to:
pinctrl_pm_select_sleep_state();
You're totally right. I'll change it.
Thanks,
-Paul
Hi,
So I still don't understand these properties.
Does this mean that there is a pull-up *inside* the SoC or *outside*
on the board where it is mounted?
The pull-up resistors are inside the SoCs.
In the former case, if this pertains to the *inside* of the SoC:
is it just different between
All the drivers for the various hardware elements of the jz4740 SoC have
been modified to use the pinctrl framework for their pin configuration
needs.
As such, this platform code is now unused and can be deleted.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/include/as
Before, this NAND driver would set itself the configuration of the
chip-select pins for the various NAND banks.
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.
connected PWM pins in PWM function
mode, since those are not used by other drivers nor by GPIOs on the
board.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pwm/pwm-jz4740.c | 29 -
1 file changed, 29 deletions(-)
v2: No changes
v3: No changes
There is a pinctrl driver for each of the Ingenic SoCs supported by the
upstream Linux kernel. In order to switch away from the old GPIO
platform code, we now enable the pinctrl drivers by default for the
Ingenic SoCs.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/Kconf
For a description of the pinctrl devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Ulf Hansson <ulf.hans...@linaro.org>
---
drivers/mmc/host/jz474
We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/ci20.dts | 60 +
1 file changed, 60 insertions(+)
v2: Changed the devicetree bindings to match t
This driver handles the GPIOs of all the Ingenic JZ47xx SoCs
currently supported by the upsteam Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/gpio/Kconfig| 10 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-ingenic.c
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../bindings/pinctrl/ingenic,pinct
This driver handles pin configuration and pin muxing for the
JZ4740 and JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pinctrl/Kconfig | 8 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-ingenic.c
Hi,
This is my v3 of my ingenic pinctrl patch series.
Not much is changed here, just cosmetic changes reported by coccinelle
as well as a missing header include.
To clear up any doubts: I left the GPIO base for the gpio-ingenic driver
configurable, for the reason that the QI_LB60 platform still
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/video/fbdev/jz4740_fb.c | 104 ++--
1 file changed, 3 inse
For a description of the devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.
This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/i
This commit adds documentation for the devicetree bidings of the
pinctrl-gpio driver, which handles GPIOs of the Ingenic SoCs
currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../devicetree/bindings/gpio/ingenic,gpio.txt
Le 2017-02-20 14:56, Linus Walleij a écrit :
On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil <p...@crapouillou.net>
wrote:
I was thinking that instead of having one pinctrl-ingenic instance
covering
0x600 of register space, and 6 instances of gpio-ingenic having 0x100
each,
I could just
Hi,
What some drivers do when they just get/set a bit in a register
to get/set or set the direction of a GPIO, is to select GPIO_GENERIC
and just bgpio_init() with the right iomem pointers, then the core
will register handlers for get, set, set_direcition callback and
get_direction and your
Le 2017-01-31 14:09, Linus Walleij a écrit :
On Tue, Jan 31, 2017 at 11:31 AM, Paul Cercueil <p...@crapouillou.net>
wrote:
[Rob]:
From the overlapping register addresses in the examples and this
description, it looks like the pinctrlr and gpio controller are 1
block.
If so, then there
Le 2017-01-18 08:27, Thierry Reding a écrit :
On Wed, Jan 18, 2017 at 12:14:21AM +0100, Paul Cercueil wrote:
All the drivers for the various hardware elements of the jz4740 SoC
have been modified to use the pinctrl framework for their pin
configuration needs. As such, this platform code
Le 2017-01-18 08:15, Thierry Reding a écrit :
On Wed, Jan 18, 2017 at 12:14:08AM +0100, Paul Cercueil wrote:
[...]
One problem still unresolved: the pinctrl framework does not allow us
to configure each pin on demand (someone please prove me wrong), when
the various PWM channels
There is a pinctrl driver for each of the Ingenic SoCs supported by the
upstream Linux kernel. In order to switch away from the old GPIO
platform code, we now enable the pinctrl drivers by default for the
Ingenic SoCs.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/Kconf
From: Paul Burton <paul.bur...@imgtec.com>
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration, pin muxing
and GPIOs of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercu
ration will permit the
reuse of large parts of the driver to support the other SoCs from
Ingenic.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/ingenic/Kconfig
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.
This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/i
Hi,
This set of patches introduces a new pinctrl driver for the Ingenic
JZ4740 and JZ4780, which handles pin configuration, pin muxing and
GPIO config for those MIPS SoCs.
The initial driver was developed by to Paul Burton, so I'll expect his
Signed-Off-By to be added to each patch. It has been
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/mmc/host/jz4740_mmc.c | 59 ++-
1 file changed, 2 inse
All the drivers for the various hardware elements of the jz4740 SoC have
been modified to use the pinctrl framework for their pin configuration
needs.
As such, this platform code is now unused and can be deleted.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/include/as
Before, this NAND driver would set itself the configuration of the
chip-select pins for the various NAND banks.
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.
of its connected PWM pins in PWM function
mode, if those are not used by other drivers nor by GPIOs on the
board.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pwm/pwm-jz4740.c | 29 -
1 file changed, 29 deletions(-)
diff --git a/drivers/pwm/pwm-jz47
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/video/fbdev/jz4740_fb.c | 104 ++--
1 file changed, 3 inse
For a description of the devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 333 +
1 file changed, 333 insertions(+)
This driver reuses the core of the driver already present in
pinctrl-ingenic.c, and just supplies callbacks to perform the low-level
operations.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/pinctrl/ingenic/Kconfig | 6 ++
drivers/pinctrl/ingenic/Ma
For a description of the devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 275 +
1 file changed, 275 insertions(+)
We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
arch/mips/boot/dts/ingenic/ci20.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arc
Le 2017-01-20 09:40, Linus Walleij a écrit :
On Thu, Jan 19, 2017 at 12:19 PM, Paul Cercueil <p...@crapouillou.net>
wrote:
The problem with pinctrl and PWM, is that the pinctrl API works by
"states". A default state, sleep state, and basically any custom state
that the dev
Le 2017-01-19 10:07, Linus Walleij a écrit :
On Wed, Jan 18, 2017 at 12:14 AM, Paul Cercueil <p...@crapouillou.net>
wrote:
All the drivers for the various hardware elements of the jz4740 SoC
have been modified to use the pinctrl framework for their pin
configuration
On 03/11/2016 17:21, Dmitry Torokhov wrote:
On Tue, Nov 01, 2016 at 11:25:03AM +0100, Paul Cercueil wrote:
Right now, the gpio-keys driver is mostly used with EV_KEY event types.
However, this driver (and its devicetree bindings) support specifying
a different input type, like EV_ABS, even
This patch set is a v2 of a patchset I sent in March.
The previous patch 5/5 was garbage and has been dropped.
It was garbage, for two reasons:
- It enforced the jz4740-rtc as the system power controller in the
SoC devicetree file, which introduced policy (maybe the jz4740-based
boards want
The RTC unit present in the JZ4780 works mostly the same as the one in
the JZ4740. The major difference is that register writes need to be
explicitly enabled, by writing a magic code (0xA55A) to a "write
enable" register before each access.
Signed-off-by: Paul Cercueil <p...@cr
This commit removes two things:
- The platform_device that corresponds to the RTC driver, since we now
probe this driver from devicetree;
- The platform power-off code, since all the jz4740-based platforms are
now using the jz4740-rtc driver as the system power controller.
Signed-off-by: Paul
This commit adds documentation for the device-tree bindings of the
jz4740-rtc driver, which supports the RTC unit present in the JZ4740 and
JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
..
See
Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
for a description of the bindings.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
drivers/rtc/rtc-jz4740.c | 16 +++-
1 file changed, 15 inse
/ingenic,jz4740-rtc.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
drivers/rtc/rtc-jz4740.c | 81
1 file changed, 81 insertions(+)
v2:
- Get a handle to the 'rtc' clock
upstream.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
arch/mips/boot/dts/ingenic/qi_lb60.dts | 4
arch/mips/jz4740/board-qi_lb60.c | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
v2: New patch in this
Now that the jz4740-rtc driver supports devicetree, we can add a
devicetree node for it.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 11 +++
1 file changed, 11 inser
/ingenic,jz4740-rtc.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
drivers/rtc/rtc-jz4740.c | 81
1 file changed, 81 insertions(+)
v2:
- Get a handle to the 'rtc' clock
The RTC unit present in the JZ4780 works mostly the same as the one in
the JZ4740. The major difference is that register writes need to be
explicitly enabled, by writing a magic code (0xA55A) to a "write
enable" register before each access.
Signed-off-by: Paul Cercueil <p...@cr
See
Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
for a description of the bindings.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
drivers/rtc/rtc-jz4740.c | 16 +++-
1 file changed, 15 inse
Now that the jz4740-rtc driver supports devicetree, we can add a
devicetree node for it.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 11 +++
1 file changed, 11 inser
This commit adds documentation for the device-tree bindings of the
jz4740-rtc driver, which supports the RTC unit present in the JZ4740 and
JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
..
upstream.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Acked-by: Maarten ter Huurne <maar...@treewalker.org>
---
arch/mips/boot/dts/ingenic/qi_lb60.dts | 4
arch/mips/jz4740/board-qi_lb60.c | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
v2: New patch in th
This commit removes two things:
- The platform_device that corresponds to the RTC driver, since we now
probe this driver from devicetree;
- The platform power-off code, since all the jz4740-based platforms are
now using the jz4740-rtc driver as the system power controller.
Signed-off-by: Paul
T0X /ABS_HAT0Y axes, with two GPIOs
each with values -1/+1).
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/input/keyboard/gpio_keys.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/input/keyboard/gpio_keys.c
b/drivers/input/keyboard/gpio_keys.c
index 7018c49
-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/clk/ingenic/cgu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index e8248f9..eb9002c 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -328,6
This commit adds the support for probing the rfkill-regulator
from devicetree.
Information about the devicetree bindings can be found here:
Documentation/devicetree/bindings/net/rfkill-regulator.txt
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
net/rfkill/rfkill-regulator.
This document gives information about how to write a devicetree
node that corresponds to the rfkill-regulator driver.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
.../devicetree/bindings/net/rfkill-regulator.txt | 18 ++
1 file changed, 18 insertions(+)
Hi,
With this set of two commits, it is now possible to use the
gpio-keys driver with 4 GPIOs representing a hat (D-pad).
ot;key released" are silently ignored.
With this commit, keys configured as EV_ABS will inject an event with
the value 0 when released.
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
drivers/input/keyboard/gpio_keys.c | 2 ++
1 file changed, 2 insertions(+)
diff --gi
1 - 100 of 2213 matches
Mail list logo
