On 09/25/2012 02:02 AM, Sebastian Hesselbarth wrote:
During the review process of dove DT patches, Tauros2 cache
init call was changed and DT support added. This patch fixes
the call to Tauros2 init and adds a DT node. Moreover, plat/irq.h
include was missing from mach-dove/common.c.
...
diff
On 09/25/2012 07:19 AM, Andrew Lunn wrote:
Interestingly, kisskb does not show this break:
http://kisskb.ellerman.id.au/kisskb/config/308/
and yesterdays build does not have the parameter to tauros2_init().
Is the cache not enabled in dove_defconfig?
Andrew,
I checked dove_defconfig and
On 09/25/2012 07:35 AM, Andrew Lunn wrote:
On Tue, Sep 25, 2012 at 02:02:17AM +0200, Sebastian Hesselbarth wrote:
The watchdog on dove requires an interrupt that is not yet
available on DT. Therefore, the watchdog DT node is removed
until the corresponding chained intc is available.
Just
On 11/06/2012 11:32 PM, Andrew Lunn wrote:
On Tue, Nov 06, 2012 at 10:28:45PM +0100, S?ren Moch wrote:
I see a regression from linux-3.5 to linux-3.6 and think there might
be a fundamental problem
with this patch. On my Kirkwood system (guruplug server plus) with
linux-3.6.2 I see following
On 10/11/2012 10:34 AM, Daniel Mack wrote:
I recently read about the newly introduced common clock framework (ccf)
and wondered if this could be also used for external, e.g. i2c attached,
clock generators.
Based on my current understanding of the framework I wrote such a
driver and now I want
On 10/27/2012 06:33 PM, Thomas Petazzoni wrote:
On Sat, 27 Oct 2012 18:22:45 +0200, Gregory CLEMENT wrote:
This platform, available from Globalscale has an Armada 370. For now,
only the serial port is supported. Support for network, USB and other
peripherals will be added as drivers for them
On 10/15/2012 02:18 PM, Gregory CLEMENT wrote:
Add Armada 370/XP specific clocks: core clocks and CPU clocks.
The CPU clocks are only for Armada XP for the SMP mode.
...
+static struct core_clk_fn armada_370_clk_fn = {
+ .get_tclk_freq = armada_370_get_tclk_freq,
+ .get_pck_freq =
On 11/11/2012 02:44 PM, Axel Lin wrote:
Current implementation in dove_audio1_ctrl_set() does not clear corresponding
register bit if BIT(0|1|2|3) of config is clear. Fix it.
Signed-off-by: Axel Linaxel@ingics.com
Axel,
thanks for the hint on not clearing the audio1 bits before setting
On 11/11/2012 02:46 PM, Axel Lin wrote:
Move the code checking valid config to dove_audio1_ctrl_set(), this ensures we
always set valid config. And then dove_audio1_ctrl_get() always returns correct
config.
Signed-off-by: Axel Linaxel@ingics.com
Axel,
although correct in a software
Adding LAKML and devtree as there might be people willing to comment about
DT representation of i2c-attached clock generators, too.
On 10/12/2012 08:17 PM, Daniel Mack wrote:
On 11.10.2012 18:00, Sebastian Hesselbarth wrote:
[...]
Does any of you work rely on a working si5351 driver?
Yes
On 10/14/2012 01:13 PM, Daniel Mack wrote:
I think the sub-node style above it nicer because it allows referencing
the individual clocks outputs with a phandle. We use this chip to
generate base-frequencies for audio clocks, and so we have to switch
between two freqs for the multiples of 22.5KHz
The common clock api provides some helpers for clk-providers but does
not export these helpers. This hinders clk-providers to be built as modules.
This patch adds __clk_get_flags() to the list of exported symbols.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Mike
Calling clk-si5351 driver non-OF ready was too early. This patch
makes clk-si5351 depend on CONFIG_OF again, until things get sorted out.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Reported-by: Stephen Rottweil s...@canb.auug.org.au
---
Cc: Stephen Rothwell s
On 04/15/2013 07:04 AM, Stephen Rothwell wrote:
After merging the clk tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
ERROR: of_clk_add_provider [drivers/clk/clk-si5351.ko] undefined!
ERROR: of_clk_src_onecell_get [drivers/clk/clk-si5351.ko] undefined!
Stephen,
I must
Hi,
I am rewriting Marvell Kirkwood/Dove audio driver and I am having
a hard time to match the controllers features to ASoC API.
The controller has a dma controller for one playback buffer. It can
play the stream to both I2S and SPDIF interfaces with independent mute.
Now, for example, I have
switch.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Mike Turquette mturque...@linaro.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/clk.c|8
include/linux/clk-provider.h |1 +
2 files changed
for clock generators with empty eeprom
configuration. Corresponding device tree binding documentation is
also added.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Daniel Mack zon...@gmail.com
---
Changes from v4:
- move from clk-private.h to clk-provider.h (Reported
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc
the reg property can
be overwritten in the board file later. To encourage people to finally set the
actual phy address, the mdiobus scan is noisier than required.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
On 04/08/2013 12:50 AM, Guenter Roeck wrote:
On Fri, Apr 05, 2013 at 05:23:35AM -, Sebastian Hesselbarth wrote:
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver supports
DT kernels only and VXCO feature of si5351b
On 04/08/2013 02:17 AM, Guenter Roeck wrote:
On Mon, Apr 08, 2013 at 01:49:24AM +0200, Sebastian Hesselbarth wrote:
On 04/08/2013 12:50 AM, Guenter Roeck wrote:
On Fri, Apr 05, 2013 at 05:23:35AM -, Sebastian Hesselbarth wrote:
This patch adds a common clock driver for Silicon Labs
On 04/08/2013 05:59 AM, Mike Turquette wrote:
Quoting Sebastian Hesselbarth (2013-04-04 22:22:12)
Clock providers are not allowed to mess with struct clk internals directly
but using helpers provided by clk-provider.h. This patch adds a helper to
allow to set flags of a clock after registration
On Mon, Apr 8, 2013 at 4:54 PM, Guenter Roeck li...@roeck-us.net wrote:
On Mon, Apr 08, 2013 at 08:11:38AM +0200, Sebastian Hesselbarth wrote:
On 04/08/2013 02:17 AM, Guenter Roeck wrote:
On Mon, Apr 08, 2013 at 01:49:24AM +0200, Sebastian Hesselbarth wrote:
On 04/08/2013 12:50 AM, Guenter
The common clock api provides some helpers for clk-providers but does
not export these helpers. This hinders clk-providers to be built as modules.
This patch adds __clk_get_flags() to the list of exported symbols.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Mike
On 04/08/2013 07:46 PM, Guenter Roeck wrote:
On Mon, Apr 08, 2013 at 06:46:57PM +0200, Sebastian Hesselbarth wrote:
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver does not
support VXCO feature of si5351b. Passing
On 04/08/2013 07:36 PM, Mike Turquette wrote:
Quoting Sebastian Hesselbarth (2013-04-08 08:38:44)
On Mon, Apr 8, 2013 at 4:54 PM, Guenter Roeckli...@roeck-us.net wrote:
On Mon, Apr 08, 2013 at 08:11:38AM +0200, Sebastian Hesselbarth wrote:
On 04/08/2013 02:17 AM, Guenter Roeck wrote:
On Mon
On Tue, Apr 9, 2013 at 10:26 AM, Michal Bachraty
michal.bachr...@streamunlimited.com wrote:
For gapless tuning, there is no need for PLL reset and clkout power-down
when tuning output. silabs,gapless-tuning parameter enables gapless tuning
for specific clock output.
Michal,
does gapless
Hooray Google!
Thanks for removing plain text sending from gmail web-frontend.. *sigh*
Sorry for resending this, but HTML mails get rejected by linux mailing lists.
On 04/10/2013 04:48 PM, Michal Bachraty wrote:
Hi Sebastian,
This driver doesn't work for me. In my case, u-boot initializes
Patch net: mvmdio: get and enable optional clock was missing an
update of the corresponding device tree binding documentation. This
patch adds the clocks property to mvmdio binding documentation.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Grant Likely grant.lik
Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Lennert Buytenhek buyt...@wantstofly.org
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Andrew Lunn and...@lunn.ch
Cc: Jason
This patch moves shared private data kzalloc to managed devm_kzalloc and
cleans now unneccessary kfree and error handling.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Note that there is also an ioremap call, that could be transferred to
devm_ioremap_resource
On 04/10/2013 08:41 PM, Sergei Shtylyov wrote:
Hello.
On 04/10/2013 09:38 PM, Sebastian Hesselbarth wrote:
This patch moves shared private data kzalloc to managed devm_kzalloc and
cleans now unneccessary kfree and error handling.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba
This patch moves shared private data kzalloc to managed devm_kzalloc and
cleans now unneccessary kfree and error handling.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changes from v1:
- replaced EADDRNOTAVAIL with ENOMEM on failing ioremap (Reported by
Sergei
On 04/11/2013 05:39 AM, David Miller wrote:
From: Sebastian Hesselbarthsebastian.hesselba...@gmail.com
Date: Wed, 10 Apr 2013 22:42:07 +0200
This patch moves shared private data kzalloc to managed devm_kzalloc and
cleans now unneccessary kfree and error handling.
Signed-off-by: Sebastian
On Thu, Apr 11, 2013 at 9:44 AM, Michal Bachraty
michal.bachr...@streamunlimited.com wrote:
On Wednesday, April 10, 2013 19:27:25 Sebastian Hesselbarth wrote:
Hmm, is there any driver using the clock output? Does it
clk_prepare_enable() the clock? I tend not to mess with anything
Commit 3d604da1e9547c09c9dcc0ee443c306c9ae1a480
(net: mvmdio: get and enable optional clock)
was missing an update of the corresponding device tree binding
documentation. This patch adds the clocks property to mvmdio
binding documentation.
Signed-off-by: Sebastian Hesselbarth
This patch moves shared private data kzalloc to managed devm_kzalloc and
cleans now unneccessary kfree and error handling.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changes from v1:
- replaced EADDRNOTAVAIL with ENOMEM on failing ioremap (Reported by
Sergei
,
this patch set combines both patches into one set.
Sebastian Hesselbarth (2):
net: mv643xx_eth: add shared clk and cleanup existing clk handling
net: mv643xx_eth: use managed devm_kzalloc
Documentation/devicetree/bindings/marvell.txt |3 ++
drivers/net/ethernet/marvell/mv643xx_eth.c
Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Lennert Buytenhek buyt...@wantstofly.org
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Andrew Lunn and...@lunn.ch
Cc: Jason
This patch adds GRO support to mv643xx_eth by making it invoke
napi_gro_receive instead of netif_receive_skb.
Signed-off-by: Soeren Moch sm...@web.de
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc: Lennert Buytenhek buyt
On Thu, Apr 11, 2013 at 3:13 PM, Willy Tarreau w...@1wt.eu wrote:
On Thu, Apr 11, 2013 at 02:40:23PM +0200, Sebastian Hesselbarth wrote:
This patch adds GRO support to mv643xx_eth by making it invoke
napi_gro_receive instead of netif_receive_skb.
Signed-off-by: Soeren Moch sm...@web.de
On Thu, Apr 11, 2013 at 5:03 PM, Willy Tarreau w...@1wt.eu wrote:
On Thu, Apr 11, 2013 at 04:47:49PM +0200, Sebastian Hesselbarth wrote:
I tried todays net-next on top of 3.9-rc6 without any gro patch, with
the initial
patch (Soeren) and your proposed patch (Willy). The results show that
both
On Thu, Apr 11, 2013 at 5:32 PM, Willy Tarreau w...@1wt.eu wrote:
On Thu, Apr 11, 2013 at 05:27:03PM +0200, Sebastian Hesselbarth wrote:
I don't have a strong opinion on whether Soeren's or your proposal should
be submitted. But I insist on having one of them in, as GRO significantly
improves
On 04/11/2013 07:55 PM, Ben Hutchings wrote:
On Thu, 2013-04-11 at 14:40 +0200, Sebastian Hesselbarth wrote:
This patch adds GRO support to mv643xx_eth by making it invoke
napi_gro_receive instead of netif_receive_skb.
The inet_lro support should be removed at the same time; inet_lro is now
With recent support for GRO, there is no need to keep both LRO and
GRO. This patch therefore removes the deprecated inet_lro support
from mv643xx_eth. This is work is based on an experimental patch
provided by Eric Dumazet and Willy Tarreau.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba
On 04/11/2013 09:46 PM, Eric Dumazet wrote:
On Thu, 2013-04-11 at 21:11 +0200, Sebastian Hesselbarth wrote:
With recent support for GRO, there is no need to keep both LRO and
GRO. This patch therefore removes the deprecated inet_lro support
from mv643xx_eth. This is work is based
With recent support for GRO, there is no need to keep both LRO and
GRO. This patch therefore removes the deprecated inet_lro support
from mv643xx_eth. This is work is based on an experimental patch
provided by Eric Dumazet and Willy Tarreau.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba
On 04/12/2013 08:38 PM, Mike Turquette wrote:
Quoting Michal Bachraty (2013-04-09 01:26:15)
For gapless tuning, there is no need for PLL reset and clkout power-down
when tuning output. silabs,gapless-tuning parameter enables gapless tuning
for specific clock output.
Signed-off-by: Michal
On 03/28/2013 07:14 PM, Russell King - ARM Linux wrote:
On Thu, Mar 28, 2013 at 01:06:54PM -0400, Jason Cooper wrote:
On Sat, Mar 23, 2013 at 04:06:51PM +0100, Sebastian Hesselbarth wrote:
The CPU used in Marvell Dove SoCs is a PJ4 Sheeva core. Using
CONFIG_CPU_PJ4 instead of CONFIG_CPU_V7
On Wed, Apr 3, 2013 at 1:46 AM, Mike Turquette mturque...@linaro.org wrote:
Quoting Sebastian Hesselbarth (2013-03-23 07:46:50)
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
new file mode 100644
index 000..9d0c210
--- /dev/null
+++ b/drivers/clk/clk-si5351.c
@@ -0,0
for clock generators with empty eeprom
configuration. Corresponding device tree binding documentation is
also added.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Changes from v2:
- add curly brackets to if-else-statements (Reported by Daniel Mack)
- fix div-by-zero for clk6/clk7
On 03/19/2013 02:54 AM, Mike Turquette wrote:
Quoting Arnd Bergmann (2013-03-16 07:56:54)
On Saturday 16 March 2013, Sebastian Hesselbarth wrote:
This driver adds a DT test clock consumer that exposes debugfs files to
enable/disable and set/get rate of the attached programmable clock.
During
On 03/20/2013 01:26 AM, Mike Turquette wrote:
Quoting Sebastian Hesselbarth (2013-03-18 03:43:17)
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver supports
DT kernels only and VXCO feature of si5351b is not implemented
On 03/21/2013 07:09 PM, Lars-Peter Clausen wrote:
On 03/18/2013 11:43 AM, Sebastian Hesselbarth wrote:
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver supports
DT kernels only and VXCO feature of si5351b
On 03/21/2013 10:41 PM, Jason Gunthorpe wrote:
On Thu, Mar 21, 2013 at 10:15:23PM +0100, Thomas Petazzoni wrote:
Dear Jason Gunthorpe,
On Thu, 21 Mar 2013 14:55:45 -0600, Jason Gunthorpe wrote:
Or, better, locate all the internal registers above 8G and use
contiguous DRAM mapping from 0 -
On 03/21/2013 10:31 PM, Arnd Bergmann wrote:
On Thursday 21 March 2013, Thomas Petazzoni wrote:
In the mean time can we do something like:
soc {
compatible = simple-bus;
range =...;
[... all the peripherals ...]
};
with the
is in fact a valid gpio pin. mvsdio will grab that pin and configure it as
gpio, which in turn breaks nand controller as mpp0 also carries nand_io2.
This patch fixes the above by initializing unused gpio functions in the
platform_data with an invalid (-1) value.
Signed-off-by: Sebastian Hesselbarth
-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Soeren Moch sm...@web.de
---
Cc: Soeren Moch sm...@web.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Russell King li...@arm.linux.org.uk
Cc: Willy Tarreau w...@1wt.eu
Cc: linux-arm-ker
This patch just adds the missing MACH_GURUPLUG_DT to kirkwood_defconfig.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Reported-by: Soeren Moch sm...@web.de
---
Cc: Soeren Moch sm...@web.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Russell
for clock generators with empty eeprom
configuration. Corresponding device tree binding documentation is
also added.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Tested-by: Daniel Mack zon...@gmail.com
---
Changes from v3:
- add silabs prefix to custom DT properties (Reported
The CPU used in Marvell Dove SoCs is a PJ4 Sheeva core. Using
CONFIG_CPU_PJ4 instead of CONFIG_CPU_V7 will also allow to enable
iWMMXt extensions on Dove.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Russell King li...@arm.linux.org.uk
Cc: Jason Cooper ja
On 03/23/2013 04:17 PM, Thomas Petazzoni wrote:
On Sat, 23 Mar 2013 13:56:58 +0100, Sebastian Hesselbarth wrote:
mvsdio_platform_data allows to pass card detect and write protect gpio
numbers to the driver. Some kirkwood boards don't use both pins as
they are not connected, and don't set
On 03/23/2013 05:30 PM, Thomas Petazzoni wrote:
Dear Sebastian Hesselbarth,
On Sat, 23 Mar 2013 16:25:54 +0100, Sebastian Hesselbarth wrote:
I understand that you proposed patch fixes mvsdio grab mpp0 by accident.
But what if you have a kirkwood board where cd-gpio _is_ connected to mpp0
On Wed, Mar 20, 2013 at 5:48 PM, Daniel Mack zon...@gmail.com wrote:
On 20.03.2013 14:55, michal.bachr...@gmail.com wrote:
Thanks for writing this driver! I have tested your si5351 clock
driver and his tuning capabilities. It works well, it generates
proper clock frequency, but when new
On 03/08/2013 02:30 PM, Daniel Mack wrote:
On 08.03.2013 03:15, Mark Brown wrote:
On Thu, Mar 07, 2013 at 11:31:59PM +0100, Daniel Mack wrote:
On 07.03.2013 19:42, Afzal Mohammed wrote:
Grep'ing through arch/arm, it seems that the imx arch does the same
thing my patch does, but I could also
On 03/08/2013 04:58 PM, David Woodhouse wrote:
I'm just looking through the kernel for krealloc() abuse, and the
'interesting' code in mvebu_pinctrl_build_functions() came to my
attention.
First it allocates an array 'funcs' as follows:
/* we allocate functions for number of pins and
-03-09 at 09:49 +0100, Sebastian Hesselbarth wrote:
I don't have a strong opinion on that, but I prefer not to have the list
statically in the SoC specific drivers. I think counting the number of
unique functions for each SoC specific driver once and verify the above
heuristic (fewer unique
On 03/13/2013 06:35 PM, Jason Cooper wrote:
From: David Woodhousedw...@infradead.org
While investigating (ab)use of krealloc, David found this bug. It's
unlikely to occur, but now we detect the condition and error out
appropriately.
Signed-off-by: David Woodhousedavid.woodho...@intel.com
On 03/05/2013 10:34 AM, Paul Bolle wrote:
Commit 5b03df9ace680d7cdd34a69dfd85ca5f74159d18 (ARM: dove: switch to
DT clock providers) added select COMMON_CLK_DOVE to Marvell Dove's
Kconfig entry. But there's no Kconfig symbol COMMON_CLK_DOVE, which
makes this select statement a nop. Since the
On 12/01/2012 07:13 PM, Jason Cooper wrote:
On Sat, Dec 01, 2012 at 06:07:06PM +0100, Linus Walleij wrote:
On Mon, Nov 26, 2012 at 10:18 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
During merge of the mvebu patches a clock gate for pinctrl was
lost. This patch just
On Fri, Feb 8, 2013 at 6:57 PM, Mauro Carvalho Chehab
mche...@redhat.com wrote:
Em Wed, 06 Feb 2013 18:18:22 +0100
Sebastian Hesselbarth sebastian.hesselba...@gmail.com escreveu:
On 02/06/2013 02:48 PM, Sylwester Nawrocki wrote:
On 02/06/2013 09:03 AM, Sebastian Hesselbarth wrote
On 02/08/2013 10:26 PM, Sylwester Nawrocki wrote:
On 02/08/2013 09:38 PM, Sebastian Hesselbarth wrote:
This patch adds device tree parsing for gpio_ir_recv platform_data and
the mandatory binding documentation. It basically follows what we already
have for e.g. gpio_keys. All required device
On 02/09/2013 01:03 AM, Mauro Carvalho Chehab wrote:
Em Fri, 8 Feb 2013 21:38:07 +0100
Sebastian Hesselbarthsebastian.hesselba...@gmail.com escreveu:
This patch adds device tree parsing for gpio_ir_recv platform_data and
the mandatory binding documentation. It basically follows what we
for clock generators with empty eeprom
configuration. Corresponding device tree binding documentation is
also added.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Notes:
- During development I used a debugfs clock consumer that I can also
post if there is interest
On 02/11/2013 06:46 AM, Mike Turquette wrote:
Quoting Sebastian Hesselbarth (2013-02-09 04:59:32)
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver supports
DT kernels only and VXCO feature of si5351b is not implemented
On 02/06/2013 02:48 PM, Sylwester Nawrocki wrote:
On 02/06/2013 09:03 AM, Sebastian Hesselbarth wrote:
This patch adds device tree parsing for gpio_ir_recv platform_data and
the mandatory binding documentation. It basically follows what we already
have for e.g. gpio_keys. All required device
.
On 09.02.2013 13:59, Sebastian Hesselbarth wrote:
+==Example==
+
+/* 25MHz reference crystal */
+ref25: ref25M {
+compatible = fixed-clock;
+#clock-cells = 0;
+clock-frequency = 2500;
+};
+
+i2c-master-node {
+
+/* Si5351a msop10 i2c clock generator */
+si5351a
to jcooper/boards-for-v3.7-v2
Sebastian Hesselbarth (3):
pinctrl: mvebu: pinctrl driver core
pinctrl: mvebu: dove pinctrl driver
pinctrl: mvebu: kirkwood pinctrl driver
Thomas Petazzoni (6):
pinctrl: mvebu: add pinctrl driver for Armada 370
pinctrl: mvebu: add pinctrl driver for Armada XP
:
- removed arch/arm/*/Kconfig changes and added note about variant = 0
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc
This patch adds a SoC specific pinctrl driver for Marvell Dove SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
v2:
- restructured pinctrl/Kconfig to hide pinctrl driver
file.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring
This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
v2:
- restructured pinctrl/Kconfig to hide pinctrl driver
linus.wall...@linaro.org
---
v3:
- cleaned whitespaces
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Russell King
armada-xp-db.dts
evaluation board uses the MV78460 variant of the SoC.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
v3:
- put specific variant into DT model
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas
the number of pins and other
SoC-specific properties.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
v3:
- cleaned whitespaces
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free
: replaced variant with enum and used bitops.h
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Russell King li
This patch adds a pinctrl driver core for Marvell SoCs plus DT
binding documentation. This core driver will be used by SoC family
specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Thomas Petazzoni
On 09/10/2012 05:45 PM, Linus Walleij wrote:
This all looks good now, will this be pushed through some ARM SoC
tree along with Marvell changes or do you want me to take it all
through the pinctrl tree?
Linus,
thanks for review and ACKs. Jason Cooper will take it through Marvell
tree.
On 09/20/2012 10:13 AM, Linus Walleij wrote:
I've tried to group related implementations together, so if the first four
are dependent we should either:
1. Move all of these to the subdir drivers/pinctrl/mvebu
Linus,
I prefer having a subdirectory as there are three more SoCs related
to
This patch adds a SoC specific pinctrl driver for Marvell Dove SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
v2:
- restructured
-by: Linus Walleij linus.wall...@linaro.org
---
v2:
- removed arch/arm/*/Kconfig changes and added note about variant = 0
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
and ARMADA_XP in
order to easily compile common code.
A followup patch actually makes use of this split to select the
appropriate pinctrl drivers.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Gregory Clement gregory.clem...@free-electrons.com
---
Cc: Sebastian
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
This patch actually enables pinctrl drivers for Armada 370 and XP.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz
file.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring
armada-xp-db.dts
evaluation board uses the MV78460 variant of the SoC.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
v3:
- put specific variant into DT model
v4:
- adjust pinctrl DT node of Armada XP SoC
Cc: Sebastian
-by: Linus Walleij linus.wall...@linaro.org
---
v2:
- replaced variant with enum and used bitops.h
Cc: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob
This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
v2:
- restructured pinctrl/Kconfig to hide pinctrl driver
This patch adds a pinctrl driver core for Marvell SoCs plus DT
binding documentation. This core driver will be used by SoC family
specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Signed-off-by: Thomas Petazzoni
On 09/16/2012 09:46 AM, Andrew Lunn wrote:
+Required properties:
+- compatible: marvell,88f6180-pinctrl,
+ marvell,88f6190-pinctrl, marvell,88f6192-pinctrl,
+ marvell,88f6281-pinctrl, marvell,88f6282-pinctrl
+
+This driver supports all kirkwood variants, i.e. 88f6180,
On 09/17/2012 03:55 AM, Nicolas Pitre wrote:
On Sun, 16 Sep 2012, Jason Cooper wrote:
On Sun, Sep 16, 2012 at 09:46:52AM +0200, Andrew Lunn wrote:
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
@@ -0,0 +1,279 @@
+* Marvell Kirkwood SoC pinctrl driver for mpp
+
1 - 100 of 2968 matches
Mail list logo
