On Fri, Aug 25, 2017 at 01:03:23PM -0500, Rob Herring wrote:
> On Mon, Aug 21, 2017 at 09:31:42PM +0200, Danilo Krummrich wrote:
> > The PS/2 gpio device binding defines the gpio pins (data and clock)
> > as well as the interrupt which should be used to drive the ps/2 bus.
> > It is expected to
On Fri, Aug 25, 2017 at 01:03:23PM -0500, Rob Herring wrote:
> On Mon, Aug 21, 2017 at 09:31:42PM +0200, Danilo Krummrich wrote:
> > The PS/2 gpio device binding defines the gpio pins (data and clock)
> > as well as the interrupt which should be used to drive the ps/2 bus.
> > It is expected to
On Mon, Aug 21, 2017 at 09:31:42PM +0200, Danilo Krummrich wrote:
> The PS/2 gpio device binding defines the gpio pins (data and clock)
> as well as the interrupt which should be used to drive the ps/2 bus.
> It is expected to get an interrupt on the falling edge of the clock
> line.
>
> Also it
On Mon, Aug 21, 2017 at 09:31:42PM +0200, Danilo Krummrich wrote:
> The PS/2 gpio device binding defines the gpio pins (data and clock)
> as well as the interrupt which should be used to drive the ps/2 bus.
> It is expected to get an interrupt on the falling edge of the clock
> line.
>
> Also it
The PS/2 gpio device binding defines the gpio pins (data and clock)
as well as the interrupt which should be used to drive the ps/2 bus.
It is expected to get an interrupt on the falling edge of the clock
line.
Also it can be configured whether the host should support writing to
the device.
The PS/2 gpio device binding defines the gpio pins (data and clock)
as well as the interrupt which should be used to drive the ps/2 bus.
It is expected to get an interrupt on the falling edge of the clock
line.
Also it can be configured whether the host should support writing to
the device.
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