Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, Aug 08, 2017 at 02:25:10PM +0100, Will Deacon wrote: > On Fri, Jul 28, 2017 at 04:12:33PM -0700, Greg KH wrote: > > On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > > > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > > > OK. As fixing the firmware will

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, Aug 08, 2017 at 02:25:10PM +0100, Will Deacon wrote: > On Fri, Jul 28, 2017 at 04:12:33PM -0700, Greg KH wrote: > > On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > > > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > > > OK. As fixing the firmware will

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Fri, Jul 28, 2017 at 04:12:33PM -0700, Greg KH wrote: > On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > > OK. As fixing the firmware will take quite some time I'll go for the > > > memory > > > controller

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Fri, Jul 28, 2017 at 04:12:33PM -0700, Greg KH wrote: > On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > > OK. As fixing the firmware will take quite some time I'll go for the > > > memory > > > controller

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 27/07/17 10:08, Jan Glauber wrote: On Thu, Jul 27, 2017 at 07:11:57AM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: Also, if a given configuration disables CONFIG_EDAC there is some hackery needed to get the perf portion of the driver included.

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 27/07/17 10:08, Jan Glauber wrote: On Thu, Jul 27, 2017 at 07:11:57AM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: Also, if a given configuration disables CONFIG_EDAC there is some hackery needed to get the perf portion of the driver included.

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > OK. As fixing the firmware will take quite some time I'll go for the memory > > controller driver that starts EDAC / PMU depending on their CONFIG_. > > > > What

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote: > On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > > OK. As fixing the firmware will take quite some time I'll go for the memory > > controller driver that starts EDAC / PMU depending on their CONFIG_. > > > > What

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 06:11:30PM -0700, Greg KH wrote: > Oh well, fix it in the kernel, that's what it's there for :) Duude, don't put crazy ideas in people's heads! :-))) -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 06:11:30PM -0700, Greg KH wrote: > Oh well, fix it in the kernel, that's what it's there for :) Duude, don't put crazy ideas in people's heads! :-))) -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 10:29:53AM -0700, David Daney wrote: > On 07/26/2017 07:29 PM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > > > On 07/26/2017 01:08 PM, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > > > > > On

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 10:29:53AM -0700, David Daney wrote: > On 07/26/2017 07:29 PM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > > > On 07/26/2017 01:08 PM, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > > > > > On

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 07:29 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: On 07/26/2017 01:08 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 07:29 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: On 07/26/2017 01:08 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > OK. As fixing the firmware will take quite some time I'll go for the memory > controller driver that starts EDAC / PMU depending on their CONFIG_. > > What would be the proper location for the multiplexer? > drivers/soc/cavium or

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote: > OK. As fixing the firmware will take quite some time I'll go for the memory > controller driver that starts EDAC / PMU depending on their CONFIG_. > > What would be the proper location for the multiplexer? > drivers/soc/cavium or

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 07:11:57AM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > > Also, if a given configuration disables CONFIG_EDAC there is some hackery > > needed to get the perf portion of the driver included. > > Yes, and we don't do

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Thu, Jul 27, 2017 at 07:11:57AM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > > Also, if a given configuration disables CONFIG_EDAC there is some hackery > > needed to get the perf portion of the driver included. > > Yes, and we don't do

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > Also, if a given configuration disables CONFIG_EDAC there is some hackery > needed to get the perf portion of the driver included. Yes, and we don't do performance counters in EDAC. So you could add a small memory controller driver

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > Also, if a given configuration disables CONFIG_EDAC there is some hackery > needed to get the perf portion of the driver included. Yes, and we don't do performance counters in EDAC. So you could add a small memory controller driver

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > On 07/26/2017 01:08 PM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > > > On 07/26/2017 10:33 AM, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > > > > > On

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: > On 07/26/2017 01:08 PM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > > > On 07/26/2017 10:33 AM, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > > > > > On

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 01:08 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: On Wed, Jul 26, 2017 at

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 01:08 PM, Greg KH wrote: On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: On Wed, Jul 26, 2017 at

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > On 07/26/2017 10:33 AM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > > > On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 01:02:38PM -0700, David Daney wrote: > On 07/26/2017 10:33 AM, Greg KH wrote: > > On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > > > On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > > > > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: The

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 07/26/2017 10:33 AM, Greg KH wrote: On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: The

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > > > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > > > The PMU/EDAC devices are all

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > > > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > > > The PMU/EDAC devices are all

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:25:15PM +0100, Jonathan Cameron wrote: > On Wed, 26 Jul 2017 17:46:23 +0200 > Jan Glauber wrote: > > > On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > > > How about adding a soc specific (wrapper) driver for the

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:25:15PM +0100, Jonathan Cameron wrote: > On Wed, 26 Jul 2017 17:46:23 +0200 > Jan Glauber wrote: > > > On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > > > How about adding a soc specific (wrapper) driver for the memory > > > controller, which > > >

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > > > I'm not aware of other

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote: > On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > > > I'm not aware of other

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, 26 Jul 2017 17:46:23 +0200 Jan Glauber wrote: > On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > > How about adding a soc specific (wrapper) driver for the memory controller, > > which > > could use the PCI id and trigger EDAC and PMU

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, 26 Jul 2017 17:46:23 +0200 Jan Glauber wrote: > On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > > How about adding a soc specific (wrapper) driver for the memory controller, > > which > > could use the PCI id and trigger EDAC and PMU drivers (based on what is > >

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > > I'm not aware of other ways to access these devices. Please enlighten > > me if I'm

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > > I'm not aware of other ways to access these devices. Please enlighten > > me if I'm

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > I'm not aware of other ways to access these devices. Please enlighten > me if I'm missing something. Me enlighten you on Cavium hardware?! You're funny. So

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote: > The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. > I'm not aware of other ways to access these devices. Please enlighten > me if I'm missing something. Me enlighten you on Cavium hardware?! You're funny. So

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > How about adding a soc specific (wrapper) driver for the memory controller, > which > could use the PCI id and trigger EDAC and PMU drivers (based on what is > selected by configs) ? Sounds good to me. Is there a driver that

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > How about adding a soc specific (wrapper) driver for the memory controller, > which > could use the PCI id and trigger EDAC and PMU drivers (based on what is > selected by configs) ? Sounds good to me. Is there a driver that

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote: > > I'm also looking for CPU implementor (MIDR), I could check for the model > > too but I still need to detect devices based on PCI IDs as the model > > check is not

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote: > > I'm also looking for CPU implementor (MIDR), I could check for the model > > too but I still need to detect devices based on PCI IDs as the model > > check is not

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote: > I'm also looking for CPU implementor (MIDR), I could check for the model > too but I still need to detect devices based on PCI IDs as the model > check is not sufficient here (only multi-socket ThunderX has OCX TLK > devices). So what

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote: > I'm also looking for CPU implementor (MIDR), I could check for the model > too but I still need to detect devices based on PCI IDs as the model > check is not sufficient here (only multi-socket ThunderX has OCX TLK > devices). So what

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > How about adding a soc specific (wrapper) driver for the memory controller, > which > could use the PCI id and trigger EDAC and PMU drivers (based on what is > selected by configs) ? That was the last idea on my list if nothing

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:17:11PM +0100, Suzuki K Poulose wrote: > How about adding a soc specific (wrapper) driver for the memory controller, > which > could use the PCI id and trigger EDAC and PMU drivers (based on what is > selected by configs) ? That was the last idea on my list if nothing

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 26/07/17 16:13, Jan Glauber wrote: On Wed, Jul 26, 2017 at 04:55:22PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. Cavium EDACs? So let me set something straight

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 26/07/17 16:13, Jan Glauber wrote: On Wed, Jul 26, 2017 at 04:55:22PM +0200, Borislav Petkov wrote: On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. Cavium EDACs? So let me set something straight

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:55:22PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: > > So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. > > Cavium EDACs? > > So let me set something straight first: An EDAC driver simply

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 04:55:22PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: > > So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. > > Cavium EDACs? > > So let me set something straight first: An EDAC driver simply

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: > So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. Cavium EDACs? So let me set something straight first: An EDAC driver simply talks to some RAS IP block and reports errors. It shouldn't have anything to

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 03:35:25PM +0100, Suzuki K Poulose wrote: > So the Cavium EDACs, which appear as PCI devices have a PMU attached to it. Cavium EDACs? So let me set something straight first: An EDAC driver simply talks to some RAS IP block and reports errors. It shouldn't have anything to

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

+To: Boris Hi Boris, On 26/07/17 14:10, Jan Glauber wrote: On Wed, Jul 26, 2017 at 01:47:35PM +0100, Suzuki K Poulose wrote: On 26/07/17 12:19, Jan Glauber wrote: On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

+To: Boris Hi Boris, On 26/07/17 14:10, Jan Glauber wrote: On Wed, Jul 26, 2017 at 01:47:35PM +0100, Suzuki K Poulose wrote: On 26/07/17 12:19, Jan Glauber wrote: On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 01:47:35PM +0100, Suzuki K Poulose wrote: > On 26/07/17 12:19, Jan Glauber wrote: > >On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: > >>On 25/07/17 16:04, Jan Glauber wrote: > >>>Add support for the PMU counters on Cavium SOC memory controllers. > >>> >

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Wed, Jul 26, 2017 at 01:47:35PM +0100, Suzuki K Poulose wrote: > On 26/07/17 12:19, Jan Glauber wrote: > >On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: > >>On 25/07/17 16:04, Jan Glauber wrote: > >>>Add support for the PMU counters on Cavium SOC memory controllers. > >>> >

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 26/07/17 12:19, Jan Glauber wrote: On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU counters on Cavium SOC memory controllers. This patch also adds generic functions to allow supporting more devices with PMU

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 26/07/17 12:19, Jan Glauber wrote: On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU counters on Cavium SOC memory controllers. This patch also adds generic functions to allow supporting more devices with PMU

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: > On 25/07/17 16:04, Jan Glauber wrote: > >Add support for the PMU counters on Cavium SOC memory controllers. > > > >This patch also adds generic functions to allow supporting more > >devices with PMU counters. > > > >Properties of

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, Jul 25, 2017 at 04:39:18PM +0100, Suzuki K Poulose wrote: > On 25/07/17 16:04, Jan Glauber wrote: > >Add support for the PMU counters on Cavium SOC memory controllers. > > > >This patch also adds generic functions to allow supporting more > >devices with PMU counters. > > > >Properties of

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, 25 Jul 2017 17:04:20 +0200 Jan Glauber wrote: > Add support for the PMU counters on Cavium SOC memory controllers. > > This patch also adds generic functions to allow supporting more > devices with PMU counters. > > Properties of the LMC PMU counters: > - not

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On Tue, 25 Jul 2017 17:04:20 +0200 Jan Glauber wrote: > Add support for the PMU counters on Cavium SOC memory controllers. > > This patch also adds generic functions to allow supporting more > devices with PMU counters. > > Properties of the LMC PMU counters: > - not stoppable > - fixed

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU counters on Cavium SOC memory controllers. This patch also adds generic functions to allow supporting more devices with PMU counters. Properties of the LMC PMU counters: - not stoppable - fixed purpose - read-only - one PCI device

Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

On 25/07/17 16:04, Jan Glauber wrote: Add support for the PMU counters on Cavium SOC memory controllers. This patch also adds generic functions to allow supporting more devices with PMU counters. Properties of the LMC PMU counters: - not stoppable - fixed purpose - read-only - one PCI device