Hi Laurent,
Am Dienstag, den 25.07.2017, 02:10 +0300 schrieb Laurent Pinchart:
> > > Yes, I think a device-specific driver would make sense, especially if
> > > we can implement support for the sensor as a standalone V4L2 subdev
> > > driver. The device only fakes UVC compatibility :-(
> >
> >
On Thu, 2017-07-20 at 18:46 +0300, Stanimir Varbanov wrote:
> Hi,
>
> >>> +
> >>> +* - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> >>> + - Main profile.
> >>
> >> MAIN10?
> >>
> > No just MAIN.
>
> I haven't because the MFC does not supported it?
>
> If so, I think we have to add MAIN10
On Thu, 2017-07-20 at 16:50 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364
> >
This message is generated daily by a cron job that builds media_tree for
the kernels and architectures in the list below.
Results of the daily build of media_tree:
date: Tue Jul 25 05:00:18 CEST 2017
media-tree git hash:0e50e84a11f4854e9a7e3b7f4443ffb99e6be292
media_build
According to datasheet, BIT5 in reg-0x4800 are used to
enable/disable clock lane gate.
It's wrong to make clock lane free running before
sensor stream on was called, while the mipi phy
are not initialized.
Signed-off-by: Jacob Chen
---
drivers/media/i2c/ov5647.c | 10
Hi Philipp,
On Monday 24 Jul 2017 07:52:22 Philipp Zabel wrote:
> Am Montag, den 17.07.2017, 05:25 +0300 schrieb Laurent Pinchart:
> > On Saturday 15 Jul 2017 15:13:45 Philipp Zabel wrote:
> >> Am Samstag, den 15.07.2017, 12:54 +0300 schrieb Laurent Pinchart:
> >>> On Friday 14 Jul 2017 22:14:24
Superseded by:
[PATCH V2 2/3] build: CEC_PIN and the VIDEO_OV5670 driver both require kernel
4.10 to compile
So please drop this patch.
BR,
Jasmin
From: Jasmin Jessich
Changes since V1:
- CEC_PIN and VIDEO_OV5670 disabled for all kernels older 4.10.
This series fixed compilation errors for older kernels.
I have tested it with Kernel 3.13 and Daniel with Kernel 4.12 and
someone else with Kernel 4.4.
CEC_PIN and VIDEO_OV5670
From: Daniel Scheller
Signed-off-by: Daniel Scheller
Signed-off-by: Jasmin Jessich
---
v4l/versions.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/v4l/versions.txt b/v4l/versions.txt
index ae4a14f..7d786da 100644
---
From: Daniel Scheller
Signed-off-by: Daniel Scheller
Signed-off-by: Jasmin Jessich
---
backports/backports.txt| 3 +
.../v4.12_revert_solo6x10_copykerneluser.patch | 71 ++
2 files
From: Jasmin Jessich
Signed-off-by: Jasmin Jessich
---
v4l/compat.h | 15 +++
v4l/scripts/make_config_compat.pl | 1 +
2 files changed, 16 insertions(+)
diff --git a/v4l/compat.h b/v4l/compat.h
index e565292..b5b0846 100644
---
On Thu, Jul 20, 2017 at 11:23:01AM +0200, Maxime Ripard wrote:
> The Cadence MIPI-CSI2 RX controller is a CSI2RX bridge that supports up to
> 4 CSI-2 lanes, and can route the frames to up to 4 streams, depending on
> the hardware implementation.
>
> It can operate with an external D-PHY, an
good idea :)
Acked-by: Abylay Ospan
2017-07-23 10:45 GMT-04:00 Daniel Scheller :
> From: Daniel Scheller
>
> Since the driver now recognizes and supports more chip variants, reflect
> this fact in the module description
Hello all,
At Endless we are trying to support an Asus T304UA convertible
tablet/laptop, which has the following controller:
00:14.3 Multimedia controller [0480]: Intel Corporation Device
[8086:9d32] (rev 01)
Subsystem: ASUSTeK Computer Inc. Device [1043:1d2d]
Control: I/O- Mem- BusMaster-
On Mon, Jul 17, 2017 at 07:03:55PM +0200, Niklas Söderlund wrote:
> Documentation for Renesas R-Car MIPI CSI-2 receiver. The CSI-2 receivers
> are located between the video sources (CSI-2 transmitters) and the video
> grabbers (VIN) on Gen3 of Renesas R-Car SoC.
>
> Each CSI-2 device is connected
--
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On Mon, Jul 24, 2017 at 3:11 PM, Niklas Söderlund
wrote:
> Hi Naman,
>
> On 2017-07-24 14:30:52 +0530, Naman Jain wrote:
>> i am using renesas soc with video decoder adv7281m
>> i have done thr device tree configuration by following dt bindings
>> i am getting
Sorry, one last note... I am not subscribed to the list, so please keep me
in CC.
On Mon, Jul 17, 2017 at 01:33:30PM +0300, Todor Tomov wrote:
> Add DT binding document for Qualcomm Camera subsystem driver.
>
> CC: Rob Herring
> CC: devicet...@vger.kernel.org
> Signed-off-by: Todor Tomov
> ---
>
Dear linux-media,
I'm having troubles setting up a video input on a custom board using the
staging imx-media driver and an i2c-connected video codec. The codec is
a tw9990, but I use the driver for the adv7180 which is quite compatible
and there is not much to configure within the codec
On Mon, Jul 24, 2017 at 11:51 AM, Christian König
wrote:
> Am 24.07.2017 um 10:33 schrieb Daniel Vetter:
>>
>> On Fri, Jul 21, 2017 at 06:20:01PM +0200, Christian König wrote:
>>>
>>> From: Christian König
>>>
>>> With hardware resets in mind it
Am 24.07.2017 um 10:34 schrieb zhoucm1:
On 2017年07月22日 00:20, Christian König wrote:
From: Christian König
With hardware resets in mind it is possible that all shared fences are
signaled, but the exlusive isn't. Fix waiting for everything in this
situation.
Am 24.07.2017 um 10:33 schrieb Daniel Vetter:
On Fri, Jul 21, 2017 at 06:20:01PM +0200, Christian König wrote:
From: Christian König
With hardware resets in mind it is possible that all shared fences are
signaled, but the exlusive isn't. Fix waiting for everything in
Hi Naman,
On 2017-07-24 14:30:52 +0530, Naman Jain wrote:
> i am using renesas soc with video decoder adv7281m
> i have done thr device tree configuration by following dt bindings
> i am getting timeout of reading the phy clock lane, after i start streaming
> and nothing is displayed on the
On 2017年07月22日 00:20, Christian König wrote:
From: Christian König
With hardware resets in mind it is possible that all shared fences are
signaled, but the exlusive isn't. Fix waiting for everything in this situation.
Signed-off-by: Christian König
On Fri, Jul 21, 2017 at 06:20:01PM +0200, Christian König wrote:
> From: Christian König
>
> With hardware resets in mind it is possible that all shared fences are
> signaled, but the exlusive isn't. Fix waiting for everything in this
> situation.
How did you end up
On Sat, 2017-07-22 at 14:21 -0700, Steve Longerbeam wrote:
> For the write channels with 4:2:0 subsampled YUV formats, avoid chroma
> overdraw by only writing chroma for even lines. Reduces necessary write
> memory bandwidth by at least 25% (more with rotation enabled).
>
> Signed-off-by: Steve
Hi Steve,
On Sat, 2017-07-22 at 15:04 -0700, Steve Longerbeam wrote:
> Hi Philipp,
>
> This is the same as your patch to CSI, applied to ic-prpencvf.
>
> I'm not really sure what this cpmem bit is doing. The U/V planes
> in memory are already subsampled by 2 in both width and height.
> This
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