Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

On Wed, Oct 11, 2017 at 01:36:39PM +, Benoit Parrot wrote: > > > > + /* > > > > +* We use the stream ID there, but it's wrong. > > > > +* > > > > +* A stream could very well send a data type that is > > > > +* not

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Maxime, Maxime Ripard wrote on Wed [2017-Oct-11 13:55:44 +0200]: > Hi Benoit, > > On Fri, Sep 29, 2017 at 06:21:25PM +, Benoit Parrot wrote: > > > +struct csi2tx_priv { > > > + struct device *dev; > > > + atomic_t

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Benoit, On Fri, Sep 29, 2017 at 06:21:25PM +, Benoit Parrot wrote: > > +struct csi2tx_priv { > > + struct device *dev; > > + atomic_tcount; > > + > > + void __iomem*base; > > + > > + struct clk

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Sakari, Sorry for the belated answer. On Tue, Sep 26, 2017 at 08:00:14AM +, Sakari Ailus wrote: > > On Fri, Sep 22, 2017 at 12:38:49PM +, Sakari Ailus wrote: > > > > + /* > > > > +* Create a static mapping between the CSI virtual channels > > > > +* and the input

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Maxime, Thank you for the patch. Maxime Ripard wrote on Fri [2017-Sep-22 13:47:03 +0200]: > The Cadence MIPI-CSI2 TX controller is an hardware block meant to be used > as a bridge between pixel interfaces and a CSI-2 bus. > > It supports operating with an

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Maxime, On Fri, Sep 22, 2017 at 05:30:36PM +0200, Maxime Ripard wrote: > Hi Sakari, > > I'll address the minor comments you had and that I stripped. > > On Fri, Sep 22, 2017 at 12:38:49PM +, Sakari Ailus wrote: > > > + /* > > > + * Create a static mapping between the CSI virtual

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Sakari, I'll address the minor comments you had and that I stripped. On Fri, Sep 22, 2017 at 12:38:49PM +, Sakari Ailus wrote: > > + /* > > +* Create a static mapping between the CSI virtual channels > > +* and the input streams. > > Which virtual channel is used here? Like I

Re: [PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

Hi Maxime, On Fri, Sep 22, 2017 at 01:47:03PM +0200, Maxime Ripard wrote: > The Cadence MIPI-CSI2 TX controller is an hardware block meant to be used > as a bridge between pixel interfaces and a CSI-2 bus. > > It supports operating with an internal or external D-PHY, with up to 4 > lanes, or

[PATCH 2/2] v4l: cadence: Add Cadence MIPI-CSI2 TX driver

The Cadence MIPI-CSI2 TX controller is an hardware block meant to be used as a bridge between pixel interfaces and a CSI-2 bus. It supports operating with an internal or external D-PHY, with up to 4 lanes, or without any D-PHY. The current code only supports the former case. While the virtual