From: Philipp Zabel <p.za...@pengutronix.de>

This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.

Signed-off-by: Philipp Zabel <p.za...@pengutronix.de>

--

- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
  to "mipi_vcX...".
- Added input endpoint anchors to the video muxes for the connections
  from parallel sensors.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6dl.dtsi  | 180 +++++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/imx6q.dtsi   | 116 ++++++++++++++++++++++++++
 arch/arm/boot/dts/imx6qdl.dtsi |  10 ++-
 3 files changed, 305 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 7aa120f..8958c4a 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -181,6 +181,186 @@
                      "di0", "di1";
 };
 
+&gpr {
+       ipu1_csi0_mux: ipu1_csi0_mux@34 {
+               compatible = "video-multiplexer";
+               reg = <0x34>;
+               bit-mask = <0x7>;
+               bit-shift = <0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "okay";
+
+               port@0 {
+                       reg = <0>;
+
+                       ipu1_csi0_mux_from_mipi_vc0: endpoint {
+                               remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       ipu1_csi0_mux_from_mipi_vc1: endpoint {
+                               remote-endpoint = <&mipi_vc1_to_ipu1_csi0_mux>;
+                       };
+               };
+
+               port@2 {
+                       reg = <2>;
+
+                       ipu1_csi0_mux_from_mipi_vc2: endpoint {
+                               remote-endpoint = <&mipi_vc2_to_ipu1_csi0_mux>;
+                       };
+               };
+
+               port@3 {
+                       reg = <3>;
+
+                       ipu1_csi0_mux_from_mipi_vc3: endpoint {
+                               remote-endpoint = <&mipi_vc3_to_ipu1_csi0_mux>;
+                       };
+               };
+
+               port@4 {
+                       reg = <4>;
+
+                       ipu1_csi0_mux_from_parallel_sensor: endpoint {
+                       };
+               };
+
+               port@5 {
+                       reg = <5>;
+
+                       ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+                               remote-endpoint = 
<&ipu1_csi0_from_ipu1_csi0_mux>;
+                       };
+               };
+       };
+
+       ipu1_csi1_mux: ipu1_csi1_mux@34 {
+               compatible = "video-multiplexer";
+               reg = <0x34>;
+               bit-mask = <0x7>;
+               bit-shift = <3>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "okay";
+
+               port@0 {
+                       reg = <0>;
+
+                       ipu1_csi1_mux_from_mipi_vc0: endpoint {
+                               remote-endpoint = <&mipi_vc0_to_ipu1_csi1_mux>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       ipu1_csi1_mux_from_mipi_vc1: endpoint {
+                               remote-endpoint = <&mipi_vc1_to_ipu1_csi1_mux>;
+                       };
+               };
+
+               port@2 {
+                       reg = <2>;
+
+                       ipu1_csi1_mux_from_mipi_vc2: endpoint {
+                               remote-endpoint = <&mipi_vc2_to_ipu1_csi1_mux>;
+                       };
+               };
+
+               port@3 {
+                       reg = <3>;
+
+                       ipu1_csi1_mux_from_mipi_vc3: endpoint {
+                               remote-endpoint = <&mipi_vc3_to_ipu1_csi1_mux>;
+                       };
+               };
+
+               port@4 {
+                       reg = <4>;
+
+                       ipu1_csi1_mux_from_parallel_sensor: endpoint {
+                       };
+               };
+
+               port@5 {
+                       reg = <5>;
+
+                       ipu1_csi1_mux_to_ipu1_csi1: endpoint {
+                               remote-endpoint = 
<&ipu1_csi1_from_ipu1_csi1_mux>;
+                       };
+               };
+       };
+};
+
+&ipu1_csi1 {
+       ipu1_csi1_from_ipu1_csi1_mux: endpoint {
+               remote-endpoint = <&ipu1_csi1_mux_to_ipu1_csi1>;
+       };
+};
+
+&mipi_csi {
+       port@1 {
+               reg = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               mipi_vc0_to_ipu1_csi0_mux: endpoint@0 {
+                       remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
+               };
+
+               mipi_vc0_to_ipu1_csi1_mux: endpoint@1 {
+                       remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;
+               };
+       };
+
+       port@2 {
+               reg = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               mipi_vc1_to_ipu1_csi0_mux: endpoint@0 {
+                       remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;
+               };
+
+               mipi_vc1_to_ipu1_csi1_mux: endpoint@1 {
+                       remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;
+               };
+       };
+
+       port@3 {
+               reg = <3>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               mipi_vc2_to_ipu1_csi0_mux: endpoint@0 {
+                       remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;
+               };
+
+               mipi_vc2_to_ipu1_csi1_mux: endpoint@1 {
+                       remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;
+               };
+       };
+
+       port@4 {
+               reg = <4>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               mipi_vc3_to_ipu1_csi0_mux: endpoint@0 {
+                       remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;
+               };
+
+               mipi_vc3_to_ipu1_csi1_mux: endpoint@1 {
+                       remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;
+               };
+       };
+};
+
 &vpu {
        compatible = "fsl,imx6dl-vpu", "cnm,coda960";
 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index e9a5d0b..b833b0d 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -143,10 +143,18 @@
 
                        ipu2_csi0: port@0 {
                                reg = <0>;
+
+                               ipu2_csi0_from_mipi_vc2: endpoint {
+                                       remote-endpoint = 
<&mipi_vc2_to_ipu2_csi0>;
+                               };
                        };
 
                        ipu2_csi1: port@1 {
                                reg = <1>;
+
+                               ipu2_csi1_from_ipu2_csi1_mux: endpoint {
+                                       remote-endpoint = 
<&ipu2_csi1_mux_to_ipu2_csi1>;
+                               };
                        };
 
                        ipu2_di0: port@2 {
@@ -266,6 +274,80 @@
        };
 };
 
+&gpr {
+       ipu1_csi0_mux: ipu1_csi0_mux@4 {
+               compatible = "video-multiplexer";
+               reg = <0x04>;
+               bit-mask = <1>;
+               bit-shift = <19>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "okay";
+
+               port@0 {
+                       reg = <0>;
+
+                       ipu1_csi0_mux_from_mipi_vc0: endpoint {
+                               remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       ipu1_csi0_mux_from_parallel_sensor: endpoint {
+                       };
+               };
+
+               port@2 {
+                       reg = <2>;
+
+                       ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+                               remote-endpoint = 
<&ipu1_csi0_from_ipu1_csi0_mux>;
+                       };
+               };
+       };
+
+       ipu2_csi1_mux: ipu2_csi1_mux@4 {
+               compatible = "video-multiplexer";
+               reg = <0x04>;
+               bit-mask = <1>;
+               bit-shift = <20>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "okay";
+
+               port@0 {
+                       reg = <0>;
+
+                       ipu2_csi1_mux_from_mipi_vc3: endpoint {
+                               remote-endpoint = <&mipi_vc3_to_ipu2_csi1_mux>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       ipu2_csi1_mux_from_parallel_sensor: endpoint {
+                       };
+               };
+
+               port@2 {
+                       reg = <2>;
+
+                       ipu2_csi1_mux_to_ipu2_csi1: endpoint {
+                               remote-endpoint = 
<&ipu2_csi1_from_ipu2_csi1_mux>;
+                       };
+               };
+       };
+};
+
+&ipu1_csi1 {
+       ipu1_csi1_from_mipi_vc1: endpoint {
+               remote-endpoint = <&mipi_vc1_to_ipu1_csi1>;
+       };
+};
+
 &ldb {
        clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks 
IMX6QDL_CLK_LDB_DI1_SEL>,
                 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks 
IMX6QDL_CLK_IPU1_DI1_SEL>,
@@ -312,6 +394,40 @@
        };
 };
 
+&mipi_csi {
+       port@1 {
+               reg = <1>;
+
+               mipi_vc0_to_ipu1_csi0_mux: endpoint {
+                       remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
+               };
+       };
+
+       port@2 {
+               reg = <2>;
+
+               mipi_vc1_to_ipu1_csi1: endpoint {
+                       remote-endpoint = <&ipu1_csi1_from_mipi_vc1>;
+               };
+       };
+
+       port@3 {
+               reg = <3>;
+
+               mipi_vc2_to_ipu2_csi0: endpoint {
+                       remote-endpoint = <&ipu2_csi0_from_mipi_vc2>;
+               };
+       };
+
+       port@4 {
+               reg = <4>;
+
+               mipi_vc3_to_ipu2_csi1_mux: endpoint {
+                       remote-endpoint = <&ipu2_csi1_mux_from_mipi_vc3>;
+               };
+       };
+};
+
 &mipi_dsi {
        ports {
                port@2 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index d28a413..194badd 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -807,8 +807,10 @@
                        };
 
                        gpr: iomuxc-gpr@020e0000 {
-                               compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
+                               compatible = "fsl,imx6q-iomuxc-gpr", "syscon", 
"simple-mfd";
                                reg = <0x020e0000 0x38>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                        };
 
                        iomuxc: iomuxc@020e0000 {
@@ -1136,6 +1138,8 @@
                        mipi_csi: mipi@021dc000 {
                                compatible = "fsl,imx6-mipi-csi2", 
"snps,dw-mipi-csi2";
                                reg = <0x021dc000 0x4000>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                interrupts = <0 100 0x04>, <0 101 0x04>;
                                clocks = <&clks IMX6QDL_CLK_HSI_TX>,
                                         <&clks IMX6QDL_CLK_VIDEO_27M>,
@@ -1243,6 +1247,10 @@
 
                        ipu1_csi0: port@0 {
                                reg = <0>;
+
+                               ipu1_csi0_from_ipu1_csi0_mux: endpoint {
+                                       remote-endpoint = 
<&ipu1_csi0_mux_to_ipu1_csi0>;
+                               };
                        };
 
                        ipu1_csi1: port@1 {
-- 
2.7.4

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