0x0088
...and they think something is wrong with their hardware.
Remove the printouts. We'll leave it up to a higher level to report
about errors.
Signed-off-by: Doug Anderson diand...@chromium.org
This looks reasonable
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc
Hi Yuvaraj,
On Mon, Mar 24, 2014 at 10:12 AM, Yuvaraj Kumar yuvaraj...@gmail.com wrote:
On Mon, Mar 24, 2014 at 9:59 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Yuvaraj.
NACK. we can use mmc_of_parese().
Thanks Jaehoon for the pointer.I will use mmc_of_parse().
Are you planning to
Hi Andrew,
On Wed, Aug 13, 2014 at 11:02 PM, Andrew Bresticker
abres...@chromium.org wrote:
The dw_mmc host may also be present on non-ARC/ARM SoCs (e.g. MIPS)
and the driver itself does not appear to depend on any particular
architecture(s).
Signed-off-by: Andrew Bresticker
platforms.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
drivers/mmc/host/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index a565254..385674b 100644
Hi Andrew,
On Thu, Aug 14, 2014 at 10:15 PM, Andrew Bresticker
abres...@chromium.org wrote:
There are upcoming MIPS SoCs with dw_mmc hosts.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/Kconfig | 2 +-
1 file
There are upcoming ARM64 SoCs with dw_mmc host controller.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index a43295c..72dd6c2 100644
Hi Chrish, Ulf, Arnd
Any comments/suggestions?
On Fri, Aug 29, 2014 at 3:54 PM, Alim Akhtar alim.akh...@samsung.com wrote:
There are upcoming ARM64 SoCs with dw_mmc host controller.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/Kconfig |2 +-
1 file changed
Hi Ulf,
On Tue, Sep 9, 2014 at 12:21 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 29 August 2014 12:24, Alim Akhtar alim.akh...@samsung.com wrote:
There are upcoming ARM64 SoCs with dw_mmc host controller.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/Kconfig
Hi Jaehoon,
On Mon, Sep 15, 2014 at 3:56 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Almost all case is selected to 0.
(It's not correct sample-clock value.)
Since it set to wrong value, HS200 mode don't work fine.
Can you please explain what problem you are facing here?
It is not clear
Hi Jaehoon
On Wed, Sep 17, 2014 at 8:06 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Alim.
On 09/17/2014 07:27 AM, Alim Akhtar wrote:
Hi Jaehoon,
On Mon, Sep 15, 2014 at 3:56 PM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
Almost all case is selected to 0.
(It's not correct
Hi Sonny/Doug,
On Mon, Oct 6, 2014 at 11:23 PM, Sonny Rao sonny...@chromium.org wrote:
We've already got a reset of DMA after it's done. Add one before we
start DMA too. This fixes a data corruption on Rockchip SoCs which
will get bad data when doing a DMA transfer after doing a PIO
in DW_MMC core v2.70a and v2.40a with HAPS-51 setup and
driver is working fine.
Signed-off-by: Prabu Thangamuthu prab...@synopsys.com
---
With a minor nit below, this looks good to me.
So, Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Have tested this on exynos7 platform which has dw_mmc
Hi Eddie,
On Thu, Oct 9, 2014 at 7:43 PM, Eddie Cai(蔡枫) eddie@rock-chips.com wrote:
Hi Alim
2014年10月8日 上午4:28于 Alim Akhtar alim.akh...@gmail.com写道:
Hi Sonny/Doug,
On Mon, Oct 6, 2014 at 11:23 PM, Sonny Rao sonny...@chromium.org wrote:
We've already got a reset of DMA after it's
Hi Doug,
On Sat, Oct 11, 2014 at 9:46 AM, Doug Anderson diand...@chromium.org wrote:
In (28f92b5 mmc: core: Try other signal levels during power up) we can
see that there are times when it's valid to try several signal
voltages. Don't print an ugly error in the logs when that happens.
Hi Prahu,
Thanks for a quick re-spin o the patch.
One last comment, this is more of a information seek.
On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu prab...@synopsys.com wrote:
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
mode from IP version 2.70a onwards.
Hi Doug,
On Tue, Oct 14, 2014 at 10:21 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Thu, Oct 9, 2014 at 5:36 PM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Thu, Oct 9, 2014 at 3:19 PM, Alim Akhtar alim.akh...@gmail.com wrote:
Thats fine, I think every vendor (most of them
Hi Doug,
On Tue, Oct 14, 2014 at 9:57 PM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Tue, Oct 14, 2014 at 5:02 AM, Alim Akhtar alim.akh...@gmail.com wrote:
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1075,7 +1075,7 @@ static int dw_mci_switch_voltage(struct
Hi Doug,
On Tue, Oct 14, 2014 at 10:03 PM, Doug Anderson diand...@chromium.org wrote:
The dw_mmc driver had a bunch of code that ran whenever a card was
ejected and inserted. However, this code was old and crufty and
should be removed. Some evidence that it's really not needed:
1. Is is
.
We tested this on an Exynos 5800 with HS200 and didn't notice any
difference in sequential read throughput.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
This looks fine.
Reviewed-by: Alim
Hi Doug,
On Thu, Oct 16, 2014 at 9:40 PM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Thu, Oct 16, 2014 at 5:57 AM, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Doug,
On Tue, Oct 14, 2014 at 10:03 PM, Doug Anderson diand...@chromium.org
wrote:
The dw_mmc driver had a bunch of code
Hi Doug,
On Wed, Oct 22, 2014 at 10:06 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Sun, Oct 19, 2014 at 8:23 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi.
On 10/17/2014 09:44 PM, Alim Akhtar wrote:
Hi Doug,
On Thu, Oct 16, 2014 at 9:40 PM, Doug Anderson diand
Thangamuthu prab...@synopsys.com
Thanks!!
This looks good now and ready to go in.
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
and you already have Tested-by from Vivek.
Jaehoon / Seungwon, any other thoughts from your side? Can this patch
gets an ACK now? As other exynos7 dw_mmc patches are blocked
Hi Jaehoon,
As 64bit dependent patch for dw_mmc is already merged.
Do you have any comments on this patch?
This patch still apply cleanly on ulf's next and v3.18-rc4 kernel.
Regards,
Alim
On Tue, Oct 21, 2014 at 1:50 PM, Vivek Gautam gautam.vi...@samsung.com wrote:
On Tue, Oct 21, 2014 at 1:47
Hi Ulf,
On Tue, Sep 9, 2014 at 12:21 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 29 August 2014 12:24, Alim Akhtar alim.akh...@samsung.com wrote:
There are upcoming ARM64 SoCs with dw_mmc host controller.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/Kconfig
Hi Shawn,
On Sun, Nov 23, 2014 at 9:00 PM, Shawn Guo shawn@linaro.org wrote:
Hi Alim,
On Sat, Nov 22, 2014 at 06:56:46PM +0530, Alim Akhtar wrote:
Hi Shawn,
On Sat, Nov 22, 2014 at 5:01 AM, Shawn Guo shawn@linaro.org wrote:
Seungwon, Jaehoon,
On Fri, Nov 21, 2014 at 02:39:10PM
Hi Ulf,
On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
Instead of having a local hack taking care of sending the tuning
command and as well to verify the response pattern, let's convert to
the common mmc_send_tuning() API.
This change affects the Exynos variant,
Hi Ulf
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 6 December 2014 at 13:43, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Ulf,
On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
Instead of having a local hack taking care of sending
Hi Yuvaraj
On Mon, Aug 19, 2013 at 12:06 PM, Yuvaraj Kumar C D
yuvaraj...@gmail.com wrote:
Exynos5420 Mobile Storage Host controller has Security Management Unit
(SMU) for channel 0 and channel 1 (mainly for eMMC).This patch adds a
quirk to bypass SMU as it is not being used yet.
This patch
on exynos5420.
Tested-by: Alim Akhtar alim.akh...@samsung.com
--
1.7.9.5
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To unsubscribe from this list: send the line unsubscribe linux-mmc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Regards,
Alim
in exynos5420
changes since V1:
1.avoid code duplication by calling dw_mci_exynos_priv_init in
resume path.
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/dw_mmc-exynos.c | 29
From: Alim Akhtar alim.akh...@samsung.com
Hardware locked error set when the dw_mmc controller cannot load a
command issued by software. When software sets the start_cmd bit in the
CMD register, the controller tries to load the command. If the command
buffer is already filled with a command
, alim akhtar wrote:
From: Alim Akhtar
Hardware locked error set when the dw_mmc controller cannot load a
command issued by software. When software sets the start_cmd bit in the
CMD register, the controller tries to load the command. If the command
buffer is already filled with a command
--- Original Message ---
Sender : Jaehoon Chungjh80.ch...@samsung.com S4/Engineer/System S/W
Lab./Samsung Electronics
Date : Oct 07, 2013 13:34 (GMT+09:00)
Title : Re: [PATCH] mmc: dw_mmc: Add hardware lock error (HLE) to the CMD
error flag
On 10/07/2013 01:22 PM, ALIM AKHTAR wrote
.
On 10/07/2013 05:21 PM, ALIM AKHTAR wrote:
--- Original Message ---
Sender : Jaehoon Chung S4/Engineer/System S/W Lab./Samsung Electronics
Date : Oct 07, 2013 13:34 (GMT+09:00)
Title : Re: [PATCH] mmc: dw_mmc: Add hardware lock error (HLE) to the CMD
error flag
On 10/07/2013
Hi Jaeohoon,
On Mon, Oct 7, 2013 at 2:00 AM, ALIM AKHTAR alim.akh...@samsung.com wrote:
Hi Jaeohoon,
Thanks for quick review.
--- Original Message ---
Sender : Jaehoon Chungjh80.ch...@samsung.com S4/Engineer/System S/W
Lab./Samsung Electronics
Date : Oct 07, 2013 17:36 (GMT+09:00
=23010
Can we have some conclusion about how to handle HLE?
Thanks!!!
On Thu, Oct 10, 2013 at 4:31 PM, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Jaeohoon,
On Mon, Oct 7, 2013 at 2:00 AM, ALIM AKHTAR alim.akh...@samsung.com wrote:
Hi Jaeohoon,
Thanks for quick review.
--- Original
be better to add error message when happened.
Do you mean check for HLE in interrupt handler and print error message?
If so, do you want me to respin this patch?
Thanks,
Seungwon Jeon
Best Regards,
Jaehoon Chung
On 11/12/2013 01:12 PM, Alim Akhtar wrote:
Hi Seungwon/ Jaehoon,
I can see
Hi Ulf
On Thu, Dec 19, 2013 at 12:04 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
There are no reason to why the use of a non-volatile internal eMMC
cache should be controlled by a host cap. Instead let's just enable it
if the eMMC card supports it.
Signed-off-by: Ulf Hansson
Hi Sachin,
On Thu, Feb 14, 2013 at 8:55 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
On 07/02/2013, Sachin Kamat sachin.ka...@linaro.org wrote:
Added compatibility string for Exynos4412 SoC.
Cc: Thomas Abraham thomas.abra...@linaro.org
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Hi,
On Tue, Feb 19, 2013 at 6:04 PM, Dongjin Kim tobet...@gmail.com wrote:
Hello Seungwon,
Thank you for reviewing and I understand what you mean.
I agree that Exynos5250 and Exynos4412 are not same, no idea how much
they are different because no Exynos5250 spec on my hand. But at least
I
Hi Ulf,
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 6 December 2014 at 13:43, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Ulf,
On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
Instead of having a local hack taking care of sending
Hi Jaehoon
On Mon, Dec 15, 2014 at 10:18 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Alim.
On 12/13/2014 12:13 AM, Jaehoon Chung wrote:
Hi.
On 12/10/2014 06:30 AM, Alim Akhtar wrote:
Hi Ulf
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 6 December
From: Seungwon Jeon tgih@samsung.com
Add checking whether the clock is valid.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/dw_mmc-exynos.c | 11 +++
1 file
is used fully. It is found that the performance
is improved with the increased the max_blk_count.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/dw_mmc.c |4 ++--
1 file
This series is part of [1] which are send by Seungwon jeon few months back.
when he attempted to add HS400 support for exynos dw_mmc host controller.
Since then these patches are just sitting idle.
This is my attempt to land some of the changes which are generic, and
performance
booter on dw_mmc
the commit message]
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
drivers/mmc/host/dw_mmc-exynos.c | 48
drivers/mmc/host/dw_mmc-exynos.h | 56 ++
2 files changed, 62 insertions(+), 42 deletions(-)
create mode 100644
Hi Ulf,
On Mon, Dec 22, 2014 at 8:11 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 20 December 2014 at 14:18, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Ulf,
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 6 December 2014 at 13:43, Alim Akhtar alim.akh
, since it's the only one which
support the dw_mmc's -execute_tuning() callback.
Signed-off-by: Ulf Hansson ulf.hans...@linaro.org
---
yes, this works fine now, with the other patch which add STOP command,
and I don't need to modify DT timing values. So,
Reviewed-by: Alim Akhtar alim.akh
This serise is second part of [1] which was posted by Seungwon Jeon few months
back.
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi platform and exynos7 platform for HS400
mode.
Appreciate testing on other exynos5 platform which supports
-by: Alim Akhtar alim.akh...@samsung.com
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 15 ++--
drivers/mmc/host/dw_mmc-exynos.c | 81 ++--
drivers/mmc/host/dw_mmc-exynos.h |1 +
3 files changed, 67 insertions(+), 30 deletions
From: Seungwon Jeon tgih@samsung.com
Implements HS400 support for exynos host driver.
And this patch includes some updates as new mode is added.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
.../devicetree/bindings/mmc/exynos-dw
From: Seungwon Jeon tgih@samsung.com
As dw-mshc-ciu-div is strongly close to timing property,
it is merged with each timing property.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
arch/arm/boot/dts/exynos3250-monk.dts
From: Seungwon Jeon tgih@samsung.com
HS400 timing value set is added for SMDK5420, peach-pit and
exynos5800 peach-pi.
And GPIO line for RCLK should be pull-down state.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
arch/arm/boot/dts
Hi Jaehoon
On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi,
This patch can be separated.
When i tested on my board, it's not working fine.
I think it depends on my timing, so i will check after change the timing.
On 01/14/2015 07:30 PM, Alim Akhtar wrote
hs400, as of now
I am not sure if all the 5800-peach-pi boards are populated with
emmc5.0 device or not. So I will enable HS400 after confirming this
point.
On 01/14/2015 07:30 PM, Alim Akhtar wrote:
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added for SMDK5420, exynos5420
Hi Andrzej,
On Tue, Feb 10, 2015 at 7:59 PM, Andrzej Hajda a.ha...@samsung.com wrote:
According to specs for version 250A, status register should be
tested before clock update. Otherwise in case MMC card is missing
mci_send_cmd timeouts and subsequent CTYPE registry write causes system hang.
Hi Andrzej,
On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda a.ha...@samsung.com wrote:
Hi Alim,
On 02/11/2015 03:57 AM, Addy wrote:
On 2015/02/10 23:22, Alim Akhtar wrote:
Hi Addy,
On Mon, Feb 9, 2015 at 12:55 PM, Addy Ke addy...@rock-chips.com wrote:
Because of some uncertain factors
Hi Jaehoon,
Thanks for review.
On Thu, Jan 22, 2015 at 11:28 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi.
On 01/21/2015 11:12 PM, Alim Akhtar wrote:
Hi Jaehoon
On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
Hi,
If you want to enable the hs400 mode
From: Seungwon Jeon tgih@samsung.com
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
[Alim: addressed review comments
to be set as input clock to controller.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
[Alim: addressed review comments]
---
arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
arch/arm
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi and Exyons7 platform for HS400 mode.
Tested HS200 mode with this series applied, HS200 still works.
Appreciate testing on other exynos5/7 platform which supports emmc5.0
Changes in V5:
Hi Doug,
On Tue, Jan 6, 2015 at 6:37 AM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Sun, Jan 4, 2015 at 2:43 PM, Alim Akhtar alim.akh...@gmail.com wrote:
You are breaking backward compatibility here. If your change is
merged then all old boards will instantly break. Since the dts
From: Seungwon Jeon tgih@samsung.com
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
[Alim: addressed review comments
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi platform for HS400 mode.
Tested HS200 mode with this series applied, HS200 still works.
Appreciate testing on other exynos5/7 platform which supports emmc5.0
Changes in V4:
* drop the
Hi Addy,
On Mon, Feb 9, 2015 at 12:55 PM, Addy Ke addy...@rock-chips.com wrote:
Because of some uncertain factors, such as worse card or worse hardware,
DAT[3:0](the data lines) may be pulled down by card, and mmc controller
will be in busy state. This should not happend when mmc controller
Hi Andrzej,
On Thu, Feb 12, 2015 at 4:43 PM, Andrzej Hajda a.ha...@samsung.com wrote:
On 02/12/2015 12:20 AM, Alim Akhtar wrote:
Hi Andrzej,
On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda a.ha...@samsung.com wrote:
Hi Alim,
On 02/11/2015 03:57 AM, Addy wrote:
On 2015/02/10 23:22, Alim
On Thu, Feb 12, 2015 at 4:40 PM, Andrzej Hajda a.ha...@samsung.com wrote:
On 02/12/2015 03:28 AM, addy ke wrote:
Hi Andrzej and Alim
On 2015/2/12 07:20, Alim Akhtar wrote:
Hi Andrzej,
On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda a.ha...@samsung.com wrote:
Hi Alim,
On 02/11/2015 03:57
)
+ dw_mci_setup_bus(slot, false);
This looks a HACK to me.
If stabilizing host voltage regulator is the problem, can you try out
below patch, and see if this resolve your issue?
===
[PATCH] mmc: dw_mmc: Wait for host voltage regulator to be stable
Signed-off-by: Alim Akhtar alim.akh
Hi Doug / Sonny
New year greetings!!
On Sat, Jan 3, 2015 at 4:37 AM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Mon, Dec 22, 2014 at 4:12 AM, Alim Akhtar alim.akh...@samsung.com wrote:
From: Seungwon Jeon tgih@samsung.com
Even though 1MB is reserved for descriptor table
Hi Doug,
Thanks for looking into this series.
On Fri, Jan 2, 2015 at 10:28 PM, Doug Anderson diand...@chromium.org wrote:
Alim,
On Tue, Dec 30, 2014 at 10:43 PM, Alim Akhtar alim.akh...@samsung.com wrote:
From: Seungwon Jeon tgih@samsung.com
ciu_div may not be common value for all speed
Hi Jaehoon,
On Thu, Jan 8, 2015 at 7:16 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 12/31/2014 03:43 PM, Alim Akhtar wrote:
From: Seungwon Jeon tgih@samsung.com
Implements HS400 support for exynos host driver.
And this patch includes some updates as new mode is added.
Signed-off
to be set as input clock to controller.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
[Alim: addressed review comments]
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changes in V7:
Add back bus1 pin, which was removed during rebase
Ping?
On Wed, Feb 25, 2015 at 12:05 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Alim.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added
to be set as input clock to controller.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
[Alim: addressed review comments]
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changes in V6:
Rebased on kukjin's for-next branch[0]
(commit
Thanks Kukjin for looking into this.
I will rebase on top of your for-next and send again.
On Tue, Mar 17, 2015 at 7:42 AM, Kukjin Kim kg...@kernel.org wrote:
Alim Akhtar wrote:
Ping?
Alim,
Can you please re-send it based on latest my tree?
It would be helpful for me ;)
Thanks,
Kukjin
Gentle Ping !!
On Wed, Mar 18, 2015 at 4:50 PM, Alim Akhtar alim.akh...@samsung.com wrote:
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull
is required, I won't be able to do so until march 9th,
hope you can take care of such changes.
Thanks!
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
From: Seungwon Jeon tgih@samsung.com
Implements HS400 mode support for exynos host driver.
This also include some
Hi Doug,
On Fri, Feb 20, 2015 at 5:19 AM, Doug Anderson diand...@chromium.org wrote:
Alim and Addy,
On Sun, Feb 15, 2015 at 3:28 PM, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Addy,
On Sat, Feb 14, 2015 at 11:47 AM, Addy Ke addy...@rock-chips.com wrote:
As show in mmc_power_up
Hi Doug,
On peach-pi, I got a hung task once in 4 cold boot as [1].
And every time got a hung task [2] on suspend/resume, triggered
exactly from this change. I have a debug print at $SUBJECT change.
[1]:
on boot:
[ 240.197190] INFO: task kworker/u16:1:50 blocked for more than 120
HI
On Mon, Aug 17, 2015 at 4:56 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 08/17/2015 02:52 PM, Michal Suchanek wrote:
Hello,
On 17 August 2015 at 03:55, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Michal.
On 08/12/2015 09:23 PM, Michal Suchanek wrote:
The driver has
Hi Michal,
On Mon, Aug 17, 2015 at 8:25 PM, Michal Suchanek hramr...@gmail.com wrote:
Hello,
On 17 August 2015 at 16:42, Alim Akhtar alim.akh...@gmail.com wrote:
HI
On Mon, Aug 17, 2015 at 4:56 PM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
On 08/17/2015 02:52 PM, Michal Suchanek wrote
Hi Jaehoon
On Thu, Aug 6, 2015 at 12:53 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
When num-slots is lower than 1, it's right that should be returned -ENODEV.
make sense.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Tested
Hi Shawn
On Thu, Aug 6, 2015 at 12:14 PM, Shawn Lin shawn@rock-chips.com wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these
...@samsung.com
---
Anyway, patch looks good so,
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Tested on exynos5800, no functionality changes, so
Tested-by: Alim Akhtar alim.akh...@samsung.com
drivers/mmc/host/dw_mmc.c | 34 +-
include/linux/mmc/dw_mmc.h | 1 -
2
hw is reset before a system reboot.
Signed-off-by: Javier Martinez Canillas <jav...@osg.samsung.com>
Tested-by: Markus Reichl <m.rei...@fivetechno.de>
Tested-by: Anand Moon <linux.am...@gmail.com>
Reviewed-by: Alim Akhtar <alim.akh...@samsung.com>
---
Hello,
This patch was n
On 10/22/2015 09:04 PM, Doug Anderson wrote:
Krzysztof,
On Wed, Oct 21, 2015 at 6:43 PM, Krzysztof Kozlowski
wrote:
I think at least one platform may be affected because it used
mmc-pwrseq-emmc and gpio-restart.
Look at rk3288-veyron.dtsi.
Both of restart handlers
Hi Yalin,
On Wed, Nov 11, 2015 at 9:53 AM, yalin wang wrote:
> Use kmalloc instead of kzalloc, zero the memory is not needed.
>
why you want to do this? what problem you faces, and how this resolves the same?
> Signed-off-by: yalin wang
> ---
t done a stress
testing, but looks like across cold/warm reboot and across
suspend/resume cycles, eMMC card still works in hs200/hs400 mode.
Feel free to add:
Tested-by: Alim Akhtar <alim.akh...@samsung.com>
>
> Regards
> Adrian
> --
> To unsubscribe from this list: send the
Hi Jaehoon
On 10/21/2015 04:19 PM, Jaehoon Chung wrote:
> According to DesignWare DoC file, CardThreshold bit should be
> bit[27:16].
> So it's correct to use (0xFFF << 16), not (0x1FFF << 16).
>
> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>
;
> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
>
Looks good to me,
Reviewed-by: Alim Akhtar <alim.akh...@samsung.com>
Tested on peach board with some additional dt changes, works well.
so, Tested-by: Alim Akhtar <alim.akh...@samsung.com>
> ---
> drivers/
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