Tony Lindgren wrote:
* Mike Rapoport m...@compulab.co.il [100422 01:41]:
Ghorai, Sukumar wrote:
CM-T35, for instance can be assembled with different NAND flash
chips. Besides, boards that use NAND as primary boot device, we
anyway depend on proper GPMC configuration in the bootloader chain.
No more comments? Can it go in?
Op 22 apr 2010, om 10:23 heeft Koen Kooi het volgende geschreven:
This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out are
supported.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
Changes since v1:
* removed
CC Tomi in case he missed this.
On Mon, Apr 26, 2010 at 10:12 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Currently, if init fails for whatever reason, various DSS related
clocks will be left enabled and prevent the chip from hitting
retention or off-mode.
This patch ensures the
Hello Tony,
On Mon, Apr 26, 2010 at 08:28:12PM +0200, ext Tony Lindgren wrote:
* Eduardo Valentin eduardo.valen...@nokia.com [100426 01:20]:
From: Eduardo Valentin eduardo.valen...@nokia.com
This patch exports the OMAP3 IDCODE, Production ID and Die ID to userspace
via /proc/cpuinfo
On 04/26/2010 10:53 PM, Greg Ungerer wrote:
[..]
Image creation steps:
make bzImage, copy the arch/arm/boot/zImage to required location,
./tagger -c configs/sample-3630.cfg -f zImage
./gpsign -c configs/sample-3630.cfg -f zImage.tag
I need to probably add some decent documentation around it,
Hi,
On Tue, 2010-04-27 at 11:14 +0200, ext Grazvydas Ignotas wrote:
CC Tomi in case he missed this.
Thanks =)
On Mon, Apr 26, 2010 at 10:12 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Currently, if init fails for whatever reason, various DSS related
clocks will be left enabled
On 04/27/10 07:58, Koen Kooi wrote:
No more comments? Can it go in?
Op 22 apr 2010, om 10:23 heeft Koen Kooi het volgende geschreven:
This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out
are supported.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
OMAP3530 TRM section 7.4.4.4.2 requires OFFOUTENABLE to be set (active low)
if wakeup capabilities are enabled on a pad. During OFF mode testing
on OMAP3530 EVM, it was observed that the device was not residing in
the OFF state. The device enters into the OFF state and immediately exits
from that
Hi,
-Original Message-
From: Hiroshi DOYU [mailto:hiroshi.d...@nokia.com]
Sent: Monday, April 19, 2010 1:50 AM
To: Kanigeri, Hari; p...@pwsan.com; khil...@deeprootsystems.com
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH] ARM:iommu support
Hello all,
Here is the version 2 of this series. Now die id is protected using
same x86 protection mechanism to hide x86 product number. Besides,
a compilation Kconfig option has been added for DIE ID as well.
Here is previous PATCH 0/4 message:
This series is to continue what has been
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP2,3,4 data into system_soc_info. Now we get omap
information under /proc/cpuinfo.
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
arch/arm/mach-omap2/id.c | 21 +++--
1 files changed, 15 insertions(+),
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP data into system_soc_info. Now we get omap
information under /proc/cpuinfo.
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
arch/arm/mach-omap1/id.c | 18 --
1 files changed, 12 insertions(+), 6
From: Eduardo Valentin eduardo.valen...@nokia.com
This patch exports the OMAP3 IDCODE and Production ID to userspace
via /proc/cpuinfo using the system_soc_info.
Die ID is also exported depending on what users pass as kernel
parameter. It is same protection mechanism made for x86 product
number.
From: Eduardo Valentin eduardo.valen...@nokia.com
This patch extends the ARM /proc/cpuinfo to include soc info data.
It is implemented via the same way which is done for
system_rev, system_serial_low and system_serial_high.
Then, now we have system_soc_info, which is printed only
if there is
Hello all,
Not sure if this is the right place to ask this, but I have a bit of a
problem with the omap kernel.
I've added some patches to the 2.6.32-omap1 tag of the omap git tree to
support a custom board. When I try to boot, about 30% of the time, it
gets all the way to the prepare_namespace
Kevin,
From: Menon, Nishanth
Sent: Monday, April 12, 2010 1:46 PM
To: linux-omap
Cc: Kattungal, Deepak; Raja, Govindraj; Kevin Hilman; Tero
Kristo; Menon, Nishanth
From: Deepak K deepa...@ti.com
Original patch:
http://git.omapzoom.org/?p=kernel/omap.git;a=commitdiff;h=42d4
Under certain rare conditions, I2C_STAT[13].RDR bit may be set
and the corresponding interrupt fire, even there is no data in
the receive FIFO, or the I2C data transfer is still ongoing.
These spurious RDR events must be ignored by the software.
This patch handles and ignores RDR spurious
* Mike Rapoport m...@compulab.co.il [100427 00:40]:
Tony Lindgren wrote:
* Mike Rapoport m...@compulab.co.il [100422 01:41]:
Ghorai, Sukumar wrote:
CM-T35, for instance can be assembled with different NAND flash
chips. Besides, boards that use NAND as primary boot device, we
anyway depend
* Eduardo Valentin eduardo.valen...@nokia.com [100427 03:08]:
Hello Tony,
On Mon, Apr 26, 2010 at 08:28:12PM +0200, ext Tony Lindgren wrote:
* Eduardo Valentin eduardo.valen...@nokia.com [100426 01:20]:
+
+ /* Append OMAP3 IDCODE, Production ID and Die ID to system_soc_info */
+ sz
* Manjunatha GK manj...@ti.com [100427 07:21]:
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -199,6 +199,7 @@ struct omap_i2c_dev {
u16 bufstate;
u16 syscstate;
u16 westate;
+ bool
G, Manjunath Kondaiah had written, on 04/27/2010 09:47 AM, the following:
Under certain rare conditions, I2C_STAT[13].RDR bit may be set
and the corresponding interrupt fire, even there is no data in
the receive FIFO, or the I2C data transfer is still ongoing.
These spurious RDR events must be
On Tue, Apr 27, 2010 at 03:14:13PM +0200, Valentin Eduardo (Nokia-D/Helsinki)
wrote:
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP2,3,4 data into system_soc_info. Now we get omap
information under /proc/cpuinfo.
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
Mike Turquette mturque...@ti.com writes:
Kevin Hilman wrote:
While handling PRCM IRQs, mask out interrupts that are not enabled in
PRM_IRQENABLE_MPU. If these are not masked out, non-enabled
interrupts are caught and a WARN() is dumped.
This was noticed using SmartReflex transitions which
Tomi Valkeinen tomi.valkei...@nokia.com writes:
Hi,
On Tue, 2010-04-27 at 11:14 +0200, ext Grazvydas Ignotas wrote:
CC Tomi in case he missed this.
Thanks =)
On Mon, Apr 26, 2010 at 10:12 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Currently, if init fails for whatever
Ranjith Lohithakshan ranji...@ti.com writes:
OMAP3530 TRM section 7.4.4.4.2 requires OFFOUTENABLE to be set (active low)
if wakeup capabilities are enabled on a pad. During OFF mode testing
on OMAP3530 EVM, it was observed that the device was not residing in
the OFF state. The device enters
On Mon, 26 Apr 2010, Tony Lindgren wrote:
Please pull omap fixes from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
omap-fixes-for-linus
I pulled it this time, but I'm starting to get really irritated with you.
These look like real fixes, but quite frankly, by
* Linus Torvalds torva...@linux-foundation.org [100427 08:28]:
On Mon, 26 Apr 2010, Tony Lindgren wrote:
Please pull omap fixes from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
omap-fixes-for-linus
I pulled it this time, but I'm starting to get
Thara Gopinath th...@ti.com writes:
This patch introduces VP force update method of voltage scaling
and enables it by default. The older method of vc bypass is now
configuratble through a menu config option. VP force update is the
hardware recommended method of voltage scaling.
On Tue, 27 Apr 2010, Tony Lindgren wrote:
OK point taken. I should have dealt with this earlier. Will only queue
regressions after -rc3 or so.
Note that the only regressions is certainly not a hard rule. Anything
that would be valid for -stable is obviously always valid: security
issues,
Kevin Hilman wrote:
commit cfabe8a950e252d26cdeb4a9bb11e2cabb2a50c6
Author: Kevin Hilman khil...@deeprootsystems.com
Date: Mon Apr 26 14:59:09 2010 -0700
OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQs
While handling PRCM IRQs, mask out interrupts that are not
* Linus Torvalds torva...@linux-foundation.org [100427 09:31]:
On Tue, 27 Apr 2010, Tony Lindgren wrote:
OK point taken. I should have dealt with this earlier. Will only queue
regressions after -rc3 or so.
Note that the only regressions is certainly not a hard rule. Anything
that
Thara Gopinath th...@ti.com writes:
This patch adds the hwmod strucutres and other hwmod data for
OMAP3 Smartreflex IP's.
Should also comment about the additional data used in dev_attr as well.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |
Thara Gopinath th...@ti.com writes:
This patch converts the exisitng smartreflex library into a
platform driver with device , driver registrations using hardware mods.
As part of this Ntarget values are passed as platform data.
Signed-off-by: Thara Gopinath th...@ti.com
---
Thara Gopinath th...@ti.com writes:
This patch moves the hooks to enable disable smartreflex
autocompensation to pm debugfs from the /sys/power/.
To enable autocompensation for smartreflex SRn do
echo 1 path/pm_debug/srn_autocomp
To disable autocompensation for smartreflex SRn do
A few simple patches that cleanup and simplifies mailbox.
The last patch is the most interesting -
It converts mailbox to use kfifo as the underlying
queueing implementation instead of using the block API.
There're also additional performance patches on the way, we
are internally testing them now.
rwlocks are slower and have potential starvation issues so spinlocks are
generally preferred
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
arch/arm/plat-omap/mailbox.c | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c
use multiple MODULE_AUTHOR lines for multiple authors
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
arch/arm/mach-omap2/mailbox.c |3 ++-
arch/arm/plat-omap/mailbox.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c
Fix reverse likeliness
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
arch/arm/plat-omap/mailbox.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 8abf0e8..72b17ad 100644
---
The underlying buffering implementation of mailbox
is converted from block API to kfifo due to the simplicity
and speed of kfifo.
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
---
arch/arm/plat-omap/include/plat/mailbox.h |5 +-
* Madhusudhan madhu...@ti.com [100408 10:07]:
Tony, do you care to just look up the serial number of your board?
Sorry for the delay in replying, I've been travelling for a few weeks
and been in meetings quite a bit. Anyways, it's a 1013037 REV A board,
which seems to be production
Thara Gopinath th...@ti.com writes:
This patch removes get_vdd1_opp and get_vdd2_opp API's and replaces
them with get_curr_vdd1_voltage and get_curr_vdd2_voltage API's.
N-target values are now linked to voltages and the link bewtween
voltage and n-target values is managed internally in
Thara Gopinath th...@ti.com writes:
This patch introduces the framework to create voltage table per
VDD basis in voltage driver. Each VDD will have one voltage table,
which in turn will contain one entry per voltage supported and
other data associated with the voltage like smartreflex
Thara Gopinath th...@ti.com writes:
This patch ensures that sr id is passed as a parameter only to
public APIs in smartreflex.c and other APIs in smartreflex.c
uses the omap_sr strucutres.
Signed-off-by: Thara Gopinath th...@ti.com
Good change, but...
---
Thara Gopinath th...@ti.com writes:
There are two separate modules in SmartReflex-AVS :
MinMaxAvg module and Error module. Class3 uses the Error module only.
In Class2 you can choose between either module since it is software based.
The registers are mapped to the modules as followed:
Thara Gopinath th...@ti.com writes:
This patch adds support to pdata enable smartreflex autocompenstion
during init based on enable_on_init flag passed as pdata.
-ENOPARSE. Removing the first 'pdata' makes it understandable, I think.
This patch also adds enabling of autocompensation by
Thara Gopinath th...@ti.com writes:
This patch introduces OMAP3 specific values for Smartreflex and
Voltage processor registers as per the latest TI recommendations.
This patch adds smartreflex errminlimit and voltage processor
errorgain into the voltage tables as they vary with different
Thara Gopinath th...@ti.com writes:
Currently whenever smartreflex is disabled the voltage for the
particular VDD is reset to the non-smartreflex compensated level.
This step is unnecessary during dvfs because anyways in the next couple
of steps before re-enabling smartreflex , the voltage
Thara Gopinath th...@ti.com writes:
This patch introduces VP force update method of voltage scaling
and enables it by default. The older method of vc bypass is now
configuratble through a menu config option. VP force update is the
hardware recommended method of voltage scaling.
changelog
Thara Gopinath th...@ti.com writes:
The main motivations behind this patch series are the following
1. Making smartreflex a platform driver with omap-device layer.
2. Separating voltage specific code from smartreflex.c and other
locations and consolidating them into voltage.c and
Hi,
-Original Message-
From: Aguirre, Sergio
Sent: Thursday, February 25, 2010 9:56 AM
To: linux-arm-ker...@lists.infradead.org
Cc: linux-omap@vger.kernel.org; Albin Tonnerre; Russell King; Aguirre,
Sergio
Subject: [PATCH] arm: Fix .gitignore for boot/compressed folder
This
On 4/16/2010 10:30 PM, Ramos Falcon, Ernesto wrote:
From 9ac5e14af1471b79a64076aec6b866abe87b3365 Mon Sep 17 00:00:00 2001
From: Ernesto Ramoserne...@ti.com
Date: Wed, 31 Mar 2010 21:10:16 -0600
Subject: [PATCH 1/5] DSPBRIDGE: Remove DSP resources from registry
Remove DSP resources from
On 4/16/2010 10:32 PM, Ramos Falcon, Ernesto wrote:
From 805fb981c83356788e0a3eaefb35d9eb74ced10c Mon Sep 17 00:00:00 2001
From: Ernesto Ramoserne...@ti.com
Date: Fri, 16 Apr 2010 20:47:06 -0500
Subject: [PATCH 2/5] DSPBRIDGE: Remove host resources from registry
Remove host resources from
On 4/16/2010 10:33 PM, Ramos Falcon, Ernesto wrote:
From 10010c14048a946190356cc682089d35b1bf7f48 Mon Sep 17 00:00:00 2001
From: Ernesto Ramoserne...@ti.com
Date: Fri, 16 Apr 2010 21:40:57 -0500
Subject: [PATCH 3/5] DSPBRIDGE: Remove DSP resources from registry
Remove DSP resources from
On 4/16/2010 10:34 PM, Ramos Falcon, Ernesto wrote:
From 874bc262b47319b311d14ca32a7c1afb9eb388e8 Mon Sep 17 00:00:00 2001
From: Ernesto Ramoserne...@ti.com
Date: Thu, 1 Apr 2010 00:17:24 -0600
Subject: [PATCH 4/5] DSPBRIDGE: Remove handles from registry
Remove handles from registry.
On 4/16/2010 10:35 PM, Ramos Falcon, Ernesto wrote:
From 1046e5fabff98074f706ed257c040ca3dd0decdb Mon Sep 17 00:00:00 2001
From: Ernesto Ramoserne...@ti.com
Date: Fri, 16 Apr 2010 21:46:50 -0500
Subject: [PATCH 5/5] DSPBRIDGE: Remove Reg module
Remove Reg module from services.
Signed-off-by:
This series of patches adds support for an external keyboard (called
mailboard) connected to the Amstrad Delta (E3) videophone.
The series is based on a patch by Matt Callow, created against
linux-omap-2.6.19[1], initially submitted to the e3-hacking mailing list in
April 2006[2].
Since the
Several ARM platforms/machines that use FIQ define their value of FIQ_START.
Since FIQ is not implemented for OMAP yet, this definition is missing from
OMAP header files.
Put an arbitrary value for FIQ_START into plat/irqs.h for OMAP. Even if not
used by the FIQ handler for Amstrad Delta, this
This patch introduces a Fast Interrupt Request (FIQ) handler for Amstrad Delta
(E3) videophone. The handler's purpose is to process interrupts generated by a
GPIO line that a serial keyboard clock hangs off. It collects consecutive bits
into words, pushing them into a buffer, then requests a
On 4/8/2010 6:43 PM, Gomez Castellanos, Ivan wrote:
From 0306e1ff7c9160dbc5eb9fffcd789a40bea0debb Mon Sep 17 00:00:00 2001
From: Ivan Gomez Castellanosivan.go...@ti.com
Date: Fri, 19 Mar 2010 16:43:26 -0600
Subject: [PATCH 01/13] DSPBRIDGE: Replace mem_calloc() by kzalloc() or
__vmalloc()
In case of Amstrad Delta modem utilized GPIO line, interrupt is requested from
standard serial8250 driver code without first requesting the GPIO pin itself.
Even if it works with default OMAP GPIO interrupt handler, it appeared not
compatible with recent, optimized version of the board GPIO FIQ
The patch adds initialization of FIQ related handlers to the Amstrad Delta
videophone board code. FIQ will be used instead of a traditional IRQ for
processing all GPIO generated interrupts, including a keyboard serial clock
line.
Created and tested against linux-omap master,
commit
The patch introduces a serio driver that supports a keyboard serial port found
on the Amstrad Delta videophone board.
After initializing the hardware, the driver reads its input data from a buffer
filled in by the board FIQ (Fast Interrupt Request) handler.
Standard AT keyboard driver (atkbd)
The patch adds a CONFIG directive required for supporting the Amstrad Delta
connected external keyboard by default.
Created and tested against linux-omap master,
commit 104a77440f05430f29f9d3f4ecb88c1536819585 dated 2010-04-27.
Works on top of PATCH v4 4/5(7), input: serio: add support for
Since it is not used, remove.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/rmgr/drv_interface.c |9 -
1 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
index
If we fail if a clk handle is NULL during initialization
then there is no need to keep checking every time if the
handle is NULL for enable/disable/set_32k/get_use_cnt.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c | 68
Rename services_clk_* to dsp_clk_*
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h | 78
drivers/dsp/bridge/services/clk.c | 88 ++--
drivers/dsp/bridge/services/services.c |
Change the way iva2 clock is handled and since the rate is needed
for this clock only, make the function get_rate to be specific for
iva clock.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h | 16 +--
drivers/dsp/bridge/services/clk.c
This is only used for GPTs and should be addressed once
those clocks are requested using DM timer framework.
This patch might break functionality.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h | 14 +-
The value returned by clk_get on error is not NULL.
This checks if the value returned is an error or not.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Remove unused clock sys_ck
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h |1 -
drivers/dsp/bridge/services/clk.c |1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/clk.h
This set of patches remove clk module from the services layer.
Now:
- GPT 5-8 are controlled through DM Timer framework.
- MCBSP clocks are enabled by requesting the proper mcbsp device.
- WDT is left for bridge driver to control rather than on request from dsp.
- SSI is controlled by
This patch fixes the wrong name for ssi clock,
now it has been split into ssr and sst for fck. It
handle ick/ssr_fck/sst_fck clocks with one call to
disable/enable.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c | 56
Rename file and move it outside services layer.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/Makefile |4 +-
drivers/dsp/bridge/rmgr/drv_interface.c |2 +
drivers/dsp/bridge/services/clk.c | 334 ---
Given that:
Bridge should enable McBSP_CLKS (using T2 clock) so that DPLL4
can be gated. Once McBSP2 clock is released, it should disable
McBSP_CLKS as it prevents PER and CORE domain transitions when
OFF is set to target power state.
It seems this code was duplicated, now it has been moved to
Use omap mcbsp to enable mcbsp clocks
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c | 24 ++--
1 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/dsp/bridge/services/clk.c
Instead of two calls to enable/disable for ick and fck use
one call to enable/disable both.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h | 35 +--
drivers/dsp/bridge/services/clk.c | 14 +-
This patch switches to use DM timer framework instead of
a custom one for GPT timers, currently dsp can make use of
gpt 5, 6, 7 or 8.
Signed-off-by: Omar Ramirez Luna omar.rami...@hotmail.com
---
drivers/dsp/bridge/services/clk.c | 25 ---
Remove unusued struct and typedef.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h |2 --
drivers/dsp/bridge/services/clk.c |7 ---
2 files changed, 0 insertions(+), 9 deletions(-)
diff --git
This patch ensure a balanced number of enable/disable
calls is made.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c | 37 +
1 files changed, 37 insertions(+), 0 deletions(-)
diff --git
Instead of querying the use count, balanced number of
enable/disable should be enforced across the system.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/clk.h | 13 -
drivers/dsp/bridge/services/clk.c | 23
WDT3 is used as a way to detect dsp hangs, as of now its
control is left to arm side driver, so, no requests should
be received by the dsp to enable/disable this clock.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c |6 --
1 files changed, 4
DSP can request between 5 types of clocks: IVA2, GPT (5-8), WDT (3),
MCBSP (1-5) or SSI clock. This function will be useful in case
a specific clock framework is associated with the clock.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/services/clk.c | 89
This patch moves and simplifies the code used to enable/disable
all the requested peripheral clocks.
Signed-off-by: Omar Ramirez Luna omar.rami...@hotmail.com
---
arch/arm/plat-omap/include/dspbridge/clk.h |4 ++
drivers/dsp/bridge/rmgr/drv_interface.c|1 +
On 04/27/2010 08:29 PM, Omar Ramirez Luna wrote:
This set of patches remove clk module from the services layer.
Now:
- GPT 5-8 are controlled through DM Timer framework.
- MCBSP clocks are enabled by requesting the proper mcbsp device.
- WDT is left for bridge driver to control rather than on
Several ARM platforms/machines that use FIQ define their value of FIQ_START.
Since FIQ is not implemented for OMAP yet, this definition is missing from
OMAP header files.
Put an arbitrary value for FIQ_START into plat/irqs.h for OMAP. Even if not
used by the FIQ handler for Amstrad Delta, this
Tony,
Thanks for the inputs and suggestions for handling i2c-omap errata's in
generic way.
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Tuesday, April 27, 2010 8:31 PM
To: G, Manjunath Kondaiah
Cc: linux-omap@vger.kernel.org; linux-...@vger.kernel.org;
On Tue, Apr 27, 2010 at 05:01:30PM +0200, Balbi Felipe (Nokia-D/Helsinki) wrote:
On Tue, Apr 27, 2010 at 03:14:13PM +0200, Valentin Eduardo (Nokia-D/Helsinki)
wrote:
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP2,3,4 data into system_soc_info. Now we get omap
information
Under certain rare conditions, I2C_STAT[13].RDR bit may be set
and the corresponding interrupt fire, even there is no data in
the receive FIFO, or the I2C data transfer is still ongoing.
These spurious RDR events must be ignored by the software.
This patch handles and ignores RDR spurious
From: Eduardo Valentin eduardo.valen...@nokia.com
This patch extends the ARM /proc/cpuinfo to include soc info data.
It is implemented via the same way which is done for
system_rev, system_serial_low and system_serial_high.
Then, now we have system_soc_info, which is printed only
if there is
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP2,3,4 data into system_soc_info. Now we get omap
information under /proc/cpuinfo.
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
arch/arm/mach-omap2/id.c | 18 --
1 files changed, 12 insertions(+), 6
Hello all,
And now v3 of this series. Basically a minor change wrt string manipulation.
No need to use strlen in so many places. Previous log for reference:
v2:
Here is the version 2 of this series. Now die id is protected using
same x86 protection mechanism to hide x86 product number. Besides,
From: Eduardo Valentin eduardo.valen...@nokia.com
Report OMAP data into system_soc_info. Now we get omap
information under /proc/cpuinfo.
Signed-off-by: Eduardo Valentin eduardo.valen...@nokia.com
---
arch/arm/mach-omap1/id.c | 15 +--
1 files changed, 9 insertions(+), 6
From: Eduardo Valentin eduardo.valen...@nokia.com
This patch exports the OMAP3 IDCODE and Production ID to userspace
via /proc/cpuinfo using the system_soc_info.
Die ID is also exported depending on what users pass as kernel
parameter. It is same protection mechanism made for x86 product
number.
Hi Ohad,
From: ext Ohad Ben-Cohen o...@wizery.com
Subject: [PATCH 4/4] omap: mailbox: convert block api to kfifo
Date: Tue, 27 Apr 2010 19:56:22 +0200
The underlying buffering implementation of mailbox
is converted from block API to kfifo due to the simplicity
and speed of kfifo.
From: ext Ohad Ben-Cohen o...@wizery.com
Subject: [PATCH 4/4] omap: mailbox: convert block api to kfifo
Date: Tue, 27 Apr 2010 19:56:22 +0200
The underlying buffering implementation of mailbox
is converted from block API to kfifo due to the simplicity
and speed of kfifo.
Signed-off-by: Ohad
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