On Wed, 2011-04-20 at 11:13 +0530, Archit Taneja wrote:
On Tuesday 19 April 2011 02:52 PM, Valkeinen, Tomi wrote:
ULPS (Ultra-Low Power State) is a power saving method for DSI bus. When the
ULPS is entered, the host sends an ULPS entry sequence and pulls the DSI
lines
down. On ULPS exit,
The core change in this series is to split the cpuidle_device structure
into parts that can be global and parts that has to remain per-cpu.
The per-cpu pieces are mostly generic statistics that can be independent
of current running driver. As a result of these changes, there is single
copy of
Cpuidle subsystem only suggests the state to enter and does not
guarantee if the suggested state is entered. The actual entered state
may be different because of software or hardware demotion. Software
demotion is done by the back-end cpuidle driver and can be accounted
correctly. Current cpuidle
This is the first step towards global registration of cpuidle
states. The statistics used primarily by the governor are per-cpu
and have to be split from rest of the fields inside cpuidle_state,
which would be made global i.e. single copy. The driver_data field
is also per-cpu and moved.
With this patch there is single copy of cpuidle_states structure
instead of per-cpu. The statistics needed on per-cpu basis
by the governor are kept per-cpu. This simplifies the cpuidle
subsystem as state registration is done by single cpu only.
Having single copy of cpuidle_states saves memory.
On Tue, 2011-04-19 at 14:45 +0200, Michael Büsch wrote:
On Tue, 2011-04-19 at 15:41 +0300, Tomi Valkeinen wrote:
On Tue, 2011-04-19 at 14:34 +0200, Michael Büsch wrote:
On Tue, 2011-04-19 at 15:30 +0300, Tony Lindgren wrote:
But this again reminded me of the mess of having two display
On Tue, 2011-04-19 at 16:15 +0200, Jan Weitzel wrote:
nand_scan calls nand_scan_tail and here we got a ecc.layout and calculate
oobavail for this layout. After calling nand_scan, we change the layout
pointer
if OMAP_ECC_HAMMING_CODE_HW_ROMCODE is set. This results in not calcluated
oobavail.
From: Gulati, Shweta shweta.gul...@ti.com
Core Clk Tree shows incorrect Clk rates at OPP50, as
in commit e07f469d284ca3d1f5dcf5438c22982be98bc071
calling of 'recalc' in API clk_set_rate is unintentionally
removed, because of which clock's tree rates get goofed
up when DVFS happens. This Patch
Hi,
Here is few patches with couple of important fixes...
Regards,
Dmitry
Dmitry Kasatkin (3):
crypto: omap-sham - remove debug print
crypto: omap-sham - enable driver for EMU chips
crypto: omap-sham - hmac calculation bug fix for sha1 base hash
Markku Kylanpaa (1):
crypto: omap-sham -
EMU chips also have crypto HW as HS chips.
Signed-off-by: Dmitry Kasatkin dmitry.kasat...@nokia.com
---
drivers/crypto/omap-sham.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 50aca41..f5c01dc 100644
---
Signed-off-by: Dmitry Kasatkin dmitry.kasat...@nokia.com
---
drivers/crypto/omap-sham.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index e36032b..50aca41 100644
--- a/drivers/crypto/omap-sham.c
+++
From: Markku Kylanpaa ext-markku.kylan...@nokia.com
SHA1 accelerator can also be busy. Add -EBUSY status return option and
return busy status from omap_sham_finup().
Signed-off-by: Markku Kylanpaa ext-markku.kylan...@nokia.com
---
drivers/crypto/omap-sham.c |2 +-
1 files changed, 1
Thanks for the ack. Now can we get this patch set in? Anton are you reading
this?
If you need refreshed set, I can do that.
- Kalle
-Original Message-
From: ext Tony Lindgren [mailto:t...@atomide.com]
Sent: 13. huhtikuuta 2011 9:29
To: Krogerus Heikki (Nokia-SD/Helsinki)
Cc:
-Original Message-
From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
ow...@vger.kernel.org] On Behalf Of ext kalle.jokini...@nokia.com
Sent: 20. huhtikuuta 2011 13:38
To: t...@atomide.com; Krogerus Heikki (Nokia-SD/Helsinki);
cbouatmai...@gmail.com
Cc:
On Wed, 2011-04-20 at 11:06 +0300, Tomi Valkeinen wrote:
So if you first port the stuff and then add the depends-on OMAP1, I'm
fine with it.
Does the display even work on N8x0 with mainline kernel? I don't see any
code for it in the board file.
It needs some additional glue code, which
On Wed, 2011-04-20 at 13:18 +0200, Michael Büsch wrote:
On Wed, 2011-04-20 at 11:06 +0300, Tomi Valkeinen wrote:
So if you first port the stuff and then add the depends-on OMAP1, I'm
fine with it.
Does the display even work on N8x0 with mainline kernel? I don't see any
code for it
On Wed, 2011-04-20 at 14:31 +0300, Tomi Valkeinen wrote:
On Wed, 2011-04-20 at 13:18 +0200, Michael Büsch wrote:
On Wed, 2011-04-20 at 11:06 +0300, Tomi Valkeinen wrote:
So if you first port the stuff and then add the depends-on OMAP1, I'm
fine with it.
Does the display even
Hello All,
I am writing a driver for OMAP4460 thermal sensor. I have a requirement
to send events to the user space from the driver on some condition.
I am using kobject_uevent(temp_sensor-dev-kobj, KOBJ_ADD) as
part of initialization.
On the occurrence of the event i am notifying via
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Gulati, Shweta
Sent: Wednesday, April 20, 2011 2:55 PM
To: linux-omap@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org; Gulati, Shweta; Nayak, Rajendra;
Paul
Hi,
I have a driver where I do memory to memory DMA between GPMC and SDRAM.
Adding a read function, I found that copy_to_user from a
dma_alloc_coherent buffer is significantly slower than from a kmalloc'd one.
Looking at arch/arm/include/asm/pgtable.h I suspect this difference in
speed is
* Felipe Balbi ba...@ti.com [110405 06:00]:
But the fact that Russell has already stated the next merge window is
strictly for code consolidation already puts a stop sign in front of
this patch :-) Still, Tony is the final judge.
Yes this would be for the next merge window. It is still
* oskar.and...@sonyericsson.com oskar.and...@sonyericsson.com [110419 07:39]:
This fixes broken build when using binutils 2.21.
Thanks will queue for the -rc cycle.
Tony
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Hello.
On 20-04-2011 13:25, Shweta Gulati wrote:
From: Gulati, Shwetashweta.gul...@ti.com
Core Clk Tree shows incorrect Clk rates at OPP50, as
in commit e07f469d284ca3d1f5dcf5438c22982be98bc071
Please also specify that commit's summary -- for human readers.
calling of 'recalc' in API
On Wed, Apr 20, 2011 at 07:04, J, KEERTHY j-keer...@ti.com wrote:
Hello All,
I am writing a driver for OMAP4460 thermal sensor. I have a requirement
to send events to the user space from the driver on some condition.
I am using kobject_uevent(temp_sensor-dev-kobj, KOBJ_ADD) as
part of
On 2011-04-20 17:12, Orjan Friberg wrote:
What are my options (besides using mmap)?
It looks like kmalloc + dma_map_single for the DMA destination buffer
and then dma_sync_single_for_{cpu,device} around the call to
copy_to_user pretty much does the trick. At least the %sys load
measured
Many omap2plus-based boards include wireless chips supported by the
wl12xx driver (eg. WL1271 on Blaze and Panda) or can get an extension
that includes such chips (eg. the WLAN daugther card for Beagle). To
get out-of-the-box support for the wl12xx-based chips on such boards,
this patch adds the
On Wed, Apr 20, 2011 at 10:56:51AM +, kalle.jokini...@nokia.com wrote:
Thanks for the ack. Now can we get this patch set in? Anton are you reading
this?
Let's try another mail address for Anton...
Sorry for the delay, folks. The two patches are now applied.
Much thanks for your
Trinabh Gupta trin...@linux.vnet.ibm.com writes:
Cpuidle subsystem only suggests the state to enter and does not
guarantee if the suggested state is entered. The actual entered state
may be different because of software or hardware demotion. Software
demotion is done by the back-end cpuidle
Trinabh Gupta trin...@linux.vnet.ibm.com writes:
With this patch there is single copy of cpuidle_states structure
instead of per-cpu. The statistics needed on per-cpu basis
by the governor are kept per-cpu. This simplifies the cpuidle
subsystem as state registration is done by single cpu
Thanks, queued for 2.6.39-rc.
- Paul
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Thanks, queued both of these for 2.6.39-rc.
- Paul
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Hi
On Thu, 14 Apr 2011, Premi, Sanjeev wrote:
[sp] You seem to have missed this patch:
http://marc.info/?l=linux-arm-kernelm=129735383925285w=2
I asked Eduardo to post his patches because there was no response to
http://marc.info/?l=linux-arm-kernelm=129961775124912w=2
and because he
Hi Rajendra, Santosh,
just FYI I just observed this happening without the clockdomain patch, and
tracked this down. It seems that there is an intermittent
problem with the OMAP L3 bus code. On the 35xx BeagleBoard here, it
occasionally hangs after powerup:
[0.810119] OMAP GPIO
Hello,
This series contains OMAP hwmod/PRCM/clock fixes for the 2.6.39-rc merge
period. Of particular note is the DSS clock alias patch, without which
OMAP4 will crash on boot.
Boot-tested on N800, OMAP35xx Beagle, OMAP37xx Beagle, and OMAP4430
ES2 Panda.
- Paul
---
for_tony_a_2.6.39rc
From: Tomi Valkeinen tomi.valkei...@ti.com
DSS driver has used fck and ick clocks on OMAP2/3 to get DSS HW up and
running, and also to get the pixel clock's source clock rate from the
fck.
On OMAP4 the clock data is set up in a different way, as there's no ick,
dss_fck points to a fake clock
From: Eduardo Valentin eduardo.valen...@ti.com
The saving of CCR.CM_AUTOIDLE_PLL is done in scratchpad area.
However, in current code, the saving is done for CM_AUTOIDLE2_PLL
(offset 0x34) instead of CM_AUTOIDLE_PLL (offset 0x30).
This patch changes the code to save the correct register.
From: Eduardo Valentin eduardo.valen...@ti.com
As per OMAP3 erratum (i671), ROM code adds extra latencies while
restoring CM_AUTOIDLE_PLL register, if AUTO_PERIPH_DPLL is equal to 1.
This patch stores 0's in scratchpad content area corresponding to
AUTO_PERIPH_DPLL, to prevent ROM code to try to
From: Avinash.H.M avinas...@ti.com
GPIO module expects the debounce clocks to be enabled during reset. It doesn't
reset properly and timeouts are seen, if this clock isn't enabled during
reset. Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flags to the GPIO HWMODs, with
which the debounce clocks are
* Felipe Balbi ba...@ti.com [110419 03:02]:
On Tue, Apr 19, 2011 at 11:19:53AM +0300, Jarkko Nikula wrote:
Looks like this code was ever used. It was added by commit
fe3702054f6412aea04373ceb9d27a4a417ff3f0 OMAP: Fix USB on Nokia 770
that can be found from linux-omap history if needed.
Hi
On Wed, 20 Apr 2011, Shweta Gulati wrote:
From: Gulati, Shweta shweta.gul...@ti.com
Core Clk Tree shows incorrect Clk rates at OPP50, as
in commit e07f469d284ca3d1f5dcf5438c22982be98bc071
calling of 'recalc' in API clk_set_rate is unintentionally
removed,
That's intentional. struct
Hi Tony
The following changes since commit f0e615c3cb72b42191b558c130409335812621d8:
Linux 2.6.39-rc4 (2011-04-18 21:26:00 -0700)
are available in the git repository at:
git://git.pwsan.com/linux-2.6 for_tony_a_2.6.39rc
Avinash.H.M (1):
OMAP2/3: hwmod: fix gpio-reset timeouts seen
Hi Tony,
Tony Lindgren t...@atomide.com writes:
* Varadarajan, Charulatha ch...@ti.com [110418 18:00]:
From: Charulatha V ch...@ti.com
Use PM runtime framework in OMAP GPIO driver.
...
arch/arm/mach-omap2/gpio.c |6 +
arch/arm/mach-omap2/pm34xx.c | 22 +-
This series is a first pass at the #ifdef removal cleanup.
To demonstrate the type of changes needed for the cleanup, the
direction and data input/output functions are handled first. Register
offset fields are added to platform_data so #ifdefs can be removed.
Similar needs to be done for the
Register offset defines are moved to plat/gpio.h so they can be used
by SoC-specific device init code to fill out platform_data register offsets.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 103
Add register offset fields to GPIO platform_data for registers that
control direction, input and output data. Using these register
offsets in the common driver allows removal of #ifdefs and greatly
improves readability.
Signed-off-by: Kevin Hilman khil...@ti.com
---
Before we get any users of this function, fix the name (and comments)
to use loose instead of lose.
Signed-off-by: Kevin Hilman khil...@ti.com
---
Applies to v2.6.39-rc4
arch/arm/mach-omap2/powerdomain.c |6 +++---
arch/arm/mach-omap2/powerdomain.h |2 +-
2 files changed, 4
Varadarajan, Charulatha ch...@ti.com writes:
From: Charulatha V ch...@ti.com
Modify the omap_gpio_save/restore_context to support OMAP4
architecture so that the OMAP GPIO driver need not be modified
when OMAP4 off mode support is available.
Signed-off-by: Charulatha V ch...@ti.com
---
From: Vikram Pandita vikram.pand...@ti.com
By default, the DSI is not getting enabled for omap4.
OMAP2PLUS does not catch this issue since it has ARCH_OMAP3.
The issue is only seen when using defconfig with ARCH_OMAP4 only.
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
Cc: Archit Taneja
On 04/20/2011 10:57 PM, Kevin Hilman wrote:
Trinabh Guptatrin...@linux.vnet.ibm.com writes:
Cpuidle subsystem only suggests the state to enter and does not
guarantee if the suggested state is entered. The actual entered state
may be different because of software or hardware demotion.
On 4/21/2011 1:12 AM, Paul Walmsley wrote:
Hi Rajendra, Santosh,
just FYI I just observed this happening without the clockdomain patch, and
tracked this down. It seems that there is an intermittent
problem with the OMAP L3 bus code. On the 35xx BeagleBoard here, it
occasionally hangs after
On 04/20/2011 11:03 PM, Kevin Hilman wrote:
Trinabh Guptatrin...@linux.vnet.ibm.com writes:
With this patch there is single copy of cpuidle_states structure
instead of per-cpu. The statistics needed on per-cpu basis
by the governor are kept per-cpu. This simplifies the cpuidle
subsystem as
* Kevin Hilman khil...@ti.com [110421 02:56]:
Hi Tony,
Tony Lindgren t...@atomide.com writes:
* Varadarajan, Charulatha ch...@ti.com [110418 18:00]:
From: Charulatha V ch...@ti.com
Use PM runtime framework in OMAP GPIO driver.
...
arch/arm/mach-omap2/gpio.c |
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