On Thursday 01 September 2011 06:20 PM, Russell King - ARM Linux wrote:
There is no need to save and restore the context ID register on ARMv6
and ARMv7 with a temporary page table as we write the context ID
register when we switch back to the real page tables for the thread.
Moreover, the
On Thursday 01 September 2011 06:17 PM, Russell King - ARM Linux wrote:
Some systems (such as OMAP) preserve the L2 cache across a suspend/
resume cycle. This means they do not perform L2 cache maintanence
in their suspend finisher function.
However, the side effect is that the saved CPU state
Em 24-08-2011 10:25, Laurent Pinchart escreveu:
Hi Vaibhav,
On Wednesday 24 August 2011 14:19:01 Hiremath, Vaibhav wrote:
On Wednesday, August 24, 2011 5:00 PM Laurent Pinchart wrote:
On Wednesday 24 August 2011 13:21:27 Ravi, Deepthy wrote:
On Wed, Aug 24, 2011 at 4:47 PM, Laurent
