The printk in DSSDBG function definition is replaced with dynamic debug enabled
pr_debug(). The use of dynamic debugging provides more flexiblity as each debug
statement can be enabled or disabled dynamically on basis of source filename,
line number, module name etc. by writing to a control file
This series prepares the low level DISPC driver(dispc.c) to configure writeback
registers. Original series can be seen here:
http://marc.info/?l=linux-fbdevm=134753851619354w=2
Changes since v2:
- Removed patches which rename dispc_ovl_* functions to dispc_plane_*
- Revisited the scaling
This series prepares the low level DISPC driver(dispc.c) to configure writeback
registers. Original series can be seen here:
http://marc.info/?l=linux-fbdevm=134753851619354w=2
Changes since v2:
- Removed patches which rename dispc_ovl_* functions to dispc_plane_*
- Revisited the scaling
The struct omap_overlay_info passed to dispc_ovl_setup() is used to configure
DISPC registers. It shouldn't modify the overlay_info structure. The pos_y field
was being changed in dispc_ovl_setup in the case of interlaced displays. Fix
this and const qualifier to the omap_overlay_info argument.
The DISPC pipeline register names in the TRM for setting the buffer size and
the output size are a bit misleading, for example, there are different register
names for setting the buffer size for VID and GFX pipes. Things get more
confusing when considering writeback pipeline.
Rename the functions
Add position and replication as overlay caps, and pass overlay caps as an
argument to the corresponding functions. Adding position and replication to
overlay caps seems a bit unnecessary, but it allows us to use the
corresponding functions for writeback too.
These caps will be set for all
Add a new static function called dispc_ovl_setup_common(). This function is
used by
dispc_ovl_setup() to configure the overlay registers. This split is done so that
dispc_wb_setup() can reuse overlay register configuration related code.
Signed-off-by: Archit Taneja arc...@ti.com
---
Currently, the functions below take the omap_plane parameter and derive the
overlay caps within them. Pass the overlay caps as a parameter to the function
to allow these to be used by writeback too.
- dispc_ovl_set_zorder()
- dispc_ovl_set_pre_mult_alpha()
- dispc_ovl_setup_global_alpha()
-
dispc_ovl_setup_common() is to be used by both overlays and writeback. We pass
channel out to figure out what manager the overlay is connected to, to determine
the pixel clock rate. This is used to decide the scaling limitations for that
overlay.
writeback doesn't have a channel out, it has a
The scalers of overlays and writeback do not have any constraints on downscale
ratio when operating in memory to memory mode.
This is because in memory to memory mode, we aren't connected to a display which
needs data output at the rate of pixel clock. The scalers can perform as much
downscaling
In the function dispc_plane_set_scaling_uv(), create a parameter which tells if
we want to upscale or downscale the chroma plane.
Downscaling of chroma is required by writeback pipeline for converting the input
YUV444 color format to YUV422 or NV12.
Signed-off-by: Archit Taneja arc...@ti.com
---
Since writeback has many overlay like properties, and most of it's registers are
similar to that of overlays, it's possible to reuse most of the overlay related
DISPC code for writeback when considering it as a plane. Writeback was added as
a plane in the omap_plane field as OMAP_DSS_WB.
Add the
Writeback uses the WB_PICTURE_SIZE register to define the size of the content
written to memory, this is the output of the scaler. It uses the WB_SIZE
register to define the size of the content coming from the overlay/manager to
which it is connected, this is the input to the scaler. This naming
When converting YUYV444 content to YUV422 or NV12 formats through writeback
pipeline, the scaler needs to downscale the chroma plane. Ensure that chroma
is downscaled when the pipeline is writeback.
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/dispc.c |2 +-
1 file
The bit YUVCHROMARESAMPLING isn't there for writeback in DISPC_WB_ATTRIBUTES2.
It isn't there because we don't upsample chroma like for video pipelines, we
downsample chroma in writeback to get YUV422 or NV12 formats from the YUV444
input.
Ignore this bit in dispc_ovl_set_scaling_uv() if the
Writeback can take input from either one of the overlays, or one of the overlay
managers. Add an enum which represents the channel_in for writeback, and maps
to the register field programming.
Add a function to configure channel in for writeback. This will be used later in
APPLY.
Signed-off-by:
Create struct omap_dss_writeback_info, this is similar to omap_overlay_info,
the major difference is that there is no parameter which describes the input
size to writeback, this is because this is always fixed, and decided by the
connected overlay or overlay manager. One more difference is that
Configure some of the writeback specific parameters in dispc_wb_setup(). The
writeback parameters configured are:
truncation: This needs to be set if the color depth input to writeback is more
than the color depth of the color mode we want to store in memory.
writeback mode: This configures
Extend the DISPC fifo functions to also configure the writeback FIFO thresholds.
The most optimal configuration for writeback is to push out data to the
interconnect the moment writeback pushes enough pixels in the FIFO to form a
burst. This reduces the chance of writeback overflowing it's FIFO.
Add functions to enable writeback, and set/check state of GO bit. These bits are
identical in behaviour with the corresponding overlay manager bits. Configure
them in a similar way to mgr_enable() and mgr_go_* functions. Add a helper to
get the FRAMEDONE irq corresponding to writeback.
Writeback pipeline receives RGB data from one of the overlays or one of the
overlay managers. If the target color mode is YUV422 or NV12, we need to convert
the RGB pixels to YUV. The scaler in WB then converts it to the target color
mode.
Hence, the color conversion coefficients that need to be
On Tue, 2012-09-25 at 11:33 +0530, Chandrabhanu Mahapatra wrote:
The printk in DSSDBG function definition is replaced with dynamic debug
enabled
pr_debug(). The use of dynamic debugging provides more flexiblity as each
debug
statement can be enabled or disabled dynamically on basis of
Hi Tony,
[snip..]
index dbf1e03..2bc51fb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -55,22 +55,29 @@ static u32 notrace omap_32k_read_sched_clock(void)
* nsecs and adds to a monotonically increasing timespec.
*/
static struct
Hi,
On Mon, Sep 24, 2012 at 09:09:14AM -0700, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [120924 06:08]:
Hi,
On Mon, Sep 24, 2012 at 03:54:22PM +0300, Philippe De Swert wrote:
Hi,
On 24/09/2012, Felipe Balbi ba...@ti.com wrote:
SoB's mail doesn't From mail.
Well
On Tue, Sep 25, 2012 at 10:05:30AM +0200, Yegor Yefremov wrote:
How should I change the patch to make it proper? SA is broken anyway:
No it isn't. This is what it produces _today_, and has done for the last
5-10 years without modification
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP
Hi Greg,
Ping on this?
On Tue, Sep 18, 2012 at 6:10 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Greg's tty-next is not booting on 2420 based N800. The failure is
observed at serial init itself. The reason might be that n800 tries to
resume even though it is not suspended before.
From: Yegor Yefremov yegorsli...@googlemail.com
FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB
of consistent DMA memory (da8xx frame buffer driver).
Signed-off-by: Dejan Gacnik dejan.gac...@gmail.com
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
Changes:
On 25.09.2012 10:14, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 10:05:30AM +0200, Yegor Yefremov wrote:
How should I change the patch to make it proper? SA is broken anyway:
No it isn't. This is what it produces _today_, and has done for the last
5-10 years without
On Tue, Sep 25, 2012 at 01:52:03PM +0530, Poddar, Sourav wrote:
Hi Greg,
Ping on this?
On Tue, Sep 18, 2012 at 6:10 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Greg's tty-next is not booting on 2420 based N800. The failure is
observed at serial init itself. The reason might be that
On Tue, Sep 25, 2012 at 10:26:30AM +0200, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB
of consistent DMA memory (da8xx frame buffer driver).
Okay, so the patch description says This needs to
On 25.09.2012 02:37, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [120924 16:17]:
On Mon, Sep 24, 2012 at 09:05:11PM +0200, Yegor Yefremov wrote:
On Mon, Sep 24, 2012 at 7:18 PM, Tony Lindgren t...@atomide.com wrote:
* yegorsli...@googlemail.com
On Tue, Sep 25, 2012 at 09:30:29AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 01:52:03PM +0530, Poddar, Sourav wrote:
Hi Greg,
Ping on this?
On Tue, Sep 18, 2012 at 6:10 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Greg's tty-next is not booting on 2420 based
From: Yegor Yefremov yegorsli...@googlemail.com
FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB
of consistent DMA memory (da8xx frame buffer driver).
Signed-off-by: Dejan Gacnik dejan.gac...@gmail.com
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
arch/arm/Kconfig
On 25.09.2012 10:32, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 10:26:30AM +0200, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB
of consistent DMA memory (da8xx frame buffer
Hi Tony,
On 09/24/2012 08:34 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [120924 08:44]:
* Peter Ujfalusi peter.ujfal...@ti.com [120924 02:24]:
On OMAP4 the i2c1 bus is dedicated for the PMIC and audio related devices.
Manufacturers can opt to use different codec than twl6040
Hi Afzal,
On 09/25/2012 10:47 AM, Mohammed, Afzal wrote:
This is a query regarding patch,
usb: otg: add device tree support to otg library [1]
It seems there is so far no consensus on this change.
After I have posted this patch, Kishon had posted a better solution [2].
We discussed the
Hi,
On 25/09/2012, Felipe Balbi ba...@ti.com wrote:
Not a mention of CONFIG_SOC_OMAP2430 and CONFIG_SOC_OMAP3430 did not
get set (while it is not a 3430 but a 3630 I am using). Maybe
CONFIG_ARCH_OMAP3 would have been a better choice then?
that's quite f**ked up. Tony, why doesn't
On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 09:30:29AM +0100, Russell King - ARM Linux wrote:
How is this happening? I think that needs proper investigation - or if
it's had more investigation, then the results needs to be included in
the commit
On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 09:30:29AM +0100, Russell King - ARM Linux wrote:
How is this happening? I think that needs proper investigation - or if
it's
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 09:30:29AM +0100, Russell King - ARM Linux wrote:
How is this
diff --git a/drivers/video/omap2/dss/apply.c
b/drivers/video/omap2/dss/apply.c
index 6354bb8..cb86d94 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -559,7 +559,7 @@ static void dss_ovl_write_regs(struct omap_overlay *ovl)
struct mgr_priv_data
Hi,
Changes compared to previous version:
- Fixed OMAP4 support (patches 7-10)
- Dropped debugging support from this set for now
- Rebased on top of 3.6-rc5 + func-pwrst + omap4-ret code
(omap4 support easier to test with these)
- Patch #1:
* dropped clkdm_usecount_inc / clkdm_usecount_dec
This patch fixes the usecount tracking for omap3+, previously the
usecount numbers were rather bogus and were not really useful for
any purpose. Now usecount numbers track the number of really active
clients on each domain. This patch also adds support for usecount
tracking on powerdomain level
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo
mpu / core powerdomain usecounts are now statically increased
by 1 during MPU activity. This allows the domains to reflect
actual usage, and will allow the usecount to reach 0 just before
all CPUs are ready to idle. Proper powerdomain usecounts are
propageted to voltagedomain level also, and will
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when it enters off-mode. This patch
adds support for new flag 'CLKDM_NO_AUTODEP_DISABLE' which does this.
Signed-off-by: Tero Kristo
sdrc_ick doesn't have autoidle flag on HW, but is always automatically
idled. Thus mark the autoidle flag statically as true for it to reflect
hardware behavior. The clock will no longer show as active in usecount
dumps and will allow the voltdm-sleep / wakeup calls to work properly.
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set in HW supervised
mode. Now, when the usecounts reflect real values, PER domain
will be put to HWSUP sleep mode, which
If a hwmod is in HWAUTO mode, it will idle automatically and should not
be accounted for in the clkdm / pwrdm usecounts. Thus, flag modules in
such mode as autoidle during init, and ignore these in subsequent
usecount calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
dss_fck is currently being used improperly within the hwmod database
as an interface clock for DSS hwmods. This causes the dss_fck to
be enabled even if the dss powerdomain itself is idle, resulting
in wrong data within the powerdomain usecounts. Marked dss_fck as
autoidle which makes the clock to
This makes sure it is handled as autoidle type by the usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
This makes sure these clocks are ignored by the clkdm / pwrdm usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
On Tue, Sep 25, 2012 at 12:32:37PM +0300, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index ba49029..ca54aec 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1475,10 +1477,16 @@ int
Hi,
On Tue, Sep 25, 2012 at 10:21:18AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
On Tue, Sep
Hi,
On Tue, Sep 25, 2012 at 2:51 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
On Tue, 2012-09-25 at 15:00 +0530, Mahapatra, Chandrabhanu wrote:
This debug message is even less meaningful than the overlay number =).
Again, I think either keep the DSSDBGF, or print something sensible,
like entering ULPS.
I dont think it would be wise enough to update code for one
Hi,
On Mon, Sep 24, 2012 at 6:45 PM, Rob Herring robherri...@gmail.com wrote:
On 09/06/2012 09:57 AM, Kishon Vijay Abraham I wrote:
All phy related programming like enabling/disabling the clocks, powering
on/off the phy is taken care of by this driver. It is also used for OTG
related
Hi Tony,
Each pin of OMAP requires a particular power to be enabled for the pin
to function (Ball Characteristics table from data manual). Is there a
plan how this is managed with pinctrl? Currently each driver needs to
make sure the correct regulators are enabled for the pins it uses, which
is
Hi Tero,
On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote:
Hi,
Changes compared to previous version:
Did you get a chance to look at the issue I reported about autodeps?
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg72876.html
regards,
Rajendra
- Fixed OMAP4 support
On Tue, Sep 25, 2012 at 12:48:16PM +0300, Felipe Balbi wrote:
Hi,
On Tue, Sep 25, 2012 at 10:21:18AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
On Tue,
On Tue, Sep 25, 2012 at 11:29:58AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:48:16PM +0300, Felipe Balbi wrote:
Hi,
On Tue, Sep 25, 2012 at 10:21:18AM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
On Tue,
Hi,
On Tue, Sep 25, 2012 at 2:24 PM, Marc Kleine-Budde m...@pengutronix.de wrote:
Hi Afzal,
On 09/25/2012 10:47 AM, Mohammed, Afzal wrote:
This is a query regarding patch,
usb: otg: add device tree support to otg library [1]
It seems there is so far no consensus on this change.
After I
Right, let's get this thread back onto a constructive footing and try
to understand the problems here.
On Tue, Sep 25, 2012 at 03:26:06PM +0530, Poddar, Sourav wrote:
The issue was observed at serial init itself in the N800 board and the
log does not show up much.
On Tue, Sep 25, 2012 at 16:21:39, ABRAHAM, KISHON VIJAY wrote:
On Tue, Sep 25, 2012 at 2:24 PM, Marc Kleine-Budde m...@pengutronix.de
wrote:
I'm interested in to get these patches into the kernel soon. Kishon any
news on this patch?
Something like this would be required for USB support
On Tue, Sep 25, 2012 at 01:37:03PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 11:29:58AM +0100, Russell King - ARM Linux wrote:
Because you are accusing me of potentially breaking your beagleboard
for merely suggesting further investigation and a better commit message.
Where did I
On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
that's most likely, of course. But should we cause a regression to
beagleboard XM because of that ? Also, if you look into chapter 9 of the
runtime_pm documentation, starting on line 822 you'll see documentation
suggests the use of
Hi,
On Tue, Sep 25, 2012 at 12:07:03PM +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 01:37:03PM +0300, Felipe Balbi wrote:
On Tue, Sep 25, 2012 at 11:29:58AM +0100, Russell King - ARM Linux wrote:
Because you are accusing me of potentially breaking your beagleboard
for
On Tue, Sep 25, 2012 at 02:12:43PM +0300, Felipe Balbi wrote:
I don't see any aggressive attitude towards what you suggested,
actually. Mailing list archives are available to check, but the one
cursing around was always yourself and THAT deserves an apology.
Total rubbish. No apology, because
On Tue, 2012-09-25 at 15:56 +0530, Rajendra Nayak wrote:
Hi Tero,
On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote:
Hi,
Changes compared to previous version:
Did you get a chance to look at the issue I reported about autodeps?
On Tue, 2012-09-25 at 10:41 +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:32:37PM +0300, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index ba49029..ca54aec 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++
On Tuesday 25 September 2012 05:23 PM, Tero Kristo wrote:
On Tue, 2012-09-25 at 15:56 +0530, Rajendra Nayak wrote:
Hi Tero,
On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote:
Hi,
Changes compared to previous version:
Did you get a chance to look at the issue I reported about
On 19 September 2012 17:29, Felipe Balbi ba...@ti.com wrote:
this is what I mean, actually. If we remove pm_runtime_get_sync() in
exchange for pm_runtime_set_active() before pm_runtime_enable(), it
works on PandaBoard, but breaks BeagleBoard.
Perhaps it suggests that OMAP4 (PandaBoard) serial
On Mon, 2012-09-24 at 12:08 +0530, Chandrabhanu Mahapatra wrote:
In OMAP4 and OMAP5 when TILER 2D burst mode is used, a maximum of one line can
be skipped as per the respective TRMs. The MBlockStride OCP signal, which is
sum of ROWINC and image width in memory, is only 17 bits wide. In 2D mode
On Tue, 2012-09-25 at 17:53 +0530, Rajendra Nayak wrote:
On Tuesday 25 September 2012 05:23 PM, Tero Kristo wrote:
On Tue, 2012-09-25 at 15:56 +0530, Rajendra Nayak wrote:
Hi Tero,
On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote:
Hi,
Changes compared to previous version:
On Tue, 2012-09-25 at 11:49 +0530, Archit Taneja wrote:
Writeback uses the WB_PICTURE_SIZE register to define the size of the content
written to memory, this is the output of the scaler. It uses the WB_SIZE
register to define the size of the content coming from the overlay/manager to
which it
On Tue, 2012-09-25 at 11:49 +0530, Archit Taneja wrote:
Extend the DISPC fifo functions to also configure the writeback FIFO
thresholds.
The most optimal configuration for writeback is to push out data to the
interconnect the moment writeback pushes enough pixels in the FIFO to form a
* R, Sricharan r.sricha...@ti.com [120925 00:44]:
Hi Tony,
[snip..]
index dbf1e03..2bc51fb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -55,22 +55,29 @@ static u32 notrace omap_32k_read_sched_clock(void)
* nsecs and adds to a
* Yegor Yefremov yegor_s...@visionsystems.de [120925 01:47]:
On 25.09.2012 10:32, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 10:26:30AM +0200, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
FORCE_MAX_ZONEORDER of 12 is needed to allocation
* Tomi Valkeinen tomi.valkei...@ti.com [120925 03:22]:
Hi Tony,
Each pin of OMAP requires a particular power to be enabled for the pin
to function (Ball Characteristics table from data manual). Is there a
plan how this is managed with pinctrl? Currently each driver needs to
make sure the
Hi,
Changes compared to previous version:
- Added patch #1 for fixing a potential race condition within clockdomain
code
- Fixed patch #3 (old patch #2) regarding a similar race condition within
the voltagedomain code
Tested with OMAP3 beagle, OMAP4460 GP panda, OMAP4430 EMU blaze devices.
This patch fixes the usecount tracking for omap3+, previously the
usecount numbers were rather bogus and were not really useful for
any purpose. Now usecount numbers track the number of really active
clients on each domain. This patch also adds support for usecount
tracking on powerdomain level
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo
Previously the code only acquired spinlock after increasing / decreasing
the usecount value, which is wrong. This leaves a small window where
a task switch may occur between the check of the usecount and the actual
wakeup / sleep of the domain. Fixed by moving the spinlock locking before
the
sdrc_ick doesn't have autoidle flag on HW, but is always automatically
idled. Thus mark the autoidle flag statically as true for it to reflect
hardware behavior. The clock will no longer show as active in usecount
dumps and will allow the voltdm-sleep / wakeup calls to work properly.
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when it enters off-mode. This patch
adds support for new flag 'CLKDM_NO_AUTODEP_DISABLE' which does this.
Signed-off-by: Tero Kristo
mpu / core powerdomain usecounts are now statically increased
by 1 during MPU activity. This allows the domains to reflect
actual usage, and will allow the usecount to reach 0 just before
all CPUs are ready to idle. Proper powerdomain usecounts are
propageted to voltagedomain level also, and will
dss_fck is currently being used improperly within the hwmod database
as an interface clock for DSS hwmods. This causes the dss_fck to
be enabled even if the dss powerdomain itself is idle, resulting
in wrong data within the powerdomain usecounts. Marked dss_fck as
autoidle which makes the clock to
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set in HW supervised
mode. Now, when the usecounts reflect real values, PER domain
will be put to HWSUP sleep mode, which
This makes sure it is handled as autoidle type by the usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
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arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
If a hwmod is in HWAUTO mode, it will idle automatically and should not
be accounted for in the clkdm / pwrdm usecounts. Thus, flag modules in
such mode as autoidle during init, and ignore these in subsequent
usecount calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
This makes sure these clocks are ignored by the clkdm / pwrdm usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
Hi,
This set applies on top of linux-3.6-rc5 + func-pwrst code (from Jean) +
omap4 core retention set (from me) + PM usecounting changes set (from me).
Changes compared to previous version:
- Added proper OMAP4 auto-retention support (now that the PM usecount set
below supports OMAP4 also
From: Nishanth Menon n...@ti.com
Every PMIC has it's own eccentricities, For example, one of the
PMIC has MSB set to 1 for a specific function - voltage enable!
using an hardcoded value specific for TWL when copied over to
such an implementation causes the system to crash as the MSB bit
was 0 and
These are now called vddmin and vddmax, as these fields will be used
globally for selecting voltage ranges for a pmic channel, and not
only for voltage processor.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 28 ++--
These new structs will hold the sleep voltage levels (omap_vc_params)
and voltage processor min / max voltages (omap_vp_params.) Previously
these were part of the PMIC struct, but they do not really belong there,
as they are OMAP chip specific, not PMIC specific parameters. voltdm
code is also
OMAP3 VC code now uses voltage deltas + slew rates for calculating actual
ramp times for voltage changes. Previously a static value was used.
Two calculation methods are provided: i2c_timings and off_timings.
I2C timings are used during retention or off mode transition which
is initiated over I2C,
OMAP4 has two VOLTSETUP registers. One is controlling retention and
sleep voltage setup times, the other one off mode setup times. Both
of these need to be setup for stable behavior of the device.
The code setting up the new register will be added in the next
patch.
Signed-off-by: Tero Kristo
Now we select the vddmin and vddmax values based on both pmic and
voltage processor data, this allows usage of different power ICs.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vp.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git
We now use the previously defined oscillator setup / shutdown times
to calculate the register values for CLKSETUP.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vc.c | 62 ++
1 files changed, 62 insertions(+), 0 deletions(-)
This contains startup and shutdown times for the oscillator. By default
use ULONG_MAX. Oscillator setup is used for calculating and setting up
latencies for sleep modes that disable oscillator.
Based on a patch from Nishanth Menon n...@ti.com.
Signed-off-by: Tero Kristo t-kri...@ti.com
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