On 08/20/2013 08:57 PM, Sergei Shtylyov wrote:
Hello.
On 08/20/2013 06:56 PM, Roger Quadros wrote:
omap_get_control_dev() is being deprecated as it doesn't support
multiple instances. As control device is present only from OMAP4
onwards which supports DT only, we use phandles to get the
Hi Thomas,
On 08/20/2013 06:04 PM, thomas.lan...@lantiq.com wrote:
Hello Roger,
this will not work!
Roger Quadros wrote on 2013-08-20:
-struct omap_control_usb_platform_data *pdata =
-dev_get_platdata(pdev-dev);
+
+if (np) {
+
Hi,
On Tuesday 20 August 2013 07:26 PM, Laurent Pinchart wrote:
Hi Archit,
On Tuesday 20 August 2013 18:46:38 Archit Taneja wrote:
On Tuesday 20 August 2013 05:09 PM, Laurent Pinchart wrote:
snip
+static int vpdma_load_firmware(struct vpdma_data *vpdma)
+{
+ int r;
+ struct
On Friday 02 August 2013 07:06 PM, Afzal Mohammed wrote:
From: Vaibhav Bedia vaibhav.be...@ti.com
65aa94b ARM: OMAP4: clockdomain/CM code: Update supported transition modes
removed SW_SLEEP mode for clockdomains on OMAP4 class of devices. Not
having SW_SLEEP mode works fine for OMAP4/5
Kevin Olof,
Care to pull the below .dts changes directly from Benoit?
* Benoit Cousson bcous...@baylibre.com [130820 08:08]:
Hi Tony,
Please pull the following commits for OMAP Device Tree for v3.12.
Thanks,
Benoit
Kevin,
* Wei Yongjun weiyj...@gmail.com [130704 06:48]:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
In case of error, the function omap_device_alloc() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().
Looks like this is
* Afzal Mohammed af...@ti.com [130802 07:01]:
On an AM43x only config, currently default ARCH_NR_GPIO would be zero.
Default it to that supported by the SoC.
Looks like this can wait a bit until the am43x patches have been
reviewed and queued. When that's done, I suggest that Afzal
puts this
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both. Have a
way to pass this information from
Benoit,
Got this one queued up somewhere?
* Felipe Balbi ba...@ti.com [130712 08:21]:
From: Benoit Cousson benoit.cous...@linaro.org
without that hwmod data, USB3 will not in OMAP5 boards.
While at that, also fix DTS data to pass reg property,
otherwise driver won't probe.
Benoit,
Care to take a look at this too?
* Lars Poeschel la...@wh2.tu-dresden.de [130807 04:14]:
From: Lars Poeschel poesc...@lemonage.de
Following commit ff5c9059 and therefore other omap platforms using
the gpio-omap driver correct the #interrupt-cells property on am33xx
too. The omap
* Peter Ujfalusi peter.ujfal...@ti.com [130711 07:11]:
McPDM and DMIC only available on OMAP4/5 which no longer boots in legacy
mode.
The code to create the devices in legacy mode can be removed.
Thanks applying to omap-for-3.12/fixes-non-critical.
Regards,
Tony
--
To unsubscribe from this
* Ezequiel Garcia ezequiel.gar...@free-electrons.com [130820 09:49]:
On Fri, Aug 09, 2013 at 11:18:43AM +0200, Javier Martinez Canillas wrote:
On Thu, Aug 8, 2013 at 11:32 PM, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
Fix the option description to match the other TI SoCs.
Hi Tony!
On Wednesday 21 August 2013 at 09:50:16, Tony Lindgren wrote:
Benoit,
Care to take a look at this too?
Benoit already applied this with Mark Rutlands Acked-By and Javier Martinez
Canillas Reviewed-by.
Regards,
Lars
* Lars Poeschel la...@wh2.tu-dresden.de [130807 04:14]:
From:
* Zubair Lutfullah zubair.lutful...@gmail.com [130715 08:33]:
Did a grep for coordiante and replaced them all
with coordinate.
This applies to the mfd-next tree.
This should be safe to apply via the MFD tree as a non-critical
fix assuming the bootloaders are not yet using this:
Acked-by:
* Lars Poeschel poesc...@lemonage.de [130821 01:04]:
Hi Tony!
On Wednesday 21 August 2013 at 09:50:16, Tony Lindgren wrote:
Benoit,
Care to take a look at this too?
Benoit already applied this with Mark Rutlands Acked-By and Javier Martinez
Canillas Reviewed-by.
OK thanks for the
* ujhely...@gmail.com ujhely...@gmail.com [130805 03:09]:
From: Matus Ujhelyi ujhely...@gmail.com
Currently the cold reset was triggered. It happened due to oposite offsets
of cold/warm flags in PRM_RSTST and PRM_RSTCTRL registers.
Thanks applying into omap-for-v3.12/fixes-non-critical.
* Chen Baozi baoz...@gmail.com [130807 07:18]:
The denominator should be load from INCREMENTOR_DENUMERATOR_RELOAD_OFFSET
rather than INCREMENTER_NUMERATOR_OFFSET.
This is more likely a typo, since INCREMENTER_DENUMERATOR_RELOAD[23:17] is
reserved. It seems that it won't make much trouble
Paul,
Care to queue or ack this one?
* Aida Mynzhasova aida.mynzhas...@skitlab.ru [130820 01:22]:
This patch adds alwon powerdomain support for TI81XX, which is required
for stable functioning of a big number of TI81XX subsystems.
Signed-off-by: Aida Mynzhasova aida.mynzhas...@skitlab.ru
* Wei Yongjun weiyj...@gmail.com [130716 05:17]:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.
Thanks applying into omap-for-v3.12/fixes-non-critical.
Tony
Signed-off-by:
Need add type cast, or can not notice the failure. The related warning
(allmodconfig, EXTRA_CFLAGS=-W):
arch/arm/mach-omap2/gpmc.c:728:2: warning: comparison of unsigned expression
0 is always false [-Wtype-limits]
Signed-off-by: Chen Gang gang.c...@asianux.com
---
On Wednesday 21 August 2013 05:27 AM, Paul Walmsley wrote:
Hi
On Tue, 23 Jul 2013, Rajendra Nayak wrote:
With support to parse clock data from DT, move all main and optional
clock information from hwmod to DT.
We still retain clocks in hwmod for devices which do not have a DT node.
On 8/20/2013 10:03 PM, Russ Dill wrote:
On Sun, Aug 18, 2013 at 10:49 PM, Gururaja Hebbar
gururaja.heb...@ti.com wrote:
On 8/15/2013 4:04 AM, Russ Dill wrote:
On Wed, Aug 14, 2013 at 3:18 AM, Gururaja Hebbar gururaja.heb...@ti.com
wrote:
On 8/14/2013 3:50 AM, Russ Dill wrote:
Changes
Remove useless variable 'ret', the related warning:
arch/arm/mach-omap2/board-am3517crane.c:113:6: warning: unused variable ‘ret’
[-Wunused-variable]
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/arm/mach-omap2/board-am3517crane.c |2 --
1 files changed, 0 insertions(+), 2
On Friday 02 August 2013 07:06 PM, Afzal Mohammed wrote:
AM335x AM43x have most of the interconnects, IPs similar. Instead of
adding new hwmod data for AM43x, reuse AM335x hwmod data as much as
possible.
In the hwmod entries that could be reused on AM43x, major changes are
in register
ret needs to be signed for the error handling to work.
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
---
I can't compile this.
diff --git a/drivers/usb/phy/phy-omap-usb2.c b/drivers/usb/phy/phy-omap-usb2.c
index 844ab68..d266861 100644
--- a/drivers/usb/phy/phy-omap-usb2.c
+++
On Wednesday 21 August 2013 01:15 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset
* Rajendra Nayak rna...@ti.com [130821 01:54]:
On Wednesday 21 August 2013 01:15 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus
On Tue, 9 Jul 2013, Rajendra Nayak wrote:
This series adds the data files for DRA7xx devices for
PRCM, hwmod and DT. This is dependent on the core support [1]
patches for DRA7xx and leaves out the clock data since its
on its way to DT [2]
The regbit headers for prm and cm are cleaned up
On Wednesday 21 August 2013 02:25 PM, Paul Walmsley wrote:
On Tue, 9 Jul 2013, Rajendra Nayak wrote:
This series adds the data files for DRA7xx devices for
PRCM, hwmod and DT. This is dependent on the core support [1]
patches for DRA7xx and leaves out the clock data since its
on its way to
On 05/08/2013 17:26, Alexandre Belloni :
ARM Performance Monitor Units are available on the sama5d3, add the support in
the dtsi.
Tested with perf and oprofile on the sama5d31ek.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Nicolas Ferre
On Wednesday 21 August 2013 02:23 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130821 01:54]:
On Wednesday 21 August 2013 01:15 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control
Hi Tony,
On 21/08/2013 09:59, Tony Lindgren wrote:
* Lars Poeschel poesc...@lemonage.de [130821 01:04]:
Hi Tony!
On Wednesday 21 August 2013 at 09:50:16, Tony Lindgren wrote:
Benoit,
Care to take a look at this too?
Benoit already applied this with Mark Rutlands Acked-By and Javier
On 21/08/2013 09:45, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both.
On 21/08/2013 09:47, Tony Lindgren wrote:
Benoit,
Got this one queued up somewhere?
No yet. That's the only hwmod patch I have so far.
I'll put it in a branch and send you the pull-request ASAP.
Regards,
Benoit
* Felipe Balbi ba...@ti.com [130712 08:21]:
From: Benoit Cousson
On Friday 02 August 2013 07:06 PM, Afzal Mohammed wrote:
Update AM335x CLKCTRL, RSTCTRL, RSTST offsets, clockdomain ocpif clk
that differ with AM43x at runtime. This is being done so that static
initialization of these details (which are different between AM335x
and AM43x) can be removed to
On Friday 02 August 2013 07:08 PM, Afzal Mohammed wrote:
Reuse OMAP4 operations on AM43x.
Signed-off-by: Ambresh K ambr...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |8
1 file changed, 8 insertions(+)
diff --git
On Friday 02 August 2013 07:08 PM, Afzal Mohammed wrote:
Add hwmod support for IP's that are present in AM43x, but not in
AM335x. AM43x additional ones added here are,
1. synctimer
2. timer8-11
3. ehrpwm3-5
4. spi2-4
5. gpio4-5
Also AM43x pruss interconnect is different asc compared to
On Friday 02 August 2013 07:05 PM, Afzal Mohammed wrote:
Hwmod database of AM335x is reused by moving common elements to a new
array (most of AM335x IP's are present in AM43x) and keeping separate
arrays for elements that are specific only to either one of AM335x or
AM43x. And in the cases
On Wednesday 21 August 2013 02:59 PM, Benoit Cousson wrote:
On 21/08/2013 09:45, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130820 00:41]:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some
On Tue, Aug 20, 2013 at 08:32:33PM +0530, Lokesh Vutla wrote:
This patch series updates the following for the driver:
- Enable polling mode if DMA fails.
- Correct the DMA burst size.
Lokesh Vutla (2):
crypto: omap-sham: Enable Polling mode if DMA fails
crypto: omap-sham: correct dma
On Sat, Aug 17, 2013 at 09:42:21PM -0500, Joel Fernandes wrote:
Following patch series rewrites the DMA code to be cleaner and faster.
Earlier,
only a single SG was used for DMA purpose, and the SG-list passed from the
crypto layer was being copied and DMA'd one entry at a time. This turns
On Wed, Aug 21, 2013 at 10:51:16AM +0530, Lokesh Vutla wrote:
Hi Olof,
On Tuesday 20 August 2013 11:37 PM, Olof Johansson wrote:
The newly added omap4 support in the driver was added without
consideration for building older configs. When building omap1_defconfig,
it resulted in:
+ Kishon and Roger
Ok, so in fact that's a complete series now.
[v2,1/5] arm: omap5: dts: fix reg property size
[v2,2/5] arm: omap5: dts: fix ocp2scp DTS data
[v2,3/5] arm: omap5: dts: add palmas-usb node
[v2,4/5] arm: omap5: hwmod: add missing ocp2scp hwmod data
[v2,5/5] arm:
* Rajendra Nayak rna...@ti.com [130821 02:29]:
On Wednesday 21 August 2013 02:23 PM, Tony Lindgren wrote:
Or you could also have various bus specific bindings for the ocp
with lists of phandles?
ocp {
reg = ...;
interrupts = ...;
ti,reset-on-init = module1, module2;
On Wednesday 21 August 2013 05:53 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130821 02:29]:
On Wednesday 21 August 2013 02:23 PM, Tony Lindgren wrote:
Or you could also have various bus specific bindings for the ocp
with lists of phandles?
ocp {
reg = ...;
interrupts
Hi Mark,
On Tuesday 20 August 2013 06:55 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
So, If I understand this right we would have the dt entries
something like,
omap4.dtsi
--
ocp {
reg = ...;
interrupts = ...;
ti,no-reset-on-init = emif1, emif2, gpmc;
...
};
omap4-panda-es.dts
--
ocp {
This would actually be
ocp {
* Rajendra Nayak rna...@ti.com [130821 05:46]:
On Wednesday 21 August 2013 05:53 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130821 02:29]:
On Wednesday 21 August 2013 02:23 PM, Tony Lindgren wrote:
Or you could also have various bus specific bindings for the ocp
with lists
On Wed, Aug 21, 2013 at 06:13:51PM +0530, Sourav Poddar wrote:
On Tuesday 20 August 2013 06:55 PM, Sourav Poddar wrote:
Can these patch be picked for v3.12?
Please allow a reasonable amount of time for review, 24 hours is very
short.
signature.asc
Description: Digital signature
* Felipe Balbi ba...@ti.com [130716 05:57]:
DWC3 enables USB3 functionality for OMAP5 boards,
it's safe to enable those drivers in omap2plus_defconfig.
Signed-off-by: Felipe Balbi ba...@ti.com
Looks like Benoit will take this, so:
Acked-by: Tony Lindgren t...@atomide.com
---
* Benoit Cousson bcous...@baylibre.com [130821 05:18]:
+ Kishon and Roger
Ok, so in fact that's a complete series now.
[v2,1/5] arm: omap5: dts: fix reg property size
[v2,2/5] arm: omap5: dts: fix ocp2scp DTS data
[v2,3/5] arm: omap5: dts: add palmas-usb node
[v2,4/5] arm: omap5: hwmod:
Hi Stephen,
On 8/20/2013 10:23 PM, Stephen Warren wrote:
ID pins are connected to pcf8575, and the pcf8575's interrupt line is
inturn connected to
gpio bank6 pin 11, we use this gpio interrupt to detect the ID pin change.
In that case, the PCF8575 node needs to be a GPIO controller and an IRQ
On Tue, 2013-08-20 at 18:01 +0100, Pawel Moll wrote:
On Tue, 2013-08-20 at 16:06 +0100, Pawel Moll wrote:
On Tue, 2013-08-20 at 16:01 +0100, Kumar Gala wrote:
On Aug 20, 2013, at 9:54 AM, Ivan T. Ivanov wrote:
Hi,
On Tue, 2013-08-20 at 09:33 -0500, Felipe Balbi wrote:
On 21/08/2013 14:51, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130821 05:46]:
On Wednesday 21 August 2013 05:53 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130821 02:29]:
On Wednesday 21 August 2013 02:23 PM, Tony Lindgren wrote:
Or you could also have various bus
From: Ivan T. Ivanov iiva...@mm-sol.com
Hi,
Here is fifth version of MSM USB3 drivers patches.
Changes since v4:
* Substitute references to wc3 with just dw in USB PHY drivers and
file names. This is to indicate that the PHY's are DesignWare, but
not necessarily related to DWC3 IP core.
Hi Paul,
On 21/08/2013 02:13, Paul Walmsley wrote:
Hi Benoît,
On Wed, 17 Jul 2013, Mark A. Greer wrote:
From: Mark A. Greer mgr...@animalcreek.com
Long overdue patches to add the device tree updates and
documentation for the SHAM and AES modules on the am33xx.
The supporting code is already
From: Ivan T. Ivanov iiva...@mm-sol.com
MSM USB3.0 core wrapper consist of USB3.0 IP from Synopsys
(SNPS) and HS, SS PHY's control and configuration registers.
It could operate in device mode (SS, HS, FS) and host
mode (SS, HS, FS, LS).
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
From: Ivan T. Ivanov iiva...@mm-sol.com
These drivers handles control and configuration of the HS
and SS USB PHY transceivers. They are part of the driver
which manage Synopsys DesignWare USB3 controller stack
inside Qualcomm SoC's.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
From: Ivan T. Ivanov iiva...@mm-sol.com
DWC3 glue layer is hardware layer around Synopsys DesignWare
USB3 core. Its purpose is to supply Synopsys IP with required
clocks, voltages and interface it with the rest of the SoC.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
Hi Mark,
In fact I cannot even apply these patches since they are referring the
the edma controller node that does not seem to be there in 3.11-rc6.
Is this EDMA series supposed to be merged for 3.12? If this is the case,
where can I find a reference GIT for it?
Thanks,
Benoit
On
I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
that it is much cleaner to have this in the core. This also removes a
circular dependency between the helpers and the core, and so we can
finally register child nodes in the core instead of doing this manually
in each driver.
From: Felipe Balbi ba...@ti.com
USB3 block has a 64KiB space, another 64KiB is
used for the wrapper.
Without this change, resource_size() will get
confused and driver won't probe because size
will be negative.
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Kishon Vijay Abraham I
From: Benoit Cousson bcous...@baylibre.com
without that hwmod data, USB3 will not in OMAP5 boards.
Signed-off-by: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c |
From: Felipe Balbi ba...@ti.com
Without this node, there will be no palmas
driver to notify dwc3 that a cable has
been connected and, without that, dwc3
will never initialize.
[ kis...@ti.com: added dt properties for enabling vbus/id interrupts and fixed
vbus-supply value after SMPS10 is modeled
From: Felipe Balbi ba...@ti.com
DWC3 enables USB3 functionality for OMAP5 boards,
it's safe to enable those drivers in omap2plus_defconfig.
Signed-off-by: Felipe Balbi ba...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
From: Felipe Balbi ba...@ti.com
With these patches (plus a few others on the driver side which
will be going upstream soon) I could get functional USB3 with my
omap5-uevm platform.
Changes since v2:
- added dt properties for enabling vbus/id interrupts and fixed
vbus-supply value after
From: Felipe Balbi ba...@ti.com
this patch fixes the DTS data for ocp2scp
node by adding the missing reg property.
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |3 ++-
1 file changed, 2 insertions(+), 1
On 08/21/2013 03:47 PM, Wolfram Sang wrote:
I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
that it is much cleaner to have this in the core. This also removes a
circular dependency between the helpers and the core, and so we can
finally register child nodes in the core
Hi Kishon,
On 21/08/2013 16:31, Kishon Vijay Abraham I wrote:
From: Felipe Balbi ba...@ti.com
With these patches (plus a few others on the driver side which
will be going upstream soon) I could get functional USB3 with my
omap5-uevm platform.
Changes since v2:
- added dt properties
Hi Kevin Olof,
I've just updated the branch with the few USB3 patches I missed from Felipe.
So here is a new pull-request.
Thanks,
Benoit
Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900
Hey,
We've been trying to get booting with a detached DTB working in Fedora
rawhide for a while, with no luck, the kernel keeps hanging after
Starting kernel ... with no output.
I've suspected there might be a config issue, as omap2_defconfig
works alright, as does booting a uImage with an
On 08/20/2013 01:00 AM, Mike Turquette wrote:
Quoting Tero Kristo (2013-08-19 10:06:39)
On 08/19/2013 07:24 PM, Mark Rutland wrote:
On Mon, Aug 19, 2013 at 04:09:37PM +0100, Tero Kristo wrote:
On 08/19/2013 05:18 PM, Mark Rutland wrote:
On Mon, Aug 19, 2013 at 02:34:45PM +0100, Tero Kristo
On Wednesday 21 August 2013 12:22 AM, Hein Tibosch wrote:
Hi,
[ added some people from TI ]
On 8/7/2013 6:05 PM, majianpeng wrote:
V2:
clean up code.
V1:
www.mail-archive.com/linux-omap@vger.../msg93239.html
We found a problem when we removed a working sd card that the
On 08/21/2013 07:06 AM, George Cherian wrote:
Hi Stephen,
On 8/20/2013 10:23 PM, Stephen Warren wrote:
ID pins are connected to pcf8575, and the pcf8575's interrupt line is
inturn connected to
gpio bank6 pin 11, we use this gpio interrupt to detect the ID pin
change.
In that case, the
Paul,
On 08/20/2013 06:39 PM, Paul Walmsley wrote:
Hi
a few comments
On Wed, 14 Aug 2013, Suman Anna wrote:
The remoteproc infrastructure is currently tied closely with the
virtio/rpmsg framework, and the boot requires that there are virtio
devices present in the resource table from
On Wed, Aug 21, 2013 at 11:43:21AM -0400, Kyle McMartin wrote:
I've suspected there might be a config issue, as omap2_defconfig
works alright, as does booting a uImage with an appended
omap4-panda.dtb, but there's no love with a zImage + initrd + dtb
(or even just zImage without initrd + dtb.)
On Wed, Aug 21, 2013 at 03:41:06PM +0200, Benoit Cousson wrote:
Hi Mark,
Hi Benoit.
In fact I cannot even apply these patches since they are referring
the the edma controller node that does not seem to be there in
3.11-rc6.
I just applied them on top of k.o fd3930f (proc: more readdir
On Wed, Aug 21, 2013 at 03:31:11PM +0200, Benoit Cousson wrote:
Mark,
After a quick search on Google, I did not see any comment on these
patches. Did you get any review so far?
Some people reviewed v1. The entire thread starts here:
Hi Tomi,
I'm back from holidays and have finally found time to review your patch set.
On Friday 09 August 2013 11:38:45 Tomi Valkeinen wrote:
Hi,
This is an RFC for OMAP Display DT support. The patches work fine, at least
for me, but they are not perfect. I mostly don't have any clear
On Thu, Aug 15, 2013 at 11:14 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Thursday 15 August 2013 04:51 PM, Linus Walleij wrote:
(...)
Sorry I don't understand what thread that is... can you point me there?
My previous statement on this issue what this:
On Tue, Aug 20, 2013 at 12:04 AM, Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
On Wednesday 31 July 2013 01:44:53 Linus Walleij wrote:
I don't see how sharing works here, or how another user, i.e. another one
than the user wanting to recieve the IRQ, can validly request such a
Trinity found this error on OMAP4430SDP using 3.11-rc4:
WARNING: CPU: 1 PID: 3395 at
/home/rmk/git/linux-rmk/drivers/video/omap2/dss/manager-sysfs.c:290
manager_alpha_blending_enabled_show+0x3c/0x60()
Modules linked in:
CPU: 1 PID: 3395 Comm: trinity-child1 Not tainted 3.11.0-rc4+ #487
Hi,
On Wed, Aug 21, 2013 at 03:41:43PM -0400, Kyle McMartin wrote:
On Wed, Aug 21, 2013 at 11:43:21AM -0400, Kyle McMartin wrote:
I've suspected there might be a config issue, as omap2_defconfig
works alright, as does booting a uImage with an appended
omap4-panda.dtb, but there's no love
Hi Benoit,
On Wednesday 21 August 2013 07:11 PM, Benoit Cousson wrote:
Hi Mark,
In fact I cannot even apply these patches since they are referring the the
edma controller node that does not seem to be there in 3.11-rc6.
Is this EDMA series supposed to be merged for 3.12? If this is the
On Sun, Jul 14, 2013 at 02:24:48AM +0530, Pekon Gupta wrote:
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes,
selectable via DTB.
On 8/21/2013 11:05 PM, Stephen Warren wrote:
On 08/21/2013 07:06 AM, George Cherian wrote:
Hi Stephen,
On 8/20/2013 10:23 PM, Stephen Warren wrote:
ID pins are connected to pcf8575, and the pcf8575's interrupt line is
inturn connected to
gpio bank6 pin 11, we use this gpio interrupt to detect
On Fri, Aug 02, 2013 at 10:00:00AM +0800, Richard Zhao wrote:
pass of_phandle_args dma_spec to dma_request_channel in of_dma_simple_xlate,
so the filter function could access of_node in of_phandle_args.
It also remove restriction of #dma-cells has to be one.
Signed-off-by: Richard Zhao
The Palmas device contains only a USB VID detector, so added a
compatible type *ti,palmas-usb-vid*. Didn't remove the existing compatible
types for backward compatibility.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Changes from [1]:
* Since the old compatible values will be in 3.11
On Tue, Aug 20, 2013 at 05:32:32AM -0700, Tony Lindgren wrote:
* Olof Johansson o...@lixom.net [130816 15:05]:
Our current fixes branch is based on -rc4, and I didn't see any of
these commits in linux-next, so I took the liberty to rebase them back
onto our current branch.
I.e.
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