On 30/04/14 02:52, Tony Lindgren wrote:
We can pass the GPIO configuration for ls037v7dw01 in a standard
gpios property.
Signed-off-by: Tony Lindgren t...@atomide.com
---
.../bindings/panel/sharp,ls037v7dw01.txt | 53 ++
Tony,
On 04/23/2014 08:36 PM, Roger Quadros wrote:
From: Balaji T K balaj...@ti.com
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
[Roger Q] Clean up.
CC: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros
On 30/04/14 02:52, Tony Lindgren wrote:
Using gpiod will make it easier to add device tree support
for this panel in the following patches.
Note that all the GPIOs for this panel are optional, any
of the the GPIOs could be configured with external pulls
instead of GPIOs, so let's not error
Hi,
On Tuesday 06 May 2014 07:14 PM, Marek Vasut wrote:
On Tuesday, May 06, 2014 at 03:33:51 PM, Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
[...]
+#define to_dra7xx_pcie(x)
Hi,
On Tuesday 06 May 2014 07:24 PM, Arnd Bergmann wrote:
On Tuesday 06 May 2014 19:03:51 Kishon Vijay Abraham I wrote:
Added support for pcie controller in dra7xx. This driver re-uses
the designware core code that is already present in kernel.
Cc: Bjorn Helgaas bhelg...@google.com
Cc:
Tony,
This patch will need to be updated for IRQ crossbar changes.
I will send a revised version of just this patch based on crossbar changes [1]
[1] - http://article.gmane.org/gmane.linux.documentation/23293
cheers,
-roger
On 05/05/2014 12:54 PM, Roger Quadros wrote:
Add nodes for the Super
+static struct charger_cable cable_list[] = {
+ {
+.psy_cable_type = PSY_CHARGER_CABLE_TYPE_USB_SDP,
+},
+ {
+.psy_cable_type = PSY_CHARGER_CABLE_TYPE_USB_CDP,
+},
+ {
+.psy_cable_type = PSY_CHARGER_CABLE_TYPE_USB_DCP,
+},
+ {
+
On 24/04/14 15:28, Peter Griffin wrote:
From: Arnd Bergmann a...@arndb.de
The omap lcdc driver has an elaborate mmap_kern function
to map the frame buffer into kernel address space as
write-combined. This uses functions that are only available
on MMU-enabled builds.
It does seem
Hi,
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+compatible = ti,dra7xx-pcie;
+reg = 0x51002000 0x14c, 0x5100 0x2000;
+reg-names = ti_conf, rc_dbics;
+
On Wednesday 07 May 2014 14:52:47 Kishon Vijay Abraham I wrote:
On Tuesday 06 May 2014 10:05 PM, Jason Gunthorpe wrote:
On Tue, May 06, 2014 at 07:03:51PM +0530, Kishon Vijay Abraham I wrote:
+Example:
+pcie@5100 {
+compatible = ti,dra7xx-pcie;
+reg = 0x51002000 0x14c,
Add CPSW ethernet support for AM437x GP EVM which has one slave pinned out
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 72 +
1 file changed, 72 insertions(+)
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts
On Wednesday 07 May 2014 14:14:55 Kishon Vijay Abraham I wrote:
+static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
+{
+struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
+
+dra7xx_pcie_writel(dra7xx-base, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,
+
A delayed status request may be queued before composite framework returns
USB_GADGET_DELAYED_STATUS, because the thread queueing the request can run
on a different core in parallel with the control request irq.
SETUP XferComplete IRQ fsg_main_thread
--
On 06/05/14 06:15, Andrew LeCain wrote:
Hi,
I'm trying to backport a display driver for an RFBI panel to 2.6.32, but
the dss_pwrdm is complaining about not entering target state:
That is probably some custom kernel, as mainline 2.6.32 didn't even have
omapdss driver.
root@02AA01AB381207S7#
Hi,
Changes since v1:
- ATL binding documentation and driver has been separated.
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors between two reference clocks (BWS, AWS) and
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors between two reference clocks (BWS, AWS) and generate a
modulated
clock output which averages to some desired frequency.
In
Modify the clock nodes for the ATL clocks to use the ATL clock driver to
handle them.
Add the ATL device node at the same time for DRA7.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
arch/arm/boot/dts/dra7xx-clocks.dtsi | 16
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors between two reference clocks (BWS, AWS) and generate a
modulated
clock output which averages to some desired frequency.
In
To allign the name with the other atl clock names:
atlclkin3_ck - atl_clkin3_ck
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 22 +++---
drivers/clk/ti/clk-7xx.c | 2 +-
2 files changed, 12 insertions(+), 12
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Use IRQ crossbar for interrupts.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
From: Balaji T K balaj...@ti.com
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
[Roger Q] Clean up. Updated IRQ for interrupt crossbar.
CC: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
On 05/06/2014 04:56 PM, Sricharan R wrote:
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
Signed-off-by: Sricharan R r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar
Hi!
+#define PSY_MAX_CV(psy) \
+ psy_get_ps_int_property(psy,\
+ POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX)
+#define PSY_VOLTAGE_NOW(psy) \
+ psy_get_ps_int_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW)
+#define PSY_VOLTAGE_OCV(psy) \
+
Sricharan R r.sricha...@ti.com wrote on Wed [2014-May-07 17:46:36 +0530]:
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to
On Wed, 7 May 2014, Zhuang Jin Can wrote:
A delayed status request may be queued before composite framework returns
USB_GADGET_DELAYED_STATUS, because the thread queueing the request can run
on a different core in parallel with the control request irq.
SETUP XferComplete IRQ
* Tomi Valkeinen tomi.valkei...@ti.com [140507 01:13]:
On 30/04/14 02:52, Tony Lindgren wrote:
We can pass the GPIO configuration for ls037v7dw01 in a standard
gpios property.
Signed-off-by: Tony Lindgren t...@atomide.com
---
.../bindings/panel/sharp,ls037v7dw01.txt | 53
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If OMAP1 is
ever migrated to clock framework, the correct way to do this would be through
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems right
to me.
Tony
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file changed, 4 deletions(-)
diff --git
* Joel Fernandes jo...@ti.com [140424 14:44]:
Inorder to move non-DM timer specific code that modifies the idlect
mask on OMAP1, from dmtimer code, to OMAP1 specific timer initialization code,
we introduce a new function that can possibly be reused for other purposes in
the future. The
Tony,
On 05/07/2014 09:56 AM, Darren Etheridge wrote:
Sricharan R r.sricha...@ti.com wrote on Wed [2014-May-07 17:46:36 +0530]:
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the
On 07/05/14 18:03, Tony Lindgren wrote:
+ lcd0: display {
+ compatible = sharp,ls037v7dw01;
+ power-supply = lcd_3v3;
+ reset-gpios = gpio5 27 GPIO_ACTIVE_HIGH; /* gpio155, lcd
RESB */
+ enable-gpios = gpio5 26 GPIO_ACTIVE_HIGH /* gpio154,
* Tony Lindgren t...@atomide.com [140423 13:49]:
* Tero Kristo t-kri...@ti.com [140423 00:51]:
On 04/12/2014 06:02 PM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [140412 02:01]:
On 04/11/2014 02:47 AM, Tony Lindgren wrote:
@@ -282,6 +283,7 @@ void omap_sram_idle(void)
* Tony Lindgren t...@atomide.com [140411 08:18]:
* Tony Lindgren t...@atomide.com [140410 16:52]:
And here we're missing a write to clksetup, without that the off idle
timings are not correct.. Below is an incremental diff on top of this
patch.
Here's this one updated to the changes made in
On Wed, May 07, 2014 at 11:03:42AM -0400, Alan Stern wrote:
On Wed, 7 May 2014, Zhuang Jin Can wrote:
A delayed status request may be queued before composite framework returns
USB_GADGET_DELAYED_STATUS, because the thread queueing the request can run
on a different core in parallel with
On Thu, 8 May 2014, Zhuang Jin Can wrote:
A similar problem can occur in the opposite sense: The thread queuing
the delayed status request might be delayed for so long that another
SETUP packet arrives from the host first. In that case, the delayed
status request is a response for a
* Tomi Valkeinen tomi.valkei...@ti.com [140507 09:03]:
On 07/05/14 18:03, Tony Lindgren wrote:
+ lcd0: display {
+ compatible = sharp,ls037v7dw01;
+ power-supply = lcd_3v3;
+ reset-gpios = gpio5 27 GPIO_ACTIVE_HIGH; /* gpio155, lcd
RESB */
+
From: Tony Lindgren [mailto:t...@atomide.com]
* Pekon Gupta pe...@ti.com [140422 00:34]:
+gpmc {
+status = okay;
+pinctrl-names = default;
+pinctrl-0 = nand_flash_x8;
+ranges = 0 0 0x0800 0x1000; /* CS0: NAND */
Please use the minimum size 16MB GPMC range here, NAND
On Wed, May 7, 2014 at 3:16 AM, Tomi Valkeinen tomi.valkei...@ti.com wrote:
That is probably some custom kernel, as mainline 2.6.32 didn't even have
omapdss driver.
My mistake-- I'm now working on 2.6.37, where I am also experiencing
the issue. Another point that may be relevant is that I have
* Gupta, Pekon pe...@ti.com [140507 12:20]:
From: Tony Lindgren [mailto:t...@atomide.com]
* Pekon Gupta pe...@ti.com [140422 00:34]:
+gpmc {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = nand_flash_x8;
+ ranges = 0 0 0x0800 0x1000; /* CS0: NAND */
Please
On 05/07/2014 10:19 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If OMAP1 is
ever migrated to clock framework, the
On 05/07/2014 10:20 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems right
to me.
Can you elaborate a bit more please on
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file
On 05/07/2014 10:25 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
Inorder to move non-DM timer specific code that modifies the idlect
mask on OMAP1, from dmtimer code, to OMAP1 specific timer initialization
code,
we introduce a new function that can possibly be
* Joel Fernandes jo...@ti.com [140507 14:44]:
On 05/07/2014 10:19 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If
* Joel Fernandes jo...@ti.com [140507 14:49]:
On 05/07/2014 10:20 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems
On 05/07/2014 05:04 PM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140507 14:44]:
On 05/07/2014 10:19 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set
* Joel Fernandes jo...@ti.com [140507 14:53]:
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let
it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
On 05/07/2014 10:20 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems right
to me.
Ok, I've no issues dropping this
On 05/07/2014 05:10 PM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140507 14:53]:
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let
it
be checked there.
* Joel Fernandes jo...@ti.com [140507 15:15]:
On 05/07/2014 05:10 PM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140507 14:53]:
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print
(+ Matt Porter, Joel Fernandes)
Hi Wolfram,
On Thu, 17 Apr 2014, Wolfram Sang wrote:
thanks for the reply!
Always good to hear from you -
If omap_device_alloc is given 2 or more struct omap_hwmod it will try
to register the 'main_clk' of each of them with the same alias - fck -
Hi Lokesh
On Mon, 14 Apr 2014, Lokesh Vutla wrote:
On Friday 11 April 2014 11:39 PM, Paul Walmsley wrote:
On Fri, 11 Apr 2014, Paul Walmsley wrote:
On Wed, 9 Apr 2014, Lokesh Vutla wrote:
During boot, when hwmod tries to cut clocks for debugss it always
gets stuck in transition
Hi Rajendra,
On Wed, 23 Apr 2014, Rajendra Nayak wrote:
The patches fix some opt clock handling in gpio and in
hwmod.
Rajendra Nayak (2):
gpio: omap: prepare and unprepare the debounce clock
ARM: OMAP2+: hwmod: Don't leave the optional clocks in
clk_prepare()ed state
Hi Péter,
On Wed, 30 Apr 2014, Peter Ujfalusi wrote:
Add HWMOD_SWSUP_SIDLE to flags.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
This patch could use a better changelog. It would be ideal to understand
_why_ HWMOD_SWSUP_SIDLE is needed. Is there a known hardware bug? Or is
this
Hi
On Wed, 16 Apr 2014, Archit Taneja wrote:
The control module isn't actually a clock management module, but there are a
few
register bits which perform gating and muxing of clocks.
Add CTRL_MODULE_CORE sub block as a clock provider for DRA7. The control
module
has 2 sub modules:
On Wed, May 07, 2014 at 12:59:06PM -0400, Alan Stern wrote:
On Thu, 8 May 2014, Zhuang Jin Can wrote:
A similar problem can occur in the opposite sense: The thread queuing
the delayed status request might be delayed for so long that another
SETUP packet arrives from the host first. In
Here are some basic OMAP test results for Linux v3.15-rc4.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.15-rc4/20140505112251/
Test summary
Build: uImage+dtb:
Pass ( 9/ 9): omap2plus_defconfig_am33xx_only/am335x-bone,
Hi,
On Wed, 12 Mar 2014, Tomi Valkeinen wrote:
This patch adds hwmod data for omap5 display subsystem. I have tested this on
omap5-uevm with a DSI panel. I cannot test omap5-uevm's hdmi output yet, as
the
mainline is missing omap5 HDMI driver.
I do see this when booting:
omap_hwmod:
Hi Paul,
On Thursday 08 May 2014 10:07 AM, Paul Walmsley wrote:
Hi,
On Wed, 12 Mar 2014, Tomi Valkeinen wrote:
This patch adds hwmod data for omap5 display subsystem. I have tested this on
omap5-uevm with a DSI panel. I cannot test omap5-uevm's hdmi output yet, as the
mainline is missing
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