Cortex-A8 errata doc states in its workaround for erratum 430973:
By default, the BTB Invalidate instruction is treated as a NOP on Cortex-A8.
However, it is possible to enable the BTB Invalidate instruction such that it
actually does a full invalidate of the BTB by setting the IBE bit (bit 6)
On 5.04.2015 19:50, Matthijs van Duin wrote:
On 5 April 2015 at 09:23, Ivaylo Dimitrov ivo.g.dimitrov...@gmail.com wrote:
Though I wonder why SMC is needed to write ACR on non-HS devices. A simple
MRC should suffice, unless I miss something.
Public-world access to ACR varies per bit:
bit 1
On Friday 03 April 2015 10:42 PM, Russell King wrote:
clk_add_alias() is provided by clkdev, and is not part of the clk API.
Howver, it is prototyped in two locations: linux/clkdev.h and
linux/clk.h. This is a mess. Get rid of the redundant and unnecessary
version in linux/clk.h.
On Fri, Apr 03, 2015 at 02:21:48PM -0500, Robert Nelson wrote:
And yes, for armhf userland one gets random oopses at least on the
Nokia N900. AFAIK this is not true for all ARMv7 processors
(especially non omaps), though.
http://www.spinics.net/lists/linux-omap/msg108511.html
See
Hi,
On Sun, Apr 05, 2015 at 03:26:14PM +0200, Pali Rohár wrote:
Yes so it seems, and the bootloaders should really set it.
It's also disabled for multiplatform builds.
These are now done in u-boot as of: v2015.04-rc4
On Sun, Apr 05, 2015 at 11:04:56AM +0200, Geert Uytterhoeven wrote:
Hi Russell,
On Fri, Apr 3, 2015 at 7:11 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
Sorry for posting this soo close to the 4.1 merge window, I had
completely forgotten about this chunk of work I did
On Sat, Apr 04, 2015 at 12:44:35AM +0300, Laurent Pinchart wrote:
Hi Russell,
Thank you for the patch;
On Friday 03 April 2015 18:12:58 Russell King wrote:
No merged platform supplies xclks via platform data. As we want to
slightly change the clkdev interface, rather than fixing this
From: Julia Lawall julia.law...@lip6.fr
It was forgotten to initialize ret to the result of calling
snd_soc_dai_set_sysclk, unlike at the other calls in the same function.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// smpl
(
Please ignore. Wrong patch set.
On Sun, 5 Apr 2015, Julia Lawall wrote:
From: Julia Lawall julia.law...@lip6.fr
It was forgotten to initialize ret to the result of calling
snd_soc_dai_set_sysclk, unlike at the other calls in the same function.
A simplified version of the semantic match
On Sunday 05 April 2015 15:00:45 Sebastian Reichel wrote:
On Fri, Apr 03, 2015 at 02:21:48PM -0500, Robert Nelson wrote:
And yes, for armhf userland one gets random oopses at
least on the Nokia N900. AFAIK this is not true for all
ARMv7 processors (especially non omaps), though.
Hi,
On Sun, Apr 05, 2015 at 06:13:47AM +0200, Matthijs van Duin wrote:
On 4 April 2015 at 00:52, Tony Lindgren t...@atomide.com wrote:
Right, it affects n900 for sure. My point is that it also seems to
affect 37xx versions not listed to suffer from this issue.
They shouldn't... erratum
On Sunday 05 April 2015 15:45:28 Sebastian Reichel wrote:
Hi,
On Sun, Apr 05, 2015 at 03:26:14PM +0200, Pali Rohár wrote:
Yes so it seems, and the bootloaders should really set
it. It's also disabled for multiplatform builds.
These are now done in u-boot as of: v2015.04-rc4
On 5.04.2015 07:13, Matthijs van Duin wrote:
I would actually suggest clearing IBE if it set on Cortex-A8 r2 or
later processors and a secure monitor call is available to do so
(there is on the DM814x and AM335x, dunno about the 37xx), also for
performance reasons: BTB invalidates are quite
Hi Russell,
On Fri, Apr 3, 2015 at 7:11 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
Sorry for posting this soo close to the 4.1 merge window, I had
completely forgotten about this chunk of work I did earlier this
month.
The per-user struct clk patches rather badly broke clkdev
On 5 April 2015 at 18:50, Matthijs van Duin matthijsvand...@gmail.com wrote:
MRC
I mean MCR of course
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On 5 April 2015 at 09:23, Ivaylo Dimitrov ivo.g.dimitrov...@gmail.com wrote:
Though I wonder why SMC is needed to write ACR on non-HS devices. A simple
MRC should suffice, unless I miss something.
Public-world access to ACR varies per bit:
bit 1 (L2EN) is documented as banked, but at least on
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