Add qspi memory mapped region entries for AM43xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index
Set use_mmap_read flag to true, to indicate to spi-master that the
spi-message is from mtd layer. This helps spi-master to do memory
mapped reads over SPI flash memories, when hardware support is
available.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mtd/devices/m25p80.c | 3 +++
1 file
Hello Igor,
Am Dienstag, den 28.07.2015, 11:29 +0300 schrieb Igor Grinberg:
Hi Matt,
On 07/27/15 17:34, Matt Porter wrote:
On Thu, Jul 16, 2015 at 10:30:48AM +0200, Teresa Remmet wrote:
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to
On 28/07/15 00:20, Dmitry Torokhov wrote:
On Mon, Jul 27, 2015 at 04:49:22PM +0530, Vignesh R wrote:
On 07/27/2015 04:19 PM, Roger Quadros wrote:
Hi,
On 23/07/15 17:54, Vignesh R wrote:
On am437x-gp-evm, pixcir touchscreen can wake the system from low power
state by generating wake-up
This patch series adds support for memory mapped reads for TI QSPI
driver.
TI QSPI controller has memory mapped port (SFI translator interface [1])
through which SPI flash memories can be read using memcpy call. SFI
translator takes care of generating appropriate SPI signals to read data
from
Hi Matt,
On 07/27/15 17:34, Matt Porter wrote:
On Thu, Jul 16, 2015 at 10:30:48AM +0200, Teresa Remmet wrote:
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index
TI QSPI controller has memory mapped port through which SPI flash
memories can be read using memcpy call. This patch adds support for
memory mapped read based on use_mmap_read flag.
When use_mmap_read flag is set, the controller is switched to memory
mapped interface by writing to
On Saturday 25 July 2015 10:55:50 Pali Rohár wrote:
On Wednesday 22 July 2015 04:03:07 Sebastian Reichel wrote:
Hi,
On Tue, Jul 21, 2015 at 07:17:41PM -0500, Michael Welling wrote:
On Tue, Jul 21, 2015 at 11:34:41AM +0200, Pavel Machek wrote:
This code has my head spinning.
On Mon, 27 Jul 2015, Roger Quadros wrote:
Hi,
On 16/07/15 16:16, Roger Quadros wrote:
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
This
gpio2_8 is connected to the PCIe_RESETn line and it has to be driven low
in order to reset the PCIe cards. So added gpios property to pcie
dt node.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/am57xx-beagle-x15.dts |5 +
arch/arm/boot/dts/dra7.dtsi
This series adds PM support to pci-dra7xx so that PCI clocks can be disabled
during suspend and enabled back during resume without affecting
PCI functionality.
Changes from v3:
*) Fix compilation errors when individual patches are applied
Changes from v2:
*) Used SET_SYSTEM_SLEEP_PM_OPS and
DRA7xx require MSE bit to be cleared to set the master in
standby mode. (In DRA7xx TRM_vE, section 24.9.4.5.2.2.1 PCIe
Controller Master Standby Behavior advises to use the clearing
of the local MSE bit to set the master in standby. Without this
some of the clocks do not idle).
Cleared the MSE
On 28/07/15 16:15, Paul Walmsley wrote:
On Mon, 27 Jul 2015, Roger Quadros wrote:
Hi,
On 16/07/15 16:16, Roger Quadros wrote:
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules
This series fixes PCIe card enumeration issue in am57xx-evm.
In the case of am57xx-evm, the PERST# line is connected to a gpio line
and this has to be driven low in order to perform a fundamental reset
of the card. If the gpio line is driven high, there is no way the card
can come out of reset.
Fix the error handling code in case pm_runtime_get_sync fails. Now
when pm_runtime_get_sync fails pm_runtime_disable is invoked so that
there is no unbalanced pm_runtime_enable calls.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/pci/host/pci-dra7xx.c |4 +++-
1 file
Add PM support to pci-dra7xx so that PCI clocks can be disabled
during suspend and enabled back during resume without affecting
PCI functionality.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/pci/host/pci-dra7xx.c | 51 +
1 file
On 07/27/2015 01:27 PM, Roger Quadros wrote:
Hi,
This series cleans up the scm_conf node.
v2:
- split patch. use only core_sma_sw registers for the new scm_conf child.
Series looks ok to me, so:
Acked-by: Tero Kristo t-kri...@ti.com
cheers,
-roger
Roger Quadros (3):
ARM: dts: dra7:
TI QSPI controller has SFI translator which exposes entire flash memory
as memory mapped region for read. With this interface, the CPU
can copy data from flash using normal memcpy call. SFI translator
takes care of generating appropriate SPI signals to read data from
flash. This interface works
The PERST# line in am57x-evm is connected to a gpio line and PERST#
should be driven high to indicate the clocks are stable (As per
Figure 2-10: Power Up of the PCIe CEM spec 3.0).
Add support in pci-dra7xx driver to make gpio drive PERST#
line here.
Signed-off-by: Kishon Vijay Abraham I
Paul,
On 16/07/15 16:56, Roger Quadros wrote:
On 16/07/15 04:25, Paul Walmsley wrote:
Hi
On Tue, 23 Jun 2015, Roger Quadros wrote:
For some hwmods (e.g. DCAN on DRA7) we need the possibility to
disable HW_AUTO for the clockdomain while the module is active.
To achieve this there needs to
On Mon, Jul 27, 2015 at 04:23:45PM -0500, Dan Murphy wrote:
Russell
On 07/15/2015 12:47 PM, Russell King wrote:
+#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
+
/* Used to implement memory barrier on DRAM path */
#define OMAP4_DRAM_BARRIER_VA 0xfe60
-void
On Friday 24 July 2015 18:03:42 Pali Rohár wrote:
Hello,
when on N900 (real HW or qemu) I run this command
/ # echo 0 /sys/devices/platform/omapdss/overlay0/enabled echo 0
/sys/class/graphics/fb0/size
then kernel crash with this error message
/ # [ 29.904113] Division by zero
On Tue, Jul 28, 2015 at 10:47:28AM +0200, Teresa Remmet wrote:
Hello Igor,
Am Dienstag, den 28.07.2015, 11:29 +0300 schrieb Igor Grinberg:
Hi Matt,
On 07/27/15 17:34, Matt Porter wrote:
On Thu, Jul 16, 2015 at 10:30:48AM +0200, Teresa Remmet wrote:
phyCORE-AM335x is a SoM (System
On Tuesday 28 July 2015 14:26:13 Sebastian Reichel wrote:
Hi Pali,
On Tue, Jul 28, 2015 at 10:39:32AM +0200, Pali Rohár wrote:
Sebastian or Michael: Can you add check for pm_runtime_get_sync()
function and send patch for including in mainline kernel?
This actually already happened
On Mon, 27 Jul 2015, Sebastian Andrzej Siewior wrote:
On 07/27/2015 02:50 PM, Linus Walleij wrote:
Patch applied.
thanks.
Now this question appear in my head:
Is drivers/gpio full of stuff that will not work with the -RT kernel,
and is this a change that should be done mutatis
Hi Pali,
On Tue, Jul 28, 2015 at 10:39:32AM +0200, Pali Rohár wrote:
Sebastian or Michael: Can you add check for pm_runtime_get_sync()
function and send patch for including in mainline kernel?
This actually already happened before your Tested-By.
I accidently did not CC you, sorry for that:
On Mon, Jul 27, 2015 at 03:55:13PM -0500, Rob Herring wrote:
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:
IRQF_VALID -
* Pavel Machek pa...@ucw.cz [150726 02:29]:
Hi!
So, Pavel can you re-test? Maybe there can be problem with some driver
which Tony did not compiled into zImage? Just speculation...
I re-tested with today's git, and it seems to boot. Thanks for help...
OK good to hear.
* Suman Anna s-a...@ti.com [150724 09:27]:
Hi Tony,
On 07/23/2015 11:30 PM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [150723 09:25]:
Hi Tony,
On 07/23/2015 02:24 AM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [150722 09:25]:
On 07/22/2015 12:26 AM, Tony Lindgren wrote:
Hi all,
FYI I'll be offline for the rest of the week tinkering outdoors
with multithreaded pressure treated wooden hardware :)
Meanwhile, we have most of v4.3 patches queued up into arm-soc
for-next. I will probably do one more late branch for smaller
changes and looks like we also have a few
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