Hi Brian,
On 12/11/2015 09:39 AM, Vignesh R wrote:
> Changes since v4:
> Use syscon to access system control module register in ti-qspi driver.
>
Gentle ping...
Are you ok with MTD side changes of this patch series?
> Changes since v3:
> Rework to introduce spi_flash_read
On 12/11/2015 09:39 AM, Vignesh R wrote:
> Changes since v4:
> Use syscon to access system control module register in ti-qspi driver.
>
> Changes since v3:
> Rework to introduce spi_flash_read_message struct.
> Support different opcode/addr/data formats as per Brian's sugges
On 12/18/2015 12:15 AM, Tony Lindgren wrote:
> * Rob Herring <r...@kernel.org> [151211 07:10]:
>> On Fri, Dec 11, 2015 at 09:39:59AM +0530, Vignesh R wrote:
>>> Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
>>> update the binding documen
flash over SPI bus and get the
requested data.
Implement spi_flash_read() callback to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v5:
* use syscon to access ctrl_mod re
Certain spi controllers may provide accelerated interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_flash_read(), if supported, to make use of such interface.
Signed-off-by: Vignesh R <vigne...@ti.com>
-
on the discussions here:
http://www.spinics.net/lists/linux-spi/msg04796.html
Tested on DRA74 EVM and AM437x-SK.
Read performance increases from ~100kB/s to ~2.5MB/s.
Vignesh R (5):
spi: introduce accelerated read support for spi flash devices
spi: spi-ti-qspi: add mmap mode read support
such as memory mapped read etc. m25p80 flash driver
and other flash drivers can call this make use of such interfaces. The
interface should only be used with SPI flashes and cannot be used with
other SPI devices.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v5: No changes.
drivers/spi
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v5: No changes.
Documentation/devicetree/bindings/spi
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v5: use syscon to access scm register.
Documentation/devicetree/bindings/spi/ti_qspi.tx
On 12/03/2015 03:51 PM, Vignesh R wrote:
>
>
> On 12/01/2015 10:09 PM, Tony Lindgren wrote:
>> * Vignesh R <vigne...@ti.com> [151130 20:46]:
>>> On 12/01/2015 04:04 AM, Tony Lindgren wrote:
>>>>
...
>>
>> OK. They are both on L3 main so th
On 12/01/2015 10:09 PM, Tony Lindgren wrote:
> * Vignesh R <vigne...@ti.com> [151130 20:46]:
>> On 12/01/2015 04:04 AM, Tony Lindgren wrote:
>>>
>>> Actually none of the IO areas above are within the same interconnect target:
>>>
>>> 0x4b
Hi,
On 12/03/2015 03:12 PM, Cyrille Pitchen wrote:
> Hi Vignesh,
>
> Le 30/11/2015 06:15, Vignesh R a écrit :
>> Certain spi controllers may provide accelerated interface to read from
>> m25p80 type flash devices. This interface provides better read
>> performance
On 12/01/2015 04:04 AM, Tony Lindgren wrote:
> * Vignesh R <vigne...@ti.com> [151129 21:16]:
>> Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
>> update the binding documents for the controller to document this change.
>>
>> Acked-by: Rob He
Hi Felipe,
On 12/01/2015 04:05 AM, Balbi, Felipe wrote:
>
> Hi,
>
> Vignesh R <vigne...@ti.com> writes:
[...]
>> +}
>> +
>> +static int ti_qspi_spi_flash_read(struct spi_device *spi,
>> + struct spi_flash_read_messag
such as memory mapped read etc. m25p80 flash driver
and other flash drivers can call this make use of such interfaces. The
interface should only be used with SPI flashes and cannot be used with
other SPI devices.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi.c
on DRA74 EVM and AM437x-SK.
Read performance increases from ~100kB/s to ~2.5MB/s.
Vignesh R (5):
spi: introduce accelerated read support for spi flash devices
spi: spi-ti-qspi: add mmap mode read support
mtd: devices: m25p80: add support for mmap read request
ARM: dts: DRA7: add entry
Certain spi controllers may provide accelerated interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_flash_read(), if supported, to make use of such interface.
Signed-off-by: Vignesh R <vigne...@ti.com>
-
flash over SPI bus and get the
requested data.
Implement spi_flash_read() callback to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi-ti-qspi.c
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v4: No changes.
Documentation/devicetree/bindings/spi
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v4: No changes.
Documentation/devicetree/bindings/spi
Uart1 rxd is wakeup capable on DRA72 EVM. Hence, mark rxd line as
wakeup capable. This is similar to commit 66b0436977e2c ("ARM: dts:
dra7-evm: Mark uart1 rxd as wakeup capable") for DRA74 EVM.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/boot/dts/dra72-evm.dts | 2 ++
Hi Brian,
On 11/13/2015 09:35 PM, Cyrille Pitchen wrote:
[...]
>
> In September I've sent a series of patches to enhance the support of QSPI
> flash
> memories. Patch 4 was dedicated to the m25p80 driver and set the
> rx_nbits / tx_nbits fields of spi_transfer struct(s) in order to configure
Hi Brian,
On 11/12/2015 12:54 AM, Brian Norris wrote:
> In addition to my other comments:
>
[...]
>> +int (*spi_mtd_mmap_read)(struct spi_device *spi,
>> + loff_t from, size_t len,
>> + size_t *retlen, u_char *buf,
>> +
flash over SPI bus and get the
requested data.
Implement spi_mtd_mmap_read() callback to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v3:
* optimize enable/disable of mma
to
support memory mapped read interfaces. m25p80 flash driver and other
flash drivers can call this to request memory mapped read. The interface
should only be used MTD flashes and cannot be used with other SPI devices.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v3:
* Remove use of mmap_lock
Certain spi controllers may support memory mapped interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_mtd_mmap_read() interface, if supported, to make use of
memory-mapped interface.
Signed-off-by: Vignesh R <vi
.
This patch series is based on the discussions here:
http://www.spinics.net/lists/linux-spi/msg04796.html
Tested on DRA74 EVM and AM437x-SK.
Read performance increases from ~100kB/s to ~2.5MB/s.
Vignesh R (5):
spi: introduce mmap read support for spi flash devices
spi: spi-ti-qspi: add mmap
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/spi/ti_q
On 11/06/2015 10:44 AM, Felipe Balbi wrote:
>
> Hi,
>
> Rob Herring <r...@kernel.org> writes:
>> On Tue, Nov 03, 2015 at 03:36:14PM +0530, Vignesh R wrote:
>>> Add qspi memory mapped region entries for AM43xx based SoCs. Also,
>>> update the bindin
On 11/04/2015 08:09 PM, Mark Brown wrote:
> On Tue, Nov 03, 2015 at 03:36:10PM +0530, Vignesh R wrote:
>
>> +}
>> +mutex_lock(>mmap_lock_mutex);
>> +ret = master->spi_mtd_mmap_read(spi, from, len, retlen, buf,
>> +
On 11/04/2015 08:11 PM, Mark Brown wrote:
> On Tue, Nov 03, 2015 at 03:36:11PM +0530, Vignesh R wrote:
>
>> +ti_qspi_enable_memory_map(spi);
>> +ti_qspi_setup_mmap_read(spi, read_opcode, addr_width,
>> +dummy_bytes);
>> +memc
to
support memory mapped read interfaces. m25p80 flash driver and other
flash drivers can call this to request memory mapped read. The interface
should only be used MTD flashes and cannot be used with other SPI devices.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi.c
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Documentation/devicetree/bindings/spi/ti_qspi.txt | 13 +
arch/arm/boot/dts/dra
Certain spi controllers may support memory mapped interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_mtd_mmap_read() interface, if supported, to make use of
memory-mapped interface.
Signed-off-by: Vignesh R <vi
flash over SPI bus and get the
requested data.
Implement spi_mtd_mmap_read() callback to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi-ti-qspi.
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++--
arch/arm/boot/dts/am437
/lists/linux-spi/msg04796.html
Tested on DRA74 EVM and AM437x-SK.
Read performance increases from ~100kB/s to ~2.5MB/s.
Vignesh R (5):
spi: introduce mmap read support for spi flash devices
spi: spi-ti-qspi: add mmap mode read support
mtd: devices: m25p80: add support for mmap read request
Hi,
On 11/03/2015 04:49 PM, Michal Suchanek wrote:
> On 3 November 2015 at 11:06, Vignesh R <vigne...@ti.com> wrote:
>> In addition to providing direct access to SPI bus, some spi controller
>> hardwares (like ti-qspi) provide special memory mapped port
>> to accesses
On 10/14/2015 02:16 PM, Roger Quadros wrote:
>
> On 14/10/15 08:52, Vignesh R wrote:
>> On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from lower power
>> state via pinctrl and IO daisy chain using generic wakeirq framework.
>> With commit 3fffd1283927 ("i
On 10/14/2015 04:34 PM, Roger Quadros wrote:
> Vignesh,
>
> On 14/10/15 12:12, Vignesh R wrote:
>>
>>
>> On 10/14/2015 02:16 PM, Roger Quadros wrote:
>>
>>>
>>> On 14/10/15 08:52, Vignesh R wrote:
>>>> On am437x-gp-evm, pixcir_i2c_t
evice tree. Add wakeup irq entry to enable pixcir_i2c_ts
to wake the system from low power state.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Since v1:
- correct interrupt flag.
- add comment wrt wakeup interrupt.
arch/arm/boot/dts/am437x-gp-evm.dts | 9 +
1 file changed, 9 ins
evice tree. Add wakeup irq entry to enable pixcir_i2c_ts
to wake the system from low power state.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/boot/dts/am437x-gp-evm.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts
b/arch/arm/bo
of using interrupts.
This increases the throughput by 30% in both read and write case.
So, switch to polling mode instead of interrupts to determine completion
of word transfer.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Tested on DRA74 Rev G EVM.
drivers/spi/spi-ti-qspi.
verlap.
Fix this by moving writing invalid command to QSPI_SPI_CMD_REG to
before calling spi_finalize_current_message() call.
Cc: sta...@vger.kernel.org # v3.12+
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi-ti-qspi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
On 09/16/2015 04:26 PM, Mark Brown wrote:
> On Wed, Sep 16, 2015 at 03:38:09PM +0530, Vignesh R wrote:
>
>> But, I didn't get how to integrate with existing message queue. Memory
>> mapped read by-passes message queue of SPI core. Could you please
>> explain a
On 09/14/2015 11:57 PM, Mark Brown wrote:
> On Fri, Sep 04, 2015 at 02:00:00PM +0530, Vignesh R wrote:
>
>> +if (spi->master->spi_mtd_mmap_read) {
>> +return spi->master->spi_mtd_mmap_read(spi, from, len,
>> +
On 09/15/2015 12:07 AM, Mark Brown wrote:
> On Fri, Sep 04, 2015 at 01:59:58PM +0530, Vignesh R wrote:
>> In addition to providing direct access to SPI bus, some spi controller
>> hardwares (like ti-qspi) provide special memory mapped port
>> to accesses SPI flash devices
On 09/15/2015 12:05 AM, Mark Brown wrote:
> On Fri, Sep 04, 2015 at 04:55:33PM +0530, Jagan Teki wrote:
>> On 4 September 2015 at 13:59, Vignesh R <vigne...@ti.com> wrote:
>
>>> + * @spi_mtd_mmap_read: some spi-controller hardwares provide memory
>>> + *
On 09/14/2015 11:56 PM, Mark Brown wrote:
> On Fri, Sep 04, 2015 at 01:59:59PM +0530, Vignesh R wrote:
>
>> +static int ti_qspi_spi_mtd_mmap_read(struct spi_device *spi,
>> + loff_t from, size_t len,
>> +
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++--
arch/arm/boot/dts/am437
Certain spi controllers may support memory mapped interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_mtd_mmap_read() function, if available, to make use of
memory-mapped interface.
Signed-off-by: Vignesh R <vi
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Documentation/devicetree/bindings/spi/ti_qspi.txt | 13 +
arch/arm/boot/dts/dra
to
support memory mapped read interfaces. m25p80 flash driver and other
flash drivers can call this to request memory mapped read. The interface
should only be used mtd flashes and cannot be used with other spi devices.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
include/linux/spi/spi.
over SPI bus and get the
requested data.
Implement spi_mtd_mmap_read() method to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/spi-ti-qspi.c
:
http://www.spinics.net/lists/linux-spi/msg04796.html
Tested on DRA74 EVM and AM437x-SK.
Read performance increases from ~100kB/s to ~2.5MB/s.
Vignesh R (5):
spi: introduce mmap read support for spi flash devices
spi: spi-ti-qspi: add mmap mode read support
mtd: devices: m25p80: add support
On 08/20/2015 11:25 PM, Mark Brown wrote:
On Thu, Aug 20, 2015 at 04:00:59PM +0530, Vignesh R wrote:
-writeb(*txbuf, qspi-base + QSPI_SPI_DATA_REG);
+if (count = QSPI_WLEN_MAX_BYTES) {
+u32 *txp = (u32 *)txbuf
EVM.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/spi/spi-ti-qspi.c | 34 ++
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 45844a227c5e..f4cea6834fad 100644
--- a/drivers/spi/spi-ti
On 08/07/2015 03:46 PM, Michal Suchanek wrote:
[snip]
On 7 August 2015 at 10:35, Vignesh R vigne...@ti.com wrote:
On 08/07/2015 01:08 PM, Michal Suchanek wrote:
Now since the description is clearer it's obvious that ti-qspi cannot
work fully mmapped as fsl-qspi does because the setup has
On 08/07/2015 01:08 PM, Michal Suchanek wrote:
Now since the description is clearer it's obvious that ti-qspi cannot
work fully mmapped as fsl-qspi does because the setup has to be done
over normal spi access and using non-m25p80 devices on the same bus is
a requirement.
The place where
On 08/06/2015 03:52 PM, Russell King - ARM Linux wrote:
On Thu, Aug 06, 2015 at 12:01:37PM +0200, Michal Suchanek wrote:
Disclaimer: I am not familiar with the hardware for which this patch
adds support.
However, I am familiar m25p80.c and as I understand it the controller
is basically
On 08/05/2015 10:51 AM, Michal Suchanek wrote:
Hello,
On 4 August 2015 at 19:59, R, Vignesh vigne...@ti.com wrote:
On 8/4/2015 9:21 PM, Mark Brown wrote:
On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote:
@use_mmap_mode: Some SPI controller chips are optimized for interacting
Hi,
On 7/31/2015 11:47 PM, Mark Brown wrote:
On Tue, Jul 28, 2015 at 02:11:12PM +0530, Vignesh R wrote:
Introduce use_mmap_read field in spi_message struct. This can be set by
mtd devices (m25p80) to indicate to spi-master (ti-qspi) to perform
memory mapped read. This helps to distinguish
On 07/31/2015 11:49 PM, Mark Brown wrote:
On Tue, Jul 28, 2015 at 02:11:15PM +0530, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
qspi: qspi@4790 {
compatible = ti,am4372-qspi
On 08/01/2015 02:58 AM, Brian Norris wrote:
On Tue, Jul 28, 2015 at 02:11:15PM +0530, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1
On 07/31/2015 07:18 PM, Sekhar Nori wrote:
On Tuesday 28 July 2015 02:11 PM, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
On 07/23/2015 09:05 PM, R, Vignesh wrote:
On 7/16/2015 9:01 PM, R, Vignesh wrote:
Hi,
On 07/16/2015 03:24 AM, Paul Walmsley wrote:
Hi,
some comments.
On Wed, 3 Jun 2015, Vignesh R wrote:
Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS
Add qspi memory mapped region entries for AM43xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 8f1e25bcecbd
Set use_mmap_read flag to true, to indicate to spi-master that the
spi-message is from mtd layer. This helps spi-master to do memory
mapped reads over SPI flash memories, when hardware support is
available.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mtd/devices/m25p80.c | 3 +++
1 file
evm with macronix MX66l51235l flash.
[1] http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf Section 24.5.4 QSPI
Functional Description
Vignesh R (5):
spi: introduce flag for memory mapped read
spi: spi-ti-qspi: Add memory mapped read support
mtd: devices: m25p80: set flag to request memory mapped
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ade28c790f4b
to QSPI_SPI_SWITCH_REG. The read_opcode,
read mode, dummy bytes are configured in QSPI_SPI_SETUPx_REG, then
memcpy is called to copy the requested data from flash to the rx_buf.
With this patch, the read speed increased from ~100kB/s to ~2.5MB/s on
DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/spi
(hence mmap read is possible) or by other spi devices.
Signed-off-by: Vignesh R vigne...@ti.com
---
include/linux/spi/spi.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index d673072346f2..f1a0329ee63f 100644
--- a/include/linux/spi/spi.h
On 07/27/2015 04:19 PM, Roger Quadros wrote:
Hi,
On 23/07/15 17:54, Vignesh R wrote:
On am437x-gp-evm, pixcir touchscreen can wake the system from low power
state by generating wake-up interrupt via pinctrl and IO daisy chain.
Add support for optional wakeup interrupt source
automated device wake IRQ handling).
This is similar in approach to commit 2a0b965cfb6e (serial: omap: Add
support for optional wake-up)
Signed-off-by: Vignesh R vigne...@ti.com
---
v3:
* handle error code returned by of_irq_get_byname()
v2:
* use of_irq_get_byname()
* remove enable/disable_wake_irq
Pixcir_i2c_tsc driver can now wakeup the system from lower power state
via pinctrl and IO daisy chain using generic wakeirq framwework. Add
optional wakeup irq entry to allow pixcir_i2c_tsc to wake system from
low power state.
Signed-off-by: Vignesh R vigne...@ti.com
---
v3:
* Drop irq suffix
This is the v3 of the patch series to add optional wake irq support for
pixcir_i2c_tsc.
Tested on am437x-gp-evm, with some out of tree patches to support
suspend/resume on am437x.
Vignesh R (2):
input: touchscreen: pixcir_i2c_ts: Add support for optional wakeup
interrupt
ARM: dts
also comments below
[snip]
2015-06-22 15:18 GMT+02:00 Vignesh R vigne...@ti.com:
But calls to omap_hsmmc_card_init or omap_hsmmc_get_cd are in the same
mmc_rescan thread. Hence, moving the recovery code to init_card does not
help.
what about clearing any pending transfer
Hi Dmitry,
On 07/20/2015 11:54 AM, Dmitry Torokhov wrote:
On Sun, Jul 19, 2015 at 11:09:30PM -0700, Tony Lindgren wrote:
* Vignesh R vigne...@ti.com [150719 21:53]:
@@ -445,6 +443,8 @@ static struct pixcir_ts_platform_data
*pixcir_parse_dt(struct device *dev)
dev_dbg(dev, %s: x %d, y %d
automated device wake IRQ handling).
This is similar in approach to commit 2a0b965cfb6e (serial: omap: Add
support for optional wake-up)
Signed-off-by: Vignesh R vigne...@ti.com
---
v2:
* use of_irq_get_byname()
* remove enable/disable_wake_irq()
drivers/input/touchscreen/pixcir_i2c_ts.c | 17
Pixcir_i2c_tsc driver can now wakeup the system from lower power state
via pinctrl and IO daisy chain using generic wakeirq framwework. Add
optional wakeup irq entry to allow pixcir_i2c_tsc to wake system from
low power state.
Signed-off-by: Vignesh R vigne...@ti.com
---
v2:
* Add interrupt
of tree patches to support
suspend/resume on am437x.
Vignesh R (2):
input: touchscreen: pixcir_i2c_ts: Add support for optional wakeup
interrupt
ARM: dts: AM437x-gp-evm: Add wakeup interrupt source for
pixcir_i2c_tsc
arch/arm/boot/dts/am437x-gp-evm.dts | 4
drivers/input
Hi Dmitry,
On 7/18/2015 3:21 AM, Dmitry Torokhov wrote:
Hi Vignesh,
On Fri, Jul 17, 2015 at 12:10:40PM +0530, Vignesh R wrote:
On am437x-gp-evm, pixcir touchscreen can wake the system from low power
state by generating wake-up interrupt via pinctrl and IO daisy chain.
Add support
automated device wake IRQ handling).
This is similar in approach to commit 2a0b965cfb6e (serial: omap: Add
support for optional wake-up)
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/input/touchscreen/pixcir_i2c_ts.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/input
of tree patches to support
suspend/resume on am437x.
Vignesh R (2):
input: touchscreen: pixcir_i2c_ts: Add support for optional wakeup
interrupt
ARM: dts: AM437x-gp-evm: Add wakeup interrupt source for
pixcir_i2c_tsc
arch/arm/boot/dts/am437x-gp-evm.dts | 3 +++
drivers/input
Pixcir_i2c_tsc driver can now wakeup the system from lower power state
via pinctrl and IO daisy chain using generic wakeirq framwework. Add
optional wakeup irq entry to allow pixcir_i2c_tsc to wake system from
low power state.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am437x
Hi,
On 07/10/2015 06:56 PM, Alexander Sverdlin wrote:
Hi!
On 10/07/15 15:17, ext Vignesh R wrote:
I would propose you to throw away spinlocks. Convert threaded IRQ to
just one hardirq handler. And continue debugging. You will reduce the
load of the system with the above measures, maybe
On 07/10/2015 02:39 PM, Wolfram Sang wrote:
60 s sounds way too much and actually I simply don't believe this is
the root cause. If I take a look into the driver, then I see, that
I agree, this is just a workaround.
Yes, this is a workaround. I thought this is simpler change and can go
.
Signed-off-by: Vignesh R vigne...@ti.com
---
I reproduced this while running i2cdump in a loop and reading from flash
using dd command.
drivers/i2c/busses/i2c-omap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
On Tuesday 16 June 2015 04:07 PM, Vignesh R wrote:
Hi,
When using omap_hsmmc driver, if sd-card repeatedly plug unplugged
multiple times quickly, card enumeration stops after few iterations.
This can be easily reproduced on DRA74X EVM which uses omap_hsmmc driver.
This patch series
On Wednesday 03 June 2015 05:21 PM, Vignesh R wrote:
Hi,
This patch series adds support for PWMSS on DRA7. The IP is same as that
present in AM33XX and AM43XX.
The first patch changes clock domain in which PWMSS is present
(l4per2_7xx_clkdm) to SW_WKUP. This is because legacy IPs like
).
see also comments below
2015-06-16 12:37 GMT+02:00 Vignesh R vigne...@ti.com:
Usually when there is an error in transfer, DTO/CTO or other error
interrupts are raised. But if the card is unplugged in the middle of a
data transfer, it is observed that, neither completion(success) or
timeout
this by checking for 'host-data' before it is actually cleared.
Fixes: ae4bf788ee9b (mmc: omap_hsmmc: consolidate error report handling of
HSMMC IRQ)
CC: sta...@vger.kernel.org
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 8
.
Kishon Vijay Abraham I (1):
mmc: host: omap_hsmmc: Fix DTO and DCRC handling
Vignesh R (2):
mmc: host: omap_hsmmc: Handle BADA, DEB and CEB interrupts
mmc: host: omap_hsmmc: Add custom card detect irq handler
drivers/mmc/host/omap_hsmmc.c | 84 ---
1 file
transaction.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 73 ++-
1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index fb4bfefd9250..ec1fff3c0c9c 100644
(for which error occurred) to complete.
Fix this, by reporting BADA, DEB, CEB errors to mmc-core as -EILSEQ, so
that the core can do appropriate handling.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
L4PER2_L3_GICLK/2. The TRM does not show the division by 2.
[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: Vignesh R vigne...@ti.com
---
v2:
* add TRM references.
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 239 ++
1 file changed, 239 insertions(+)
diff --git
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to SW_WKUP.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/mach-omap2/clockdomains7xx_data.c | 2 +-
1 file changed, 1 insertion
domain to
SW_WKUP. This is based on the input from the hardware team.
The rest of the patches add hwmod and dt entries and enable PWMSS on
DRA7 based SoCs.
Vignesh R (5):
ARM: OMAP2+: DRA7: clockdomain: change l4per2_7xx_clkdm to SW_WKUP
ARM: OMAP2+: DRA7: Add hwmod entries for PWMSS
ARM: dts
SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1,
Table 29-19 and the NOTE at the end of the table.
[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: Vignesh R vigne...@ti.com
---
v2:
* add TRM references.
arch/arm/boot/dts/dra7.dtsi | 5 +
arch/arm/boot/dts
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