OMAP4 cpuidle driver is reporting the state requested by governor rather than
the actually attempted one.
This is obviously misleading sysfs and powertop cpuidle statistics.
Fix it so that stats are reported correctly.
Reported-by: Kevin Hilman khil...@ti.com
Signed-off-by: Santosh Shilimkar
-common line in the Makefile to use tabs
instead of spaces.
Reported-by: Kevin Hilman khil...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Makefile |4 ++--
arch/arm/plat-omap/include/plat/omap-secure.h |2 +-
2 files changed, 3
Patches are tested on OMAP4430 SDP.
The following changes since commit 62aa2b537c6f5957afd98e29f96897419ed5ebab:
Linux 3.3-rc2 (2012-01-31 13:31:54 -0800)
Rajendra Nayak (1):
ARM: OMAP: Get rid of reset for system timer
Santosh Shilimkar (1):
ARM: OMAP4: Move the barrier memboclk_steal
From: Rajendra Nayak rna...@ti.com
hwmod setup already does a reset and sets the OCP sysconfig
registers appropriately. Avoid doing a reset again and overriding
the OCP sysconfig settings in the system timer init code.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar
arm_memblock_steal() is not suppose to be used outside -reserve callback.
OMAP barrier errata code was using it outside reserve callback and hence
it was broken.
Move the allocation as part of -reserve callback to fix the it.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Tony
On Tuesday 08 November 2011 04:16 PM, Cousson, Benoit wrote:
Hi Govind,
On 11/8/2011 7:28 AM, Govindraj.R wrote:
Patch to fix below compilation error on latest mainline commit
b32fc0a0629bf5894b35f33554c118aacfd0d1e2 with omap2plus_defconfig.
arch/arm/mach-omap2/omap_l3_noc.c:250: error:
On Monday 10 October 2011 11:31 PM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
There are a few more compile errors when doing OMAP1
On Saturday 08 October 2011 04:20 AM, Kevin Hilman wrote:
Kevin Hilman khil...@ti.com writes:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
Just noticed when
On Thursday 06 October 2011 03:36 AM, Tony Lindgren wrote:
* Nicolas Pitre n...@fluxnic.net [111004 17:26]:
On Tue, 4 Oct 2011, Tony Lindgren wrote:
This allows mapping external memory such as SRAM for use.
This is needed for some small chunks of code, such as reprogramming
SDRAM memory
On Wednesday 05 October 2011 06:15 AM, Tony Lindgren wrote:
This way we don't need to initialize SoC detection early
and can start using generic map_io.
Signed-off-by: Tony Lindgren t...@atomide.com
---
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Santosh Shilimkar
?
O.w patch looks fine to me.
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Santosh Shilimkar santosh.shilim...@ti.com
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Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Tested-by: Santosh Shilimkar santosh.shilim...@ti.com
considering it's commin
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On Thursday 06 October 2011 07:12 AM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [111004 23:29]:
Will look at this series in next couple of days and do some testing.
Thanks, turns out there were a few issues with early ioremap
that I fixed. Care to check
On Friday 07 October 2011 08:13 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [111006 23:06]:
On Thursday 06 October 2011 03:36 AM, Tony Lindgren wrote:
* Nicolas Pitre n...@fluxnic.net [111004 17:26]:
On Tue, 4 Oct 2011, Tony Lindgren wrote:
+void __iomem
On Friday 07 October 2011 08:41 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [111007 07:29]:
On Friday 07 October 2011 08:13 PM, Tony Lindgren wrote:
..so I think we should just have a separate static mapping for
the omap4 errata fix SO page, and just limit the memory
On Friday 07 October 2011 11:46 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [111007 10:05]:
I initially tried some thing similar but the issue was GP and
HS devices. SRAM_PA isn't same on GP and EMU device and hence
did that dynamically. One way is I can make GP
On Wednesday 05 October 2011 08:09 AM, Nicolas Pitre wrote:
On Tue, 4 Oct 2011, Rob Herring wrote:
On 10/04/2011 04:21 PM, Nicolas Pitre wrote:
On Tue, 4 Oct 2011, Santosh Shilimkar wrote:
On Tuesday 04 October 2011 04:08 AM, Tony Lindgren wrote:
* Nicolas Pitre n...@fluxnic.net [111003 14
Tony,
On Wednesday 05 October 2011 06:15 AM, Tony Lindgren wrote:
Hi all,
Related to the omap static mapping, here's a first take on moving the
SRAM init to happen later so we can do generic map_io.
Still working on a similar patch for omap1, will send it a bit later.
Regards,
Tony
On Tuesday 04 October 2011 10:35 PM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
No need to repost, but can you update the versions
Nicolas,
On Tuesday 04 October 2011 04:08 AM, Tony Lindgren wrote:
* Nicolas Pitre n...@fluxnic.net [111003 14:36]:
On Mon, 3 Oct 2011, Tony Lindgren wrote:
* Nicolas Pitre n...@fluxnic.net [111003 11:26]:
OK, so let's modify omap4_panda_map_io() just to test this one board and
reverse
On Monday 03 October 2011 02:41 PM, Arnd Bergmann wrote:
On Monday 03 October 2011 10:58:23 Santosh Shilimkar wrote:
+config MACH_OMAP_AUTO_BOARD
+ def_bool y
+ depends on !MACH_OMAP2_TUSB6010
+ depends on !MACH_OMAP_H4
+ depends on !MACH_OMAP_APOLLON
+ depends
On Monday 03 October 2011 02:45 PM, Arnd Bergmann wrote:
On Monday 03 October 2011 11:09:33 Santosh Shilimkar wrote:
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index bb8f4a6..f7ef9f4 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -217,6
On Monday 03 October 2011 02:52 PM, Arnd Bergmann wrote:
On Monday 03 October 2011 10:35:25 Santosh Shilimkar wrote:
The entire set is also available from
git pull git://git.linaro.org/people/arnd/arm-soc.git randconfig/omap
but I have not yet pulled them into the for-next branch.
Do you
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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Arnd,
On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
Hi Tony,
I've mentioned these patches before, and now I've managed to
go through them again and clean them enough for submission.
If nobody has any objections, I would like to send them to
Linus in the coming merge window,
On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
We must not reference omap_i2c_reset if the file defining it
does not get built.
Signed-off-by: Arnd Bergmann a...@arndb.de
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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to plat/multi.h, mainly to allow all
possible randconfig combinations to build cleanly.
Signed-off-by: Arnd Bergmann a...@arndb.de
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
map2_mbox_iva_priv is used on multiple omap2 socs but is hidden
in an outdated #ifdef that is specific to a single soc.
Signed-off-by: Arnd Bergmann a...@arndb.de
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
a...@arndb.de
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
The Makefile only includes irq.o for omap2 and omap3, but it's in
fact also required to build omap4-only kernels.
Signed-off-by: Arnd Bergmann a...@arndb.de
That should not be the case. Why do you think it is needed for OMAP4 ?
There is
On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
These three boards unconditionally use the twl4030 driver
from the board-zoom-display.c file. Make sure that the driver
is always there.
We also need to select the I2C core so we are able to build
that driver.
Signed-off-by: Arnd
been a better default but am fine with
OMAP2 too.
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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-by: Arnd Bergmann a...@arndb.de
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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+ select MACH_OMAP_3430SDP if ARCH_OMAP3 !ARCH_OMAP2
+ select MACH_OMAP_4430SDP if ARCH_OMAP4 !ARCH_OMAP3 !ARCH_OMAP2
This is fine.
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
The cache controller needs to be enabled for the
cortex-a9 specific errata that are also selected
to work.
Signed-off-by: Arnd Bergmann a...@arndb.de
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
--
To unsubscribe from
OMAP3_EMU
to have a 'depends on OC_ETM' instead of selecting it.
Signed-off-by: Arnd Bergmann a...@arndb.de
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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More
On Sunday 02 October 2011 08:15 PM, Arnd Bergmann wrote:
The omap platform requires CPU_FREQ_TABLE support to be enabled for its
CPU_FREQ implementations, so automatically select that when CPU_FREQ
is enabled.
Signed-off-by: Arnd Bergmann a...@arndb.de
---
arch/arm/plat-omap/Kconfig |
Samual,
On Monday 26 September 2011 02:20 PM, Samuel Ortiz wrote:
Hi Todd,
On Thu, Sep 15, 2011 at 01:37:38PM -0700, Todd Poynor wrote:
On Tue, Sep 06, 2011 at 09:29:30PM +0530, Santosh Shilimkar wrote:
TWL6030 devices have an interrupt line which is connected to
application processor like
.
This complexity assumes there are systems that include twl6030
and don't want its IRQs to act as wakeup. Alternatively,
could just always enable wake for twl6030's IRQ.
Both options would mostly end up with same lines
of code :)
The patch looks good to me .
Acked-by: Santosh Shilimkar santosh.shilim
to ack the IRQ.
Disable the TWL6030 IRQ during suspend, enable it at DPM resume
time, at which time the child module IRQs will be re-enabled.
Signed-off-by: Todd Poynor toddpoy...@google.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Regards
Santosh
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Paul,
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
The series contains few fixes and clean-up for OMAP.
Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3
in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git
for_3_2/omap4-mpuss-pm
Santosh Shilimkar (24):
OMAP4: Use WARN_ON() instead of BUG_ON() with graceful exit
OMAP4: Export omap4_get_base*() rather than global address pointers
OMAP4: PM: Add SAR
OMAP4 L2X0 initialisation code uses BUG_ON() for the ioremap()
failure scenarios.
Use WARN_ON() instead and allow graceful function exits.
This was suggsted by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet
This patch adds SAR RAM support on OMAP4430. SAR RAM used to save
and restore the HW context in low power modes.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
This patch exports APIs to get base address for GIC
distributor, CPU interface, SCU and PL310 L2 Cache which
are used in OMAP4 PM code.
This was suggested by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j
supervised
clockdomain mode isn't functional for all clockdomains
on OMAP4430 ES1.0 silicon so avoid the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reported-by: Kevin Hilman khil...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested
static dependencies for above clockdomains.
Without this, system locks up or randomly crashes.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Paul Walmsley p...@pwsan.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman
Initialise hardware supervised mode for all clockdomains if it's
supported. Initiate sleep transition for other clockdomains,
if they are not being used.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/include/mach/omap-secure.h |4 +++
arch/arm/mach-omap2/omap-secure.c | 29
Remove the __INIT from omap_secondary_startup() so that it can
be re-used for CPU hotplug.
While at this, remove the un-used AUXBOOT register reference.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested
() with necessary interconnects barriers.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 21 +
1 files changed, 21
With OMAP4 suspend, idle and hotplug series, we no longer need
do_wfi() macro.
Remove the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach
- Version J
Section :
4.3.4.2 Power States of CPU0 and CPU1
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/omap-smp.c | 27
Program non-boot CPUs to hit lowest supported power state
when it is off-lined using cpu hotplug framework.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
. That is, a
given interrupt for a given CPU is either enable at both GIC and WakeupGen,
or disable at both, but no mix. That's the reason the WakeupGen is
implemented as an extension of GIC.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin
and restored by hardware like WakeupGen.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/omap-wakeupgen.c | 129
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff
-state latency profiling.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/Makefile |3
When MPUSS hits off-mode, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested
.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Acked-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch
Save VFP CPU context using CPU PM notifier chain. VFP context
is lost when CPU hits OFF state.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 15
off mode, it eventually hits off state since memory
contents are lost.
Hence the MPUSS off mode independent state is not attempted without
device off mode. All the necessary infrastructure code for MPUSS
off mode is in place as part of this series.
Signed-off-by: Santosh Shilimkar santosh.shilim
for a tip to conver assembly function to
C fuction there by reducing 40 odd lines of code from the patch.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Richard Woodruff r-woodru...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 16 +++
arch/arm/mach-omap2/pm44xx.c | 69
-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Jean Pihet j-pi...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
Tested-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/Makefile | 11 ++--
arch/arm/mach-omap2/include/mach/omap-secure.h | 40
On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
Hi Santosh
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
The series contains few fixes and clean-up for OMAP.
Briefly,
- HWMOD fix for the address space count
On Saturday 24 September 2011 01:06 PM, Paul Walmsley wrote:
Hi
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
Hi Santosh
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar
with this, as their resources are populated with a
extra null value, subsequently the probe fails. So fix the API not to
include the array terminator in the count.
Reported-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: sricharan r.sricha...@ti.com
-omap-dev.git for_3_2/omap_misc
Santosh Shilimkar (1):
OMAP4: Fix the emif and dmm virtual mapping
Todd Poynor (2):
OMAP: Improve register access in L3 Error handler.
OMAP: Fix a BUG in l3 error handler.
sricharan (3):
OMAP: Fix indentation issues in l3 error handler
On Saturday 24 September 2011 09:26 AM, DebBarma, Tarun Kanti wrote:
[...]
After debugging this myself a bit, here's what I think may be going on.
This may not be the only problem but here's at least one of them.
First, debounce clocks are disabled in the runtime_suspend callback.
When a
On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
[...]
#define OMAP44XX_EMIF2_SIZESZ_1M
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Fix the address overlap with Emulation domain (EMU).
The previous mapping was entering into EMU mapping
and was not as per comments. Fix the mapping accordingly.
[giris...@ti.com
-28 21:16:01 -0700)
are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
Santosh Shilimkar (2):
OMAP4: clock: Add CPU local timer clock node.
OMAP4: Fix the emif and dmm virtual mapping
Todd Poynor (2):
OMAP
with this,
as their address resources are populated with a extra null value,
subsequently the probe fails. So fix the API not to add the null value.
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p
this sequence.
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Todd Poynor toddpoy...@google.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap_l3_noc.c | 12 +---
1 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm
From: sricharan r.sricha...@ti.com
The indentation problems in the l3 noc and smx
error handler files are fixed.
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reported-by: Paul Walmsley p...@pwsan.com
Cc: Paul Walmsley p...@pwsan.com
Fix the address overlap with Emulation domain (EMU).
The previous mapping was entering into EMU mapping
and was not as per comments. Fix the mapping accordingly.
[giris...@ti.com: Helped fixing comments.]
Signed-off-by: Girish S G giris...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim
-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |9 +
1 files changed, 9 insertions(+), 0 deletions
From: sricharan r.sricha...@ti.com
The initiator id gets logged in the l3 target registers for custom error.
So print it to aid debugging.
Based on a internal patch by Devaraj Rangasamy d...@ti.com
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim
.
Signed-off-by: Todd Poynor toddpoy...@google.com
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap_l3_noc.c | 43 +-
arch/arm/mach-omap2/omap_l3_noc.h | 86
/arm/mach-omap2/omap_l3_noc.c:108:5:got unsigned int
Signed-off-by: sricharan r.sricha...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reported-by: Paul Walmsley p...@pwsan.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_l3_noc.c | 11 ++-
arch
of
irq_wake() if the wakeup is desirable on it's irq events.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl6030-irq.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/twl6030-irq.c b
crashes with
register accesses, synchronization loss on initiators operating
on both interconnect port simultaneously.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h |1 +
arch/arm/mach-omap2/omap
barriers, many issues have been observed
leading to system freeze, CPU deadlocks, random crashes with
register accesses, synchronization loss on initiators operating
on both interconnect port simultaneously.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Richard Woodruff r
strongly ordered.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Woodruff Richard r-woodru...@ti.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/include/asm/mach/map.h |1 +
arch/arm/include/asm/pgtable.h |3 +++
arch/arm/mm/mmu.c
OMAP4 L2X0 initialisation code uses BUG_ON() for the ioremap()
failure scenarios.
Use WARN_ON() instead and allow graceful function exits.
This was suggsted by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman
With OMAP4 suspend, idle and hotplug series, we no longer need
do_wfi() macro.
Remove the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h | 10 --
1 files changed, 0 insertions(+), 10
at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git
v3.1-rc4-omap4-mpuss-pm
Santosh Shilimkar (25):
ARM: mm: Add strongly ordered descriptor support.
OMAP4: Redefine mandatory barriers for OMAP to include interconnect
barriers.
OMAP4: PM: Use custom omap_do_wfi
This patch exports APIs to get base address for GIC
distributor, CPU interface, SCU and PL310 L2 Cache which
are used in OMAP4 PM code.
This was suggested by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil
Initialise hardware supervised mode for all clockdomains if it's
supported. Initiate sleep transition for other clockdomains,
if they are not being used.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch
mode 100644
index 000..26e7bcc
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/omap-secure.h
@@ -0,0 +1,40 @@
+/*
+ * omap-secure.h: OMAP Secure infrastructure header.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Santosh Shilimkar santosh.shilim...@ti.com
+ *
+ * This program
to OMAP3XXX / OMAP4XXX
secure RAM size requirements.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/include/mach/omap-secure.h |4 +++
arch/arm/mach-omap2/omap-secure.c | 29
arch/arm/plat-omap/common.c|3
- Version J
Section :
4.3.4.2 Power States of CPU0 and CPU1
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-smp.c | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch
domain. During normal operation,
WakeupGen delivers external interrupts directly to the GIC.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
supervised
clockdomain mode isn't functional for all clockdomains
on OMAP4430 ES1.0 silicon so avoid the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reported-by: Kevin Hilman khil...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |5 +
1 files changed
Program non-boot CPUs to hit lowest supported power state
when it is off-lined using cpu hotplug framework.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h |7 +
arch/arm/mach-omap2/omap
This patch adds MPUSS(MPU Sub System) power domain
CSWR(Close Switch Retention) support to system wide suspend.
For both MPUSS RET support, CPUs are programmed to OFF state.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
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